diff mbox

[Darwin/ppc] Fix altivec dwarf reg sizes.

Message ID 939EA3BE-44C5-49C0-AC60-80C2A1521327@codesourcery.com
State New
Headers show

Commit Message

Iain Sandoe Sept. 28, 2013, 10:03 a.m. UTC 
Hi!

We have this cunning legacy scheme to support unwinding on both G3 and G4/G5 processors.  Effectively, we build some components without altivec support, and then test for its presence at runtime.  To doing this we pretend that altivec is absent when building init_unwind - and therefore all the altivec regs get a default size of 1 for dwarf purposes.  This, naturally, breaks the dwarf unwinder for altivec cases (simd-3 and 4 fail, for example).  I guess it didn't matter when originally authored, since STABS was the debug scheme then.

Anyway, after considerable debate about this and several approaches, here is a patch that just ensures we set the altivec register size to its correct value. 

I've had this in my local tree for ~ 2years ...

OK for trunk and open branches? (we're generating wrong code)
Iain

gcc:

	* config/rs6000/rs6000.c (rs6000_init_dwarf_reg_sizes_extra): Ensure
	that altivec registers are correctly sized on Darwin.

Comments

Mike Stump Sept. 29, 2013, 5:34 p.m. UTC | #1 
On Sep 28, 2013, at 3:03 AM, Iain Sandoe <iain@codesourcery.com> wrote:
> Anyway, after considerable debate about this and several approaches, here is a patch that just ensures we set the altivec register size to its correct value.

> OK for trunk and open branches?

Ok.
diff mbox

Patch

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 7ff0af9..4e9a92b 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -28992,6 +28992,27 @@  rs6000_init_dwarf_reg_sizes_extra (tree address)
 	  emit_move_insn (adjust_address (mem, mode, offset), value);
 	}
     }
+
+  if (TARGET_MACHO && ! TARGET_ALTIVEC)
+    {
+      int i;
+      enum machine_mode mode = TYPE_MODE (char_type_node);
+      rtx addr = expand_expr (address, NULL_RTX, VOIDmode, EXPAND_NORMAL);
+      rtx mem = gen_rtx_MEM (BLKmode, addr);
+      rtx value = gen_int_mode (16, mode);
+
+      /* On Darwin, libgcc may be built to run on both G3 and G4/5.
+	 The unwinder still needs to know the size of Altivec registers.  */
+
+      for (i = FIRST_ALTIVEC_REGNO; i < LAST_ALTIVEC_REGNO+1; i++)
+	{
+	  int column = DWARF_REG_TO_UNWIND_COLUMN (i);
+	  HOST_WIDE_INT offset
+	    = DWARF_FRAME_REGNUM (column) * GET_MODE_SIZE (mode);
+
+	  emit_move_insn (adjust_address (mem, mode, offset), value);
+	}
+    }
 }
 
 /* Map internal gcc register numbers to DWARF2 register numbers.  */