| Message ID | 1378916688-3656-1-git-send-email-clsee@altera.com |
|---|---|
| State | Accepted |
| Delegated to: | Albert ARIBAUD |
| Headers | show |
Hi Albert, Would need your help to apply this patch to u-boot-arm/master as this patch has been a while ago. Thanks and have a nice day! Chin Liang On Wed, 2013-09-11 at 11:24 -0500, Chin Liang See wrote: > Adding System Manager driver which will configure the > pin mux for real hardware Cyclone V development kit > (not Virtual Platform) > > Signed-off-by: Chin Liang See <clsee@altera.com> > Reviewed-by: Pavel Machek <pavel@denx.de> > Acked-by: Dinh Nguyen <dinguyen@altera.com> > Cc: Wolfgang Denk <wd@denx.de> > CC: Pavel Machek <pavel@denx.de> > Cc: Dinh Nguyen <dinguyen@altera.com> > Cc: Tom Rini <trini@ti.com> > Cc: Albert Aribaud <albert.u.boot@aribaud.net> > --- > Changes for v7: > - Re-shuffle the change list > Changes for v6: > - Updated the license header for system_manager.c and .h to SPDX > Changes for v5: > - Updated the license header for system_manager.c > - Cc: Tom Rini > Changes for v4: > - Added change log for each revision change > Changes for v3: > - Fixed the long subject of the patch > - Fixed the comment within the code > Changes for v2: > - Fixed the word wrap issue within patch > --- > arch/arm/cpu/armv7/socfpga/Makefile | 2 +- > arch/arm/cpu/armv7/socfpga/spl.c | 6 ++++ > arch/arm/cpu/armv7/socfpga/system_manager.c | 29 ++++++++++++++++++++ > .../include/asm/arch-socfpga/socfpga_base_addrs.h | 1 + > arch/arm/include/asm/arch-socfpga/system_manager.h | 22 +++++++++++++++ > board/altera/socfpga/Makefile | 4 ++- > include/configs/socfpga_cyclone5.h | 1 + > 7 files changed, 63 insertions(+), 2 deletions(-) > create mode 100644 arch/arm/cpu/armv7/socfpga/system_manager.c > create mode 100644 arch/arm/include/asm/arch-socfpga/system_manager.h > > diff --git a/arch/arm/cpu/armv7/socfpga/Makefile b/arch/arm/cpu/armv7/socfpga/Makefile > index 5024fc5..0859e44 100644 > --- a/arch/arm/cpu/armv7/socfpga/Makefile > +++ b/arch/arm/cpu/armv7/socfpga/Makefile > @@ -13,7 +13,7 @@ include $(TOPDIR)/config.mk > LIB = $(obj)lib$(SOC).o > > SOBJS := lowlevel_init.o > -COBJS-y := misc.o timer.o reset_manager.o > +COBJS-y := misc.o timer.o reset_manager.o system_manager.o > COBJS-$(CONFIG_SPL_BUILD) += spl.o > > COBJS := $(COBJS-y) > diff --git a/arch/arm/cpu/armv7/socfpga/spl.c b/arch/arm/cpu/armv7/socfpga/spl.c > index 2b9be28..74bceab 100644 > --- a/arch/arm/cpu/armv7/socfpga/spl.c > +++ b/arch/arm/cpu/armv7/socfpga/spl.c > @@ -12,6 +12,7 @@ > #include <image.h> > #include <asm/arch/reset_manager.h> > #include <spl.h> > +#include <asm/arch/system_manager.h> > > DECLARE_GLOBAL_DATA_PTR; > > @@ -25,6 +26,11 @@ u32 spl_boot_device(void) > */ > void spl_board_init(void) > { > +#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET > + /* configure the pin muxing through system manager */ > + sysmgr_pinmux_init(); > +#endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */ > + > /* de-assert reset for peripherals and bridges based on handoff */ > reset_deassert_peripherals_handoff(); > > diff --git a/arch/arm/cpu/armv7/socfpga/system_manager.c b/arch/arm/cpu/armv7/socfpga/system_manager.c > new file mode 100644 > index 0000000..b992221 > --- /dev/null > +++ b/arch/arm/cpu/armv7/socfpga/system_manager.c > @@ -0,0 +1,29 @@ > +/* > + * Copyright (C) 2013 Altera Corporation <www.altera.com> > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +#include <common.h> > +#include <asm/io.h> > +#include <asm/arch/system_manager.h> > + > +DECLARE_GLOBAL_DATA_PTR; > + > +/* > + * Configure all the pin muxes > + */ > +void sysmgr_pinmux_init(void) > +{ > + unsigned long offset = CONFIG_SYSMGR_PINMUXGRP_OFFSET; > + > + const unsigned long *pval = sys_mgr_init_table; > + unsigned long i; > + > + for (i = 0; i < ARRAY_SIZE(sys_mgr_init_table); > + i++, offset += sizeof(unsigned long)) { > + writel(*pval++, (SOCFPGA_SYSMGR_ADDRESS + offset)); > + } > +} > + > + > diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h > index 1182a13..50c4ebd 100644 > --- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h > +++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h > @@ -12,5 +12,6 @@ > #define SOCFPGA_UART1_ADDRESS 0xffc03000 > #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000 > #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000 > +#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000 > > #endif /* _SOCFPGA_BASE_ADDRS_H_ */ > diff --git a/arch/arm/include/asm/arch-socfpga/system_manager.h b/arch/arm/include/asm/arch-socfpga/system_manager.h > new file mode 100644 > index 0000000..d965d25 > --- /dev/null > +++ b/arch/arm/include/asm/arch-socfpga/system_manager.h > @@ -0,0 +1,22 @@ > +/* > + * Copyright (C) 2013 Altera Corporation <www.altera.com> > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +#ifndef _SYSTEM_MANAGER_H_ > +#define _SYSTEM_MANAGER_H_ > + > +#ifndef __ASSEMBLY__ > + > +void sysmgr_pinmux_init(void); > + > +/* declaration for handoff table type */ > +extern unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM]; > + > +#endif > + > + > +#define CONFIG_SYSMGR_PINMUXGRP_OFFSET (0x400) > + > +#endif /* _SYSTEM_MANAGER_H_ */ > diff --git a/board/altera/socfpga/Makefile b/board/altera/socfpga/Makefile > index 43bbc37..3092387 100644 > --- a/board/altera/socfpga/Makefile > +++ b/board/altera/socfpga/Makefile > @@ -26,8 +26,10 @@ include $(TOPDIR)/config.mk > > LIB = $(obj)lib$(BOARD).o > > -COBJS := socfpga_cyclone5.o > +COBJS-y := socfpga_cyclone5.o > +COBJS-$(CONFIG_SPL_BUILD) += pinmux_config.o > > +COBJS := $(COBJS-y) > SRCS := $(COBJS:.o=.c) > OBJS := $(addprefix $(obj),$(COBJS)) > > diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h > index 06aeba6..346ca72 100644 > --- a/include/configs/socfpga_cyclone5.h > +++ b/include/configs/socfpga_cyclone5.h > @@ -7,6 +7,7 @@ > #define __CONFIG_H > > #include <asm/arch/socfpga_base_addrs.h> > +#include "../../board/altera/socfpga/pinmux_config.h" > > /* > * High level configuration
Hi Chin, On Wed, 11 Sep 2013 11:24:48 -0500, Chin Liang See <clsee@altera.com> wrote: > Adding System Manager driver which will configure the > pin mux for real hardware Cyclone V development kit > (not Virtual Platform) > > Signed-off-by: Chin Liang See <clsee@altera.com> > Reviewed-by: Pavel Machek <pavel@denx.de> > Acked-by: Dinh Nguyen <dinguyen@altera.com> > Cc: Wolfgang Denk <wd@denx.de> > CC: Pavel Machek <pavel@denx.de> > Cc: Dinh Nguyen <dinguyen@altera.com> > Cc: Tom Rini <trini@ti.com> > Cc: Albert Aribaud <albert.u.boot@aribaud.net> > --- > Changes for v7: > - Re-shuffle the change list > Changes for v6: > - Updated the license header for system_manager.c and .h to SPDX > Changes for v5: > - Updated the license header for system_manager.c > - Cc: Tom Rini > Changes for v4: > - Added change log for each revision change > Changes for v3: > - Fixed the long subject of the patch > - Fixed the comment within the code > Changes for v2: > - Fixed the word wrap issue within patch > --- > arch/arm/cpu/armv7/socfpga/Makefile | 2 +- > arch/arm/cpu/armv7/socfpga/spl.c | 6 ++++ > arch/arm/cpu/armv7/socfpga/system_manager.c | 29 ++++++++++++++++++++ > .../include/asm/arch-socfpga/socfpga_base_addrs.h | 1 + > arch/arm/include/asm/arch-socfpga/system_manager.h | 22 +++++++++++++++ > board/altera/socfpga/Makefile | 4 ++- > include/configs/socfpga_cyclone5.h | 1 + > 7 files changed, 63 insertions(+), 2 deletions(-) > create mode 100644 arch/arm/cpu/armv7/socfpga/system_manager.c > create mode 100644 arch/arm/include/asm/arch-socfpga/system_manager.h > > diff --git a/arch/arm/cpu/armv7/socfpga/Makefile b/arch/arm/cpu/armv7/socfpga/Makefile > index 5024fc5..0859e44 100644 > --- a/arch/arm/cpu/armv7/socfpga/Makefile > +++ b/arch/arm/cpu/armv7/socfpga/Makefile > @@ -13,7 +13,7 @@ include $(TOPDIR)/config.mk > LIB = $(obj)lib$(SOC).o > > SOBJS := lowlevel_init.o > -COBJS-y := misc.o timer.o reset_manager.o > +COBJS-y := misc.o timer.o reset_manager.o system_manager.o > COBJS-$(CONFIG_SPL_BUILD) += spl.o > > COBJS := $(COBJS-y) > diff --git a/arch/arm/cpu/armv7/socfpga/spl.c b/arch/arm/cpu/armv7/socfpga/spl.c > index 2b9be28..74bceab 100644 > --- a/arch/arm/cpu/armv7/socfpga/spl.c > +++ b/arch/arm/cpu/armv7/socfpga/spl.c > @@ -12,6 +12,7 @@ > #include <image.h> > #include <asm/arch/reset_manager.h> > #include <spl.h> > +#include <asm/arch/system_manager.h> > > DECLARE_GLOBAL_DATA_PTR; > > @@ -25,6 +26,11 @@ u32 spl_boot_device(void) > */ > void spl_board_init(void) > { > +#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET > + /* configure the pin muxing through system manager */ > + sysmgr_pinmux_init(); > +#endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */ > + > /* de-assert reset for peripherals and bridges based on handoff */ > reset_deassert_peripherals_handoff(); > > diff --git a/arch/arm/cpu/armv7/socfpga/system_manager.c b/arch/arm/cpu/armv7/socfpga/system_manager.c > new file mode 100644 > index 0000000..b992221 > --- /dev/null > +++ b/arch/arm/cpu/armv7/socfpga/system_manager.c > @@ -0,0 +1,29 @@ > +/* > + * Copyright (C) 2013 Altera Corporation <www.altera.com> > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +#include <common.h> > +#include <asm/io.h> > +#include <asm/arch/system_manager.h> > + > +DECLARE_GLOBAL_DATA_PTR; > + > +/* > + * Configure all the pin muxes > + */ > +void sysmgr_pinmux_init(void) > +{ > + unsigned long offset = CONFIG_SYSMGR_PINMUXGRP_OFFSET; > + > + const unsigned long *pval = sys_mgr_init_table; > + unsigned long i; > + > + for (i = 0; i < ARRAY_SIZE(sys_mgr_init_table); > + i++, offset += sizeof(unsigned long)) { > + writel(*pval++, (SOCFPGA_SYSMGR_ADDRESS + offset)); > + } > +} > + > + > diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h > index 1182a13..50c4ebd 100644 > --- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h > +++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h > @@ -12,5 +12,6 @@ > #define SOCFPGA_UART1_ADDRESS 0xffc03000 > #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000 > #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000 > +#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000 > > #endif /* _SOCFPGA_BASE_ADDRS_H_ */ > diff --git a/arch/arm/include/asm/arch-socfpga/system_manager.h b/arch/arm/include/asm/arch-socfpga/system_manager.h > new file mode 100644 > index 0000000..d965d25 > --- /dev/null > +++ b/arch/arm/include/asm/arch-socfpga/system_manager.h > @@ -0,0 +1,22 @@ > +/* > + * Copyright (C) 2013 Altera Corporation <www.altera.com> > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +#ifndef _SYSTEM_MANAGER_H_ > +#define _SYSTEM_MANAGER_H_ > + > +#ifndef __ASSEMBLY__ > + > +void sysmgr_pinmux_init(void); > + > +/* declaration for handoff table type */ > +extern unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM]; > + > +#endif > + > + > +#define CONFIG_SYSMGR_PINMUXGRP_OFFSET (0x400) > + > +#endif /* _SYSTEM_MANAGER_H_ */ > diff --git a/board/altera/socfpga/Makefile b/board/altera/socfpga/Makefile > index 43bbc37..3092387 100644 > --- a/board/altera/socfpga/Makefile > +++ b/board/altera/socfpga/Makefile > @@ -26,8 +26,10 @@ include $(TOPDIR)/config.mk > > LIB = $(obj)lib$(BOARD).o > > -COBJS := socfpga_cyclone5.o > +COBJS-y := socfpga_cyclone5.o > +COBJS-$(CONFIG_SPL_BUILD) += pinmux_config.o > > +COBJS := $(COBJS-y) > SRCS := $(COBJS:.o=.c) > OBJS := $(addprefix $(obj),$(COBJS)) > > diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h > index 06aeba6..346ca72 100644 > --- a/include/configs/socfpga_cyclone5.h > +++ b/include/configs/socfpga_cyclone5.h > @@ -7,6 +7,7 @@ > #define __CONFIG_H > > #include <asm/arch/socfpga_base_addrs.h> > +#include "../../board/altera/socfpga/pinmux_config.h" > > /* > * High level configuration Applied to u-boot-arm/master (with a trivial "blank likes at EOF" warning fixed), thanks! Amicalement,
diff --git a/arch/arm/cpu/armv7/socfpga/Makefile b/arch/arm/cpu/armv7/socfpga/Makefile index 5024fc5..0859e44 100644 --- a/arch/arm/cpu/armv7/socfpga/Makefile +++ b/arch/arm/cpu/armv7/socfpga/Makefile @@ -13,7 +13,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o SOBJS := lowlevel_init.o -COBJS-y := misc.o timer.o reset_manager.o +COBJS-y := misc.o timer.o reset_manager.o system_manager.o COBJS-$(CONFIG_SPL_BUILD) += spl.o COBJS := $(COBJS-y) diff --git a/arch/arm/cpu/armv7/socfpga/spl.c b/arch/arm/cpu/armv7/socfpga/spl.c index 2b9be28..74bceab 100644 --- a/arch/arm/cpu/armv7/socfpga/spl.c +++ b/arch/arm/cpu/armv7/socfpga/spl.c @@ -12,6 +12,7 @@ #include <image.h> #include <asm/arch/reset_manager.h> #include <spl.h> +#include <asm/arch/system_manager.h> DECLARE_GLOBAL_DATA_PTR; @@ -25,6 +26,11 @@ u32 spl_boot_device(void) */ void spl_board_init(void) { +#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET + /* configure the pin muxing through system manager */ + sysmgr_pinmux_init(); +#endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */ + /* de-assert reset for peripherals and bridges based on handoff */ reset_deassert_peripherals_handoff(); diff --git a/arch/arm/cpu/armv7/socfpga/system_manager.c b/arch/arm/cpu/armv7/socfpga/system_manager.c new file mode 100644 index 0000000..b992221 --- /dev/null +++ b/arch/arm/cpu/armv7/socfpga/system_manager.c @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Altera Corporation <www.altera.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/system_manager.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Configure all the pin muxes + */ +void sysmgr_pinmux_init(void) +{ + unsigned long offset = CONFIG_SYSMGR_PINMUXGRP_OFFSET; + + const unsigned long *pval = sys_mgr_init_table; + unsigned long i; + + for (i = 0; i < ARRAY_SIZE(sys_mgr_init_table); + i++, offset += sizeof(unsigned long)) { + writel(*pval++, (SOCFPGA_SYSMGR_ADDRESS + offset)); + } +} + + diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h index 1182a13..50c4ebd 100644 --- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h +++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h @@ -12,5 +12,6 @@ #define SOCFPGA_UART1_ADDRESS 0xffc03000 #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000 #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000 +#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000 #endif /* _SOCFPGA_BASE_ADDRS_H_ */ diff --git a/arch/arm/include/asm/arch-socfpga/system_manager.h b/arch/arm/include/asm/arch-socfpga/system_manager.h new file mode 100644 index 0000000..d965d25 --- /dev/null +++ b/arch/arm/include/asm/arch-socfpga/system_manager.h @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2013 Altera Corporation <www.altera.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SYSTEM_MANAGER_H_ +#define _SYSTEM_MANAGER_H_ + +#ifndef __ASSEMBLY__ + +void sysmgr_pinmux_init(void); + +/* declaration for handoff table type */ +extern unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM]; + +#endif + + +#define CONFIG_SYSMGR_PINMUXGRP_OFFSET (0x400) + +#endif /* _SYSTEM_MANAGER_H_ */ diff --git a/board/altera/socfpga/Makefile b/board/altera/socfpga/Makefile index 43bbc37..3092387 100644 --- a/board/altera/socfpga/Makefile +++ b/board/altera/socfpga/Makefile @@ -26,8 +26,10 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).o -COBJS := socfpga_cyclone5.o +COBJS-y := socfpga_cyclone5.o +COBJS-$(CONFIG_SPL_BUILD) += pinmux_config.o +COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h index 06aeba6..346ca72 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5.h @@ -7,6 +7,7 @@ #define __CONFIG_H #include <asm/arch/socfpga_base_addrs.h> +#include "../../board/altera/socfpga/pinmux_config.h" /* * High level configuration