diff mbox

[U-Boot,v6,1/3] mx27: add missing constant for mx27

Message ID 1378481627-31545-2-git-send-email-tremyfr@yahoo.fr
State Awaiting Upstream
Delegated to: Stefano Babic
Headers show

Commit Message

trem Sept. 6, 2013, 3:33 p.m. UTC 
Add some missing constant (chip select, ...)

Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Signed-off-by: Eric Jarrige <eric.jarrige@armadeus.org>
Acked-by: Stefano Babic <sbabic@denx.de>
---
 arch/arm/cpu/arm926ejs/mx27/asm-offsets.c |    5 +++++
 arch/arm/include/asm/arch-mx27/imx-regs.h |    6 +++++-
 2 files changed, 10 insertions(+), 1 deletions(-)

Comments

Stefano Babic Sept. 10, 2013, 5:19 p.m. UTC | #1 
On 06/09/2013 17:33, Philippe Reynes wrote:
> Add some missing constant (chip select, ...)
> 
> Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
> Signed-off-by: Eric Jarrige <eric.jarrige@armadeus.org>
> Acked-by: Stefano Babic <sbabic@denx.de>
> ---


Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic
diff mbox

Patch

diff --git a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
index 8db2a67..629b727 100644
--- a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
+++ b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
@@ -38,5 +38,10 @@  int main(void)
 	DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
 	DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
 
+	DEFINE(GPCR, IMX_SYSTEM_CTL_BASE +
+		offsetof(struct system_control_regs, gpcr));
+	DEFINE(FMCR, IMX_SYSTEM_CTL_BASE +
+		offsetof(struct system_control_regs, fmcr));
+
 	return 0;
 }
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h
index a27145b..92c847e 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -169,7 +169,7 @@  struct iim_regs {
 	struct fuse_bank {
 		u32 fuse_regs[0x20];
 		u32 fuse_rsvd[0xe0];
-	} bank[1];
+	} bank[2];
 };
 
 struct fuse_bank0_regs {
@@ -209,9 +209,13 @@  struct fuse_bank0_regs {
 #define IIM_BASE_ADDR		IMX_IIM_BASE
 #define IMX_FEC_BASE		(0x2b000 + IMX_IO_BASE)
 
+#define IMX_NFC_BASE		(0xD8000000)
 #define IMX_ESD_BASE		(0xD8001000)
 #define IMX_WEIM_BASE		(0xD8002000)
 
+#define NFC_BASE_ADDR		IMX_NFC_BASE
+
+
 /* FMCR System Control bit definition*/
 #define UART4_RXD_CTL	(1 << 25)
 #define UART4_RTS_CTL	(1 << 24)