@@ -2059,9 +2059,8 @@
(cond [(eq_attr "alternative" "2")
(const_string "SI")
(eq_attr "alternative" "12,13")
- (cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))")
- (and (match_test "REG_P (operands[1])")
- (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
+ (cond [(ior (match_operand 0 "ext_sse_reg_operand")
+ (match_operand 1 "ext_sse_reg_operand"))
(const_string "XI")
(ior (not (match_test "TARGET_SSE2"))
(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
@@ -2192,9 +2191,8 @@
(cond [(eq_attr "alternative" "2,3")
(const_string "DI")
(eq_attr "alternative" "6,7")
- (cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))")
- (and (match_test "REG_P (operands[1])")
- (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
+ (cond [(ior (match_operand 0 "ext_sse_reg_operand")
+ (match_operand 1 "ext_sse_reg_operand"))
(const_string "XI")
(ior (not (match_test "TARGET_SSE2"))
(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
@@ -2923,9 +2921,8 @@
/* movaps is one byte shorter for non-AVX targets. */
(eq_attr "alternative" "10,14")
- (cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))")
- (and (match_test "REG_P (operands[1])")
- (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
+ (cond [(ior (match_operand 0 "ext_sse_reg_operand")
+ (match_operand 1 "ext_sse_reg_operand"))
(const_string "V8DF")
(ior (not (match_test "TARGET_SSE2"))
(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
@@ -3072,9 +3069,8 @@
better to maintain the whole registers in single format
to avoid problems on using packed logical operations. */
(eq_attr "alternative" "6")
- (cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))")
- (and (match_test "REG_P (operands[1])")
- (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
+ (cond [(ior (match_operand 0 "ext_sse_reg_operand")
+ (match_operand 1 "ext_sse_reg_operand"))
(const_string "V16SF")
(ior (match_test "TARGET_SSE_PARTIAL_REG_DEPENDENCY")
(match_test "TARGET_SSE_SPLIT_REGS"))
@@ -185,9 +185,8 @@
(cond [(eq_attr "alternative" "2")
(const_string "SI")
(eq_attr "alternative" "11,12,15,16")
- (cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))")
- (and (match_test "REG_P (operands[1])")
- (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
+ (cond [(ior (match_operand 0 "ext_sse_reg_operand")
+ (match_operand 1 "ext_sse_reg_operand"))
(const_string "XI")
(match_test "<MODE>mode == V2SFmode")
(const_string "V4SF")
@@ -47,6 +47,12 @@
(and (match_code "reg")
(match_test "SSE_REGNO_P (REGNO (op))")))
+;; True if the operand is an AVX-512 new register.
+(define_predicate "ext_sse_reg_operand"
+ (and (match_code "reg")
+ (match_test "EXT_REX_SSE_REGNO_P (REGNO (op))")))
+
+
;; True if the operand is a Q_REGS class register.
(define_predicate "q_regs_operand"
(match_operand 0 "register_operand")