| Message ID | CAFULd4ZO-N3GsCB725zuvtnTbZ_sTkVwTLR6faYFVKcaqdQ6gA@mail.gmail.com |
|---|---|
| State | New |
| Headers | show |
On Tue, Aug 27, 2013 at 10:28 AM, Uros Bizjak <ubizjak@gmail.com> wrote: > Hello! > >> As reported in [1] the host processor detection has not yet been updated >> to recognize Intel Ivy Bridge and Haswell processors. >> This small patch adds the detection of these processors and assumes >> core-avx2 as march for unknown processors of the PENTIUMPRO family that >> support AVX2. > > I have committed slightly improved (attached) patch that uses > core-avx-i for IvyBridge and adds another IvyBridge model number. > While there, I also reordered a bunch of statements. > > Thanks, > Uros. Page C-3 in ntel optimization guide shows: 06_3CH, 06_45H, 06_46H Intel microarchitecture Haswell 06_3AH, 06_3EH Intel microarchitecture Ivy Bridge 06_2AH, 06_2DH Intel microarchitecture Sandy Bridge 06_25H, 06_2CH, 06_2FH Intel microarchitecture Westmere 06_1AH, 06_1EH, 06_1FH, Intel microarchitecture Nehalem 06_2EH 06_17H, 06_1DH Enhanced Intel Core microarchitecture 06_0FH Intel Core microarchitecture At least, we should add 0x45 and 0x46 to Haswell.
On Tue, Aug 27, 2013 at 7:36 PM, H.J. Lu <hjl.tools@gmail.com> wrote: >>> As reported in [1] the host processor detection has not yet been updated >>> to recognize Intel Ivy Bridge and Haswell processors. >>> This small patch adds the detection of these processors and assumes >>> core-avx2 as march for unknown processors of the PENTIUMPRO family that >>> support AVX2. >> >> I have committed slightly improved (attached) patch that uses >> core-avx-i for IvyBridge and adds another IvyBridge model number. >> While there, I also reordered a bunch of statements. >> >> Thanks, >> Uros. > > Page C-3 in ntel optimization guide shows: > > 06_3CH, 06_45H, 06_46H Intel microarchitecture Haswell > 06_3AH, 06_3EH Intel microarchitecture Ivy Bridge > 06_2AH, 06_2DH Intel microarchitecture Sandy Bridge > 06_25H, 06_2CH, 06_2FH Intel microarchitecture Westmere > 06_1AH, 06_1EH, 06_1FH, Intel microarchitecture Nehalem > 06_2EH > 06_17H, 06_1DH Enhanced Intel Core microarchitecture > 06_0FH Intel Core microarchitecture > > At least, we should add 0x45 and 0x46 to Haswell. OK, the patch is pre-approved. Thanks, Uros.
On Tue, 27 Aug 2013 19:41:09 +0200 Uros Bizjak <ubizjak@gmail.com> wrote: > On Tue, Aug 27, 2013 at 7:36 PM, H.J. Lu <hjl.tools@gmail.com> wrote: > > >>> As reported in [1] the host processor detection has not yet been updated > >>> to recognize Intel Ivy Bridge and Haswell processors. > >>> This small patch adds the detection of these processors and assumes > >>> core-avx2 as march for unknown processors of the PENTIUMPRO family that > >>> support AVX2. > >> > >> I have committed slightly improved (attached) patch that uses > >> core-avx-i for IvyBridge and adds another IvyBridge model number. > >> While there, I also reordered a bunch of statements. > >> > >> Thanks, > >> Uros. > > > > Page C-3 in ntel optimization guide shows: > > > > 06_3CH, 06_45H, 06_46H Intel microarchitecture Haswell > > 06_3AH, 06_3EH Intel microarchitecture Ivy Bridge > > 06_2AH, 06_2DH Intel microarchitecture Sandy Bridge > > 06_25H, 06_2CH, 06_2FH Intel microarchitecture Westmere > > 06_1AH, 06_1EH, 06_1FH, Intel microarchitecture Nehalem > > 06_2EH > > 06_17H, 06_1DH Enhanced Intel Core microarchitecture > > 06_0FH Intel Core microarchitecture > > > > At least, we should add 0x45 and 0x46 to Haswell. > > OK, the patch is pre-approved. Can these changes be backported to 4.8 and the Ivy Bridge parts to 4.7 as well? We've had a couple reports of bad -march=native results for Haswell on 4.7. I can file PRs if you're interested.
Index: driver-i386.c =================================================================== --- driver-i386.c (revision 202024) +++ driver-i386.c (working copy) @@ -644,13 +644,18 @@ const char *host_detect_local_cpu (int argc, const /* Atom. */ cpu = "atom"; break; + case 0x0f: + /* Merom. */ + case 0x17: + case 0x1d: + /* Penryn. */ + cpu = "core2"; + break; case 0x1a: case 0x1e: case 0x1f: case 0x2e: /* Nehalem. */ - cpu = "corei7"; - break; case 0x25: case 0x2c: case 0x2f: @@ -662,20 +667,23 @@ const char *host_detect_local_cpu (int argc, const /* Sandy Bridge. */ cpu = "corei7-avx"; break; - case 0x17: - case 0x1d: - /* Penryn. */ - cpu = "core2"; + case 0x3a: + case 0x3e: + /* Ivy Bridge. */ + cpu = "core-avx-i"; break; - case 0x0f: - /* Merom. */ - cpu = "core2"; + case 0x3c: + /* Haswell. */ + cpu = "core-avx2"; break; default: if (arch) { /* This is unknown family 0x6 CPU. */ - if (has_avx) + if (has_avx2) + /* Assume Haswell. */ + cpu = "core-avx2"; + else if (has_avx) /* Assume Sandy Bridge. */ cpu = "corei7-avx"; else if (has_sse4_2)