| Message ID | 1374090375-21216-1-git-send-email-troy.kisky@boundarydevices.com |
|---|---|
| State | Accepted |
| Delegated to: | Tom Rini |
| Headers | show |
Hi Troy, On Wed, Jul 17, 2013 at 4:46 PM, Troy Kisky <troy.kisky@boundarydevices.com> wrote: > The old value of 0x000e0030 will cause ethernet > timeout issues on the sabrelite and possibly other > boards using the KSZ9021. > I have no explanation as to why. > > But this is a correct change, the TRM will be updated > to show that 00b is the only valid setting for bits > 19-18 of DRAM_RESET. > > My thanks go to Liu Hui(Jason) for this information. > > Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Should this go into 2013.07?
On 7/19/2013 2:00 PM, Fabio Estevam wrote: > Hi Troy, > > On Wed, Jul 17, 2013 at 4:46 PM, Troy Kisky > <troy.kisky@boundarydevices.com> wrote: >> The old value of 0x000e0030 will cause ethernet >> timeout issues on the sabrelite and possibly other >> boards using the KSZ9021. >> I have no explanation as to why. >> >> But this is a correct change, the TRM will be updated >> to show that 00b is the only valid setting for bits >> 19-18 of DRAM_RESET. >> >> My thanks go to Liu Hui(Jason) for this information. >> >> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> > Should this go into 2013.07? > If not too late. It only affect Nitrogen6x, at least until Sabrelite is combined with it. And Sabrelite is already using this value. Troy
On Fri, Jul 19, 2013 at 02:34:55PM -0700, Troy Kisky wrote: > On 7/19/2013 2:00 PM, Fabio Estevam wrote: > >Hi Troy, > > > >On Wed, Jul 17, 2013 at 4:46 PM, Troy Kisky > ><troy.kisky@boundarydevices.com> wrote: > >>The old value of 0x000e0030 will cause ethernet > >>timeout issues on the sabrelite and possibly other > >>boards using the KSZ9021. > >>I have no explanation as to why. > >> > >>But this is a correct change, the TRM will be updated > >>to show that 00b is the only valid setting for bits > >>19-18 of DRAM_RESET. > >> > >>My thanks go to Liu Hui(Jason) for this information. > >> > >>Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> > >Should this go into 2013.07? > > > > If not too late. It only affect Nitrogen6x, at least until Sabrelite > is combined with it. > And Sabrelite is already using this value. Whose acks should I wait for on this?
On Wed, Jul 17, 2013 at 4:46 PM, Troy Kisky <troy.kisky@boundarydevices.com> wrote: > The old value of 0x000e0030 will cause ethernet > timeout issues on the sabrelite and possibly other > boards using the KSZ9021. > I have no explanation as to why. > > But this is a correct change, the TRM will be updated > to show that 00b is the only valid setting for bits > 19-18 of DRAM_RESET. > > My thanks go to Liu Hui(Jason) for this information. > > Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Hi Tom, On Fri, Jul 19, 2013 at 6:50 PM, Tom Rini <trini@ti.com> wrote: > On Fri, Jul 19, 2013 at 02:34:55PM -0700, Troy Kisky wrote: >> On 7/19/2013 2:00 PM, Fabio Estevam wrote: >> >Hi Troy, >> > >> >On Wed, Jul 17, 2013 at 4:46 PM, Troy Kisky >> ><troy.kisky@boundarydevices.com> wrote: >> >>The old value of 0x000e0030 will cause ethernet >> >>timeout issues on the sabrelite and possibly other >> >>boards using the KSZ9021. >> >>I have no explanation as to why. >> >> >> >>But this is a correct change, the TRM will be updated >> >>to show that 00b is the only valid setting for bits >> >>19-18 of DRAM_RESET. >> >> >> >>My thanks go to Liu Hui(Jason) for this information. >> >> >> >>Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> >> >Should this go into 2013.07? >> > >> >> If not too late. It only affect Nitrogen6x, at least until Sabrelite >> is combined with it. >> And Sabrelite is already using this value. > > Whose acks should I wait for on this? Just realized I acked in the original message and you were not on Cc, so Acked-by: Fabio Estevam <fabio.estevam@freescale.com> As Jason Liu explained the mx6 reference manual will be updated to fix the incorrect setting. Thanks, Fabio Estevam
Hi Tom, Am 19/07/2013 23:50, schrieb Tom Rini: > On Fri, Jul 19, 2013 at 02:34:55PM -0700, Troy Kisky wrote: >> On 7/19/2013 2:00 PM, Fabio Estevam wrote: >>> Hi Troy, >>> >>> On Wed, Jul 17, 2013 at 4:46 PM, Troy Kisky >>> <troy.kisky@boundarydevices.com> wrote: >>>> The old value of 0x000e0030 will cause ethernet >>>> timeout issues on the sabrelite and possibly other >>>> boards using the KSZ9021. >>>> I have no explanation as to why. >>>> >>>> But this is a correct change, the TRM will be updated >>>> to show that 00b is the only valid setting for bits >>>> 19-18 of DRAM_RESET. >>>> >>>> My thanks go to Liu Hui(Jason) for this information. >>>> >>>> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> >>> Should this go into 2013.07? >>> >> >> If not too late. It only affect Nitrogen6x, at least until Sabrelite >> is combined with it. >> And Sabrelite is already using this value. > > Whose acks should I wait for on this? Acked-by: Stefano Babic <sbabic@denx.de> From the i.MX point of view, the patch is a fix for the RAM configuration and does not affects other boards but only the nitrogen. I had merged this in u-boot-imx, but it is too late for PR. If it is not too late, please merge it for release. Many thanks, Stefano
On Sat, Jul 20, 2013 at 06:01:56PM +0200, Stefano Babic wrote: > Hi Tom, > > Am 19/07/2013 23:50, schrieb Tom Rini: > > On Fri, Jul 19, 2013 at 02:34:55PM -0700, Troy Kisky wrote: > > >> On 7/19/2013 2:00 PM, Fabio Estevam wrote: > >>> Hi Troy, > >>> > >>> On Wed, Jul 17, 2013 at 4:46 PM, Troy Kisky > >>> <troy.kisky@boundarydevices.com> wrote: > >>>> The old value of 0x000e0030 will cause ethernet > >>>> timeout issues on the sabrelite and possibly other > >>>> boards using the KSZ9021. > >>>> I have no explanation as to why. > >>>> > >>>> But this is a correct change, the TRM will be updated > >>>> to show that 00b is the only valid setting for bits > >>>> 19-18 of DRAM_RESET. > >>>> > >>>> My thanks go to Liu Hui(Jason) for this information. > >>>> > >>>> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> > >>> Should this go into 2013.07? > >>> > >> > >> If not too late. It only affect Nitrogen6x, at least until Sabrelite > >> is combined with it. > >> And Sabrelite is already using this value. > > > > Whose acks should I wait for on this? > > Acked-by: Stefano Babic <sbabic@denx.de> > > From the i.MX point of view, the patch is a fix for the RAM > configuration and does not affects other boards but only the nitrogen. I > had merged this in u-boot-imx, but it is too late for PR. If it is not > too late, please merge it for release. Applied to u-boot/master, thanks!
On 17.07.2013 21:46, Troy Kisky wrote: > The old value of 0x000e0030 will cause ethernet > timeout issues on the sabrelite and possibly other > boards using the KSZ9021. > I have no explanation as to why. > > But this is a correct change, the TRM will be updated > to show that 00b is the only valid setting for bits > 19-18 of DRAM_RESET. > > My thanks go to Liu Hui(Jason) for this information. > > Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Thanks Dirk > --- > board/boundary/nitrogen6x/ddr-setup.cfg | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/board/boundary/nitrogen6x/ddr-setup.cfg b/board/boundary/nitrogen6x/ddr-setup.cfg > index c315812..e5f8add 100644 > --- a/board/boundary/nitrogen6x/ddr-setup.cfg > +++ b/board/boundary/nitrogen6x/ddr-setup.cfg > @@ -74,7 +74,7 @@ DATA 4, MX6_IOM_DRAM_RAS, 0x00020030 > DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00020030 > DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00020030 > > -DATA 4, MX6_IOM_DRAM_RESET, 0x000e0030 > +DATA 4, MX6_IOM_DRAM_RESET, 0x00020030 > DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 > DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00003000
diff --git a/board/boundary/nitrogen6x/ddr-setup.cfg b/board/boundary/nitrogen6x/ddr-setup.cfg index c315812..e5f8add 100644 --- a/board/boundary/nitrogen6x/ddr-setup.cfg +++ b/board/boundary/nitrogen6x/ddr-setup.cfg @@ -74,7 +74,7 @@ DATA 4, MX6_IOM_DRAM_RAS, 0x00020030 DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00020030 DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00020030 -DATA 4, MX6_IOM_DRAM_RESET, 0x000e0030 +DATA 4, MX6_IOM_DRAM_RESET, 0x00020030 DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00003000
The old value of 0x000e0030 will cause ethernet timeout issues on the sabrelite and possibly other boards using the KSZ9021. I have no explanation as to why. But this is a correct change, the TRM will be updated to show that 00b is the only valid setting for bits 19-18 of DRAM_RESET. My thanks go to Liu Hui(Jason) for this information. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> --- board/boundary/nitrogen6x/ddr-setup.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)