Message ID | 1372178945-11528-3-git-send-email-fredo@starox.org |
---|---|
State | Superseded |
Headers | show |
Dear Frederic Leroy, In message <1372178945-11528-3-git-send-email-fredo@starox.org> you wrote: > > diff --git a/board/LaCie/common/common.c b/board/LaCie/common/common.c > index a62bf9f..d828685 100644 > --- a/board/LaCie/common/common.c > +++ b/board/LaCie/common/common.c ... > + #ifndef CONFIG_CLOUDBOX ... > + #else ... > + #endif Preprocessor statements must start in column 1; please fix. Also, can we not avoid the #ifdef alltogether by providing a #define for the register number to read? This could then be done in the board config file. Best regards, Wolfgang Denk
On Tue, Jun 25, 2013 at 06:49:05PM +0200, Frederic Leroy wrote: > From: Frédéric Leroy <fredo@starox.org> > > The cloudbox device have a different ethernet phy setup than other ns2 > devices. We get initialization value from the GPL LaCie source > > Signed-off-by: Frédéric Leroy <fredo@starox.org> > --- > board/LaCie/common/common.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/board/LaCie/common/common.c b/board/LaCie/common/common.c > index a62bf9f..d828685 100644 > --- a/board/LaCie/common/common.c > +++ b/board/LaCie/common/common.c > @@ -52,10 +52,18 @@ void mv_phy_88e1318_init(const char *name, u16 phyaddr) > /* > * Set control mode 4 for LED[0]. > */ > + #ifndef CONFIG_CLOUDBOX > miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 3); > miiphy_read(name, phyaddr, 16, ®); > reg |= 0xf; > miiphy_write(name, phyaddr, 16, reg); > + #else > + miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 3); > + miiphy_read(name, phyaddr, 17, ®); > + reg &= ~0x3f; > + reg |= 0x15; > + miiphy_write(name, phyaddr, 17, reg); > + #endif This doesn't look very common but I can't figure out a more elegant way. Acked-by: Simon Guinot <simon.guinot@sequanux.org>
diff --git a/board/LaCie/common/common.c b/board/LaCie/common/common.c index a62bf9f..d828685 100644 --- a/board/LaCie/common/common.c +++ b/board/LaCie/common/common.c @@ -52,10 +52,18 @@ void mv_phy_88e1318_init(const char *name, u16 phyaddr) /* * Set control mode 4 for LED[0]. */ + #ifndef CONFIG_CLOUDBOX miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 3); miiphy_read(name, phyaddr, 16, ®); reg |= 0xf; miiphy_write(name, phyaddr, 16, reg); + #else + miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 3); + miiphy_read(name, phyaddr, 17, ®); + reg &= ~0x3f; + reg |= 0x15; + miiphy_write(name, phyaddr, 17, reg); + #endif /* * Enable RGMII delay on Tx and Rx for CPU port