Message ID | 1370406751-3852-1-git-send-email-horms+renesas@verge.net.au |
---|---|
State | New |
Headers | show |
[ fix up subject to say GIT PULL ] On Wed, Jun 05, 2013 at 01:32:27PM +0900, Simon Horman wrote: > Hi Olof, Hi Arnd, > > The following changes since commit c7788792a5e7b0d5d7f96d0766b4cb6112d47d75: > > Linux 3.10-rc2 (2013-05-20 14:37:38 -0700) > > are available in the git repository at: > > git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-intc-external-irq-for-v3.11 > > for you to fetch changes up to 14d064ad3881f47ae0a6f247c992652053c7f4d5: > > irqchip: Add irqchip_init dummy function (2013-05-22 21:55:41 +0900) > > ---------------------------------------------------------------- > Update for Renesas INTC External IRQ pin driver for v3.11 > > Add runtime PM support > Add DT binding for sense bitfield width > Correct error handing in irqc_probe > Add irqchip_init dummy function > > ---------------------------------------------------------------- > Axel Lin (1): > irqchip: renesas-irqc: Fix irqc_probe error handling > > Bastian Hecht (1): > irqchip: Add irqchip_init dummy function > > Guennadi Liakhovetski (1): > irqchip: renesas-intc-irqpin: DT binding for sense bitfield width > > Simon Horman (1): > irqchip: irqc: Add runtime PM support > > .../bindings/interrupt-controller/renesas,intc-irqpin.txt | 13 +++++++++++++ > drivers/irqchip/irq-renesas-intc-irqpin.c | 4 ++++ > drivers/irqchip/irq-renesas-irqc.c | 12 ++++++++++-- > include/linux/irqchip.h | 4 ++++ > 4 files changed, 31 insertions(+), 2 deletions(-) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt > > -- > 1.8.2.1 >
Hi Simon and Morimoto-san, On Wed, Jun 5, 2013 at 1:32 PM, Simon Horman <horms+renesas@verge.net.au> wrote: > This was tested using the SMSC LAN on the APE6EVM board. > > Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> > --- > drivers/irqchip/irq-renesas-irqc.c | 8 ++++++++ > 1 file changed, 8 insertions(+) Thanks for your patch. I am trying to understand how this controls the actual hardware. Which clock and/or power domain is being controlled using this patch? Cheers, / magnus
On Wednesday 05 June 2013, Simon Horman wrote: > @@ -0,0 +1,13 @@ > +DT bindings for the R-/SH-Mobile irqpin controller > + > +Required properties: > + > +- compatible: has to be "renesas,intc-irqpin" > +- #interrupt-cells: has to be <2> > + > +Optional properties: > + > +- any properties, listed in interrupts.txt in this directory, and any standard > + resource allocation properties > +- sense-bitfield-width: width of a single sense bitfield in the SENSE register, > + if different from the default 4 bits I think you should add documentation here about how the two interrupt cells are to be interpreted, to allow people to fill the values from a data sheet or board schematic. Arnd
On Wed, Jun 05, 2013 at 04:03:26PM +0900, Magnus Damm wrote: > Hi Simon and Morimoto-san, > > On Wed, Jun 5, 2013 at 1:32 PM, Simon Horman <horms+renesas@verge.net.au> wrote: > > This was tested using the SMSC LAN on the APE6EVM board. > > > > Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> > > --- > > drivers/irqchip/irq-renesas-irqc.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > Thanks for your patch. I am trying to understand how this controls the > actual hardware. Which clock and/or power domain is being controlled > using this patch? This patch appears to resolve a problem which I discussed with Morimoto-san on the linux-sh ML and for which he proposed this solution. However, I never fully analysed its effect. I think that the best thing would be for me to drop this patch from the renesas tree for now it and come back to this problem later.
On Wed, Jun 05, 2013 at 01:52:52PM +0200, Arnd Bergmann wrote: > On Wednesday 05 June 2013, Simon Horman wrote: > > @@ -0,0 +1,13 @@ > > +DT bindings for the R-/SH-Mobile irqpin controller > > + > > +Required properties: > > + > > +- compatible: has to be "renesas,intc-irqpin" > > +- #interrupt-cells: has to be <2> > > + > > +Optional properties: > > + > > +- any properties, listed in interrupts.txt in this directory, and any standard > > + resource allocation properties > > +- sense-bitfield-width: width of a single sense bitfield in the SENSE register, > > + if different from the default 4 bits > > I think you should add documentation here about how the two interrupt cells > are to be interpreted, to allow people to fill the values from a data sheet > or board schematic. I will drop this patch from the renesas tree pending some more work on the documentation. I'll put together an updated pull request for renesas-intc-irqpin without this or the runtime-pm patch, which Magnus commented on elsewhere.