@@ -75,11 +75,6 @@ void gpmc_init(void)
/* putting a blanket check on GPMC based on ZeBu for now */
gpmc_cfg = (struct gpmc *)GPMC_BASE;
-#ifdef CONFIG_CMD_NAND
- const u32 *gpmc_config = NULL;
- u32 base = 0;
- u32 size = 0;
-#endif
/* global settings */
writel(0x00000008, &gpmc_cfg->sysconfig);
writel(0x00000100, &gpmc_cfg->irqstatus);
@@ -92,10 +87,7 @@ void gpmc_init(void)
sdelay(1000);
#ifdef CONFIG_CMD_NAND
- gpmc_config = gpmc_m_nand;
-
- base = PISMO1_NAND_BASE;
- size = PISMO1_NAND_SIZE;
- enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);
+ enable_gpmc_cs_config(gpmc_m_nand, &gpmc_cfg->cs[0],
+ CONFIG_SYS_NAND_BASE, GPMC_SIZE_256M);
#endif
}
@@ -113,11 +113,6 @@ void gpmc_init(void)
{
/* putting a blanket check on GPMC based on ZeBu for now */
gpmc_cfg = (struct gpmc *)GPMC_BASE;
-#if defined(CONFIG_CMD_NAND) || defined(CONFIG_CMD_ONENAND)
- const u32 *gpmc_config = NULL;
- u32 base = 0;
- u32 size = 0;
-#endif
u32 config = 0;
/* global settings */
@@ -136,17 +131,12 @@ void gpmc_init(void)
sdelay(1000);
#if defined(CONFIG_CMD_NAND) /* CS 0 */
- gpmc_config = gpmc_m_nand;
-
- base = PISMO1_NAND_BASE;
- size = PISMO1_NAND_SIZE;
- enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);
+ enable_gpmc_cs_config(gpmc_m_nand, &gpmc_cfg->cs[0], PISMO1_NAND_BASE,
+ PISMO1_NAND_SIZE);
#endif
#if defined(CONFIG_CMD_ONENAND)
- gpmc_config = gpmc_onenand;
- base = PISMO1_ONEN_BASE;
- size = PISMO1_ONEN_SIZE;
- enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);
+ enable_gpmc_cs_config(gpmc_onenand, &gpmc_cfg->cs[0], PISMO1_ONEN_BASE,
+ PISMO1_ONEN_SIZE);
#endif
}
We don't really need the gpmc_config, base and size variables and can just call enable_gpmc_cs_config more directly, like the boards which need to re-configure CS0 or CS1 do. Signed-off-by: Tom Rini <trini@ti.com> --- Changes in v2: - New patch --- arch/arm/cpu/armv7/am33xx/mem.c | 12 ++---------- arch/arm/cpu/armv7/omap3/mem.c | 18 ++++-------------- 2 files changed, 6 insertions(+), 24 deletions(-)