diff mbox

[U-Boot,v4,6/7] mxs: spl_mem_init: Skip the initialization of some DRAM_CTL registers

Message ID 1367589613-18065-7-git-send-email-festevam@gmail.com
State Awaiting Upstream
Delegated to: Stefano Babic
Headers show

Commit Message

Fabio Estevam May 3, 2013, 2 p.m. UTC 
From: Fabio Estevam <fabio.estevam@freescale.com>

HW_DRAM_CTL27, HW_DRAM_CTL28 and HW_DRAM_CTL35 are not initialized as per 
FSL bootlets code.

mx23 Reference Manual mark HW_DRAM_CTL27 and HW_DRAM_CTL28 as "reserved".

HW_DRAM_CTL8 is setup as the last element.

So skip the initialization of these DRAM_CTL registers.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Changes since v3:
- Use continue
Changes since v2:
- None
Changes since v1:
- To avoid polluting the mx28 case, separate the function definition in mx23 and
for mx28.
 arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c |   17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

Comments

Marek Vasut May 3, 2013, 2:12 p.m. UTC | #1 
Dear Fabio Estevam,

> From: Fabio Estevam <fabio.estevam@freescale.com>
> 
> HW_DRAM_CTL27, HW_DRAM_CTL28 and HW_DRAM_CTL35 are not initialized as per
> FSL bootlets code.
> 
> mx23 Reference Manual mark HW_DRAM_CTL27 and HW_DRAM_CTL28 as "reserved".
> 
> HW_DRAM_CTL8 is setup as the last element.
> 
> So skip the initialization of these DRAM_CTL registers.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> Changes since v3:
> - Use continue
> Changes since v2:
> - None
> Changes since v1:
> - To avoid polluting the mx28 case, separate the function definition in
> mx23 and for mx28.
>  arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c |   17 +++++++++++++++--
>  1 file changed, 15 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index df25535..e599f31 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> @@ -110,6 +110,7 @@ __weak void mxs_adjust_memory_params(uint32_t
> *dram_vals) {
>  }
> 
> +#ifdef CONFIG_MX28
>  static void initialize_dram_values(void)
>  {
>  	int i;
> @@ -118,15 +119,27 @@ static void initialize_dram_values(void)
> 
>  	for (i = 0; i < ARRAY_SIZE(dram_vals); i++)
>  		writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
> +}
> +#else
> +static void initialize_dram_values(void)
> +{
> +	int i;
> +
> +	mxs_adjust_memory_params(dram_vals);
> +
> +	for (i = 0; i < ARRAY_SIZE(dram_vals); i++) {

I dunno if I should be bitching some more, but you have double (()) below. Some 
comment just here won't hurt, but whatever.

> +		if ((i == 8 || i == 27 || i == 28 || i == 35))
> +			continue;
> +		writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
> +	}
> 
> -#ifdef CONFIG_MX23
>  	/*
>  	 * Enable tRAS lockout in HW_DRAM_CTL08 ; it must be the last
>  	 * element to be set
>  	 */
>  	writel((1 << 24), MXS_DRAM_BASE + (4 * 8));
> -#endif
>  }
> +#endif
> 
>  static void mxs_mem_init_clock(void)
>  {

Best regards,
Marek Vasut
diff mbox

Patch

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index df25535..e599f31 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -110,6 +110,7 @@  __weak void mxs_adjust_memory_params(uint32_t *dram_vals)
 {
 }
 
+#ifdef CONFIG_MX28
 static void initialize_dram_values(void)
 {
 	int i;
@@ -118,15 +119,27 @@  static void initialize_dram_values(void)
 
 	for (i = 0; i < ARRAY_SIZE(dram_vals); i++)
 		writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
+}
+#else
+static void initialize_dram_values(void)
+{
+	int i;
+
+	mxs_adjust_memory_params(dram_vals);
+
+	for (i = 0; i < ARRAY_SIZE(dram_vals); i++) {
+		if ((i == 8 || i == 27 || i == 28 || i == 35))
+			continue;
+		writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
+	}
 
-#ifdef CONFIG_MX23
 	/*
 	 * Enable tRAS lockout in HW_DRAM_CTL08 ; it must be the last
 	 * element to be set
 	 */
 	writel((1 << 24), MXS_DRAM_BASE + (4 * 8));
-#endif
 }
+#endif
 
 static void mxs_mem_init_clock(void)
 {