diff mbox

[U-Boot,v3,5/7] mxs: spl_mem_init: Remove erroneous DDR setting

Message ID 1367534661-13502-6-git-send-email-festevam@gmail.com
State Superseded
Headers show

Commit Message

Fabio Estevam May 2, 2013, 10:44 p.m. UTC 
From: Fabio Estevam <fabio.estevam@freescale.com>

On mx23 there is no 'DRAM init complete' in register HW_DRAM_CTL18.

Remove this erroneous setting.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Changes since v2:
- None
Changes since v1:
- Newly introduced as the previous patch is now splitted.

 arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c |    4 ----
 1 file changed, 4 deletions(-)

Comments

Marek Vasut May 3, 2013, 2:25 a.m. UTC | #1 
Dear Fabio Estevam,

> From: Fabio Estevam <fabio.estevam@freescale.com>
> 
> On mx23 there is no 'DRAM init complete' in register HW_DRAM_CTL18.
> 
> Remove this erroneous setting.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> Changes since v2:
> - None
> Changes since v1:
> - Newly introduced as the previous patch is now splitted.
> 
>  arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c |    4 ----
>  1 file changed, 4 deletions(-)
> 
> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index 300da0a..df25535 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> @@ -279,10 +279,6 @@ static void mx23_mem_init(void)
> 
>  	setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 19);
>  	setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 11);
> -
> -	/* Wait for bit 10 (DRAM init complete) in DRAM_CTL18 */
> -	while (!(readl(MXS_DRAM_BASE + 0x48) & (1 << 10)))
> -		;

Is there no such similar bit indicating the init completed?

>  }
>  #endif

Best regards,
Marek Vasut
Fabio Estevam May 3, 2013, 2:37 a.m. UTC | #2 
On Thu, May 2, 2013 at 11:25 PM, Marek Vasut <marex@denx.de> wrote:

> Is there no such similar bit indicating the init completed?

Not that I am aware of.
Marek Vasut May 3, 2013, 2:50 a.m. UTC | #3 
Dear Fabio Estevam,

> On Thu, May 2, 2013 at 11:25 PM, Marek Vasut <marex@denx.de> wrote:
> > Is there no such similar bit indicating the init completed?
> 
> Not that I am aware of.

That's a tad stupid, but I'll trust you on that.

Best regards,
Marek Vasut
diff mbox

Patch

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index 300da0a..df25535 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -279,10 +279,6 @@  static void mx23_mem_init(void)
 
 	setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 19);
 	setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 11);
-
-	/* Wait for bit 10 (DRAM init complete) in DRAM_CTL18 */
-	while (!(readl(MXS_DRAM_BASE + 0x48) & (1 << 10)))
-		;
 }
 #endif