diff mbox

[U-Boot,4/9] mx23_olinuxino: Fix DDR pin iomux settings

Message ID 1367444689-31301-5-git-send-email-festevam@gmail.com
State Changes Requested
Delegated to: Stefano Babic
Headers show

Commit Message

Fabio Estevam May 1, 2013, 9:44 p.m. UTC 
From: Fabio Estevam <fabio.estevam@freescale.com>

Registers HW_PINCTRL_DRIVE9, HW_PINCTRL_DRIVE10, HW_PINCTRL_DRIVE11,
HW_PINCTRL_DRIVE12, HW_PINCTRL_DRIVE13 and HW_PINCTRL_DRIVE14 control the drive
strength and the voltage selection for the DDR pins.

The reset values of the voltage selection pins are '1', which is marked as
'reserved' in the mx23 reference manual.

Clear these bits for proper operation of DDR.

Also change MUX_CONFIG_EMI, which results in better stability and match the
bootlets code from Freescale.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
 board/olimex/mx23_olinuxino/spl_boot.c |   13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

Comments

Marek Vasut May 1, 2013, 11:28 p.m. UTC | #1 
Dear Fabio Estevam,

> From: Fabio Estevam <fabio.estevam@freescale.com>
> 
> Registers HW_PINCTRL_DRIVE9, HW_PINCTRL_DRIVE10, HW_PINCTRL_DRIVE11,
> HW_PINCTRL_DRIVE12, HW_PINCTRL_DRIVE13 and HW_PINCTRL_DRIVE14 control the
> drive strength and the voltage selection for the DDR pins.
> 
> The reset values of the voltage selection pins are '1', which is marked as
> 'reserved' in the mx23 reference manual.
> 
> Clear these bits for proper operation of DDR.
> 
> Also change MUX_CONFIG_EMI, which results in better stability and match the
> bootlets code from Freescale.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

Lost of duplicated code here.

Best regards,
Marek Vasut
Fabio Estevam May 1, 2013, 11:53 p.m. UTC | #2 
On Wed, May 1, 2013 at 8:28 PM, Marek Vasut <marex@denx.de> wrote:

> Lost of duplicated code here.

What do you suggest?
Marek Vasut May 2, 2013, 12:14 a.m. UTC | #3 
Dear Fabio Estevam,

> On Wed, May 1, 2013 at 8:28 PM, Marek Vasut <marex@denx.de> wrote:
> > Lost of duplicated code here.
> 
> What do you suggest?

Stuff it into common init sequence, but only if it really is necessary to wipe 
those registers and iomux_setup[] table doesn't do it for some reason.

But then, if iomux_setup[] table doesn't configure them, there's a deeper 
problem.

Best regards,
Marek Vasut
Fabio Estevam May 2, 2013, 2:34 a.m. UTC | #4 
On Wed, May 1, 2013 at 9:14 PM, Marek Vasut <marex@denx.de> wrote:

> Stuff it into common init sequence, but only if it really is necessary to wipe
> those registers and iomux_setup[] table doesn't do it for some reason.
>
> But then, if iomux_setup[] table doesn't configure them, there's a deeper
> problem.

Right, I managed to fix this as you suggested (via iomux_setup).

Will send it in v2.

Thanks for reviewing it.
diff mbox

Patch

diff --git a/board/olimex/mx23_olinuxino/spl_boot.c b/board/olimex/mx23_olinuxino/spl_boot.c
index a96c293..5a43677 100644
--- a/board/olimex/mx23_olinuxino/spl_boot.c
+++ b/board/olimex/mx23_olinuxino/spl_boot.c
@@ -30,7 +30,7 @@ 
 #include <asm/arch/sys_proto.h>
 
 #define	MUX_CONFIG_EMI	(MXS_PAD_3V3 | MXS_PAD_16MA | MXS_PAD_PULLUP)
-#define	MUX_CONFIG_SSP	(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
+#define	MUX_CONFIG_SSP	MXS_PAD_12MA
 
 const iomux_cfg_t iomux_setup[] = {
 	/* DUART */
@@ -103,5 +103,16 @@  const iomux_cfg_t iomux_setup[] = {
 
 void board_init_ll(void)
 {
+	struct mxs_pinctrl_regs *pinctrl =
+		(struct mxs_pinctrl_regs *)MXS_PINCTRL_BASE;
+
+	/* Clear the voltage bits for EMI pins as the reset value is invalid */
+	writel(0, &pinctrl->drive9);
+	writel(0, &pinctrl->drive10);
+	writel(0, &pinctrl->drive11);
+	writel(0, &pinctrl->drive12);
+	writel(0, &pinctrl->drive13);
+	writel(0, &pinctrl->drive14);
+	writel(0, &pinctrl->drive9);
 	mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
 }