[16/42] KVM: Add KVM_IRQCHIP_NUM_PINS in addition to KVM_IOAPIC_NUM_PINS

The concept of routing interrupt lines to an irqchip is nothing
that is IOAPIC specific. Every irqchip has a maximum number of pins
that can be linked to irq lines.

So let's add a new define that allows us to reuse generic code for
non-IOAPIC platforms.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
---
 arch/x86/include/asm/kvm_host.h |    2 ++
 include/linux/kvm_host.h        |    2 +-
 virt/kvm/irq_comm.c             |    2 +-
 3 files changed, 4 insertions(+), 2 deletions(-)

On Fri, Apr 26, 2013 at 08:30:11PM +0200, Alexander Graf wrote:
> The concept of routing interrupt lines to an irqchip is nothing
> that is IOAPIC specific. Every irqchip has a maximum number of pins
> that can be linked to irq lines.
> 
> So let's add a new define that allows us to reuse generic code for
> non-IOAPIC platforms.
> 
> Signed-off-by: Alexander Graf <agraf@suse.de>
> Acked-by: Michael S. Tsirkin <mst@redhat.com>
> ---
>  arch/x86/include/asm/kvm_host.h |    2 ++
>  include/linux/kvm_host.h        |    2 +-
>  virt/kvm/irq_comm.c             |    2 +-
>  3 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index 18635ae..14337fa 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -43,6 +43,8 @@
>  #define KVM_PIO_PAGE_OFFSET 1
>  #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
>  
> +#define KVM_IRQCHIP_NUM_PINS  KVM_IOAPIC_NUM_PINS
> +
Still not ia64 define.

>  #define CR0_RESERVED_BITS                                               \
>  	(~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
>  			  | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
> diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
> index 93a5005..bf3b1dc 100644
> --- a/include/linux/kvm_host.h
> +++ b/include/linux/kvm_host.h
> @@ -307,7 +307,7 @@ struct kvm_kernel_irq_routing_entry {
>  #ifdef __KVM_HAVE_IOAPIC
>  
>  struct kvm_irq_routing_table {
> -	int chip[KVM_NR_IRQCHIPS][KVM_IOAPIC_NUM_PINS];
> +	int chip[KVM_NR_IRQCHIPS][KVM_IRQCHIP_NUM_PINS];
>  	struct kvm_kernel_irq_routing_entry *rt_entries;
>  	u32 nr_rt_entries;
>  	/*
> diff --git a/virt/kvm/irq_comm.c b/virt/kvm/irq_comm.c
> index 25ab480..7c0071d 100644
> --- a/virt/kvm/irq_comm.c
> +++ b/virt/kvm/irq_comm.c
> @@ -480,7 +480,7 @@ int kvm_set_irq_routing(struct kvm *kvm,
>  
>  	new->nr_rt_entries = nr_rt_entries;
>  	for (i = 0; i < 3; i++)
> -		for (j = 0; j < KVM_IOAPIC_NUM_PINS; j++)
> +		for (j = 0; j < KVM_IRQCHIP_NUM_PINS; j++)
>  			new->chip[i][j] = -1;
>  
>  	for (i = 0; i < nr; ++i) {
> -- 
> 1.6.0.2

--
			Gleb.
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On 28.04.2013, at 07:41, Gleb Natapov wrote:

> On Fri, Apr 26, 2013 at 08:30:11PM +0200, Alexander Graf wrote:
>> The concept of routing interrupt lines to an irqchip is nothing
>> that is IOAPIC specific. Every irqchip has a maximum number of pins
>> that can be linked to irq lines.
>> 
>> So let's add a new define that allows us to reuse generic code for
>> non-IOAPIC platforms.
>> 
>> Signed-off-by: Alexander Graf <agraf@suse.de>
>> Acked-by: Michael S. Tsirkin <mst@redhat.com>
>> ---
>> arch/x86/include/asm/kvm_host.h |    2 ++
>> include/linux/kvm_host.h        |    2 +-
>> virt/kvm/irq_comm.c             |    2 +-
>> 3 files changed, 4 insertions(+), 2 deletions(-)
>> 
>> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
>> index 18635ae..14337fa 100644
>> --- a/arch/x86/include/asm/kvm_host.h
>> +++ b/arch/x86/include/asm/kvm_host.h
>> @@ -43,6 +43,8 @@
>> #define KVM_PIO_PAGE_OFFSET 1
>> #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
>> 
>> +#define KVM_IRQCHIP_NUM_PINS  KVM_IOAPIC_NUM_PINS
>> +
> Still not ia64 define.

That follows in

  [PATCH 33/42] KVM: IA64: Carry non-ia64 changes into ia64


Alex

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