| Message ID | 515DA19D.1090508@mm-sol.com |
|---|---|
| State | Superseded |
| Delegated to: | Tom Rini |
| Headers | show |
On Thursday 04 April 2013 09:21 PM, Lubomir Popov wrote: > V2 fixes line wrap issue of the patch itself. > > This fix is needed (but not sufficient) for USB EHCI operation. > > Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> > > --- > arch/arm/cpu/armv7/omap5/hw_data.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c > index ced274e..e5e41fd 100644 > --- a/arch/arm/cpu/armv7/omap5/hw_data.c > +++ b/arch/arm/cpu/armv7/omap5/hw_data.c > @@ -403,6 +403,7 @@ void enable_basic_uboot_clocks(void) > }; > > u32 const clk_modules_hw_auto_essential[] = { > + (*prcm)->cm_l3init_hsusbtll_clkctrl, > 0 > }; > > @@ -411,7 +412,6 @@ void enable_basic_uboot_clocks(void) > (*prcm)->cm_l4per_i2c2_clkctrl, > (*prcm)->cm_l4per_i2c3_clkctrl, > (*prcm)->cm_l4per_i2c4_clkctrl, > - (*prcm)->cm_l3init_hsusbtll_clkctrl, > (*prcm)->cm_l3init_hsusbhost_clkctrl, > (*prcm)->cm_l3init_fsusb_clkctrl, > 0 No, how is this helping you. Are you using EHCI at SPL ? Those usb clocks are anyways getting enabled at u-boot. Regards, Sricharan
Hello Sricharan, On 08/04/13 09:05, Sricharan R wrote: > On Thursday 04 April 2013 09:21 PM, Lubomir Popov wrote: >> V2 fixes line wrap issue of the patch itself. >> >> This fix is needed (but not sufficient) for USB EHCI operation. >> >> Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> >> >> --- >> arch/arm/cpu/armv7/omap5/hw_data.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c >> index ced274e..e5e41fd 100644 >> --- a/arch/arm/cpu/armv7/omap5/hw_data.c >> +++ b/arch/arm/cpu/armv7/omap5/hw_data.c >> @@ -403,6 +403,7 @@ void enable_basic_uboot_clocks(void) >> }; >> >> u32 const clk_modules_hw_auto_essential[] = { >> + (*prcm)->cm_l3init_hsusbtll_clkctrl, >> 0 >> }; >> >> @@ -411,7 +412,6 @@ void enable_basic_uboot_clocks(void) >> (*prcm)->cm_l4per_i2c2_clkctrl, >> (*prcm)->cm_l4per_i2c3_clkctrl, >> (*prcm)->cm_l4per_i2c4_clkctrl, >> - (*prcm)->cm_l3init_hsusbtll_clkctrl, >> (*prcm)->cm_l3init_hsusbhost_clkctrl, >> (*prcm)->cm_l3init_fsusb_clkctrl, >> 0 > > No, how is this helping you. Are you using EHCI at SPL ? > Those usb clocks are anyways getting enabled at u-boot. > > Regards, > Sricharan > Why SPL? This is in the enable_basic_uboot_clocks() function. The problem seems to be _when_ are they enabled. This fix (moving cm_l3init_hsusbtll_clkctrl from the clk_modules_explicit_en_essential[] array to clk_modules_hw_auto_essential[]) is something confirmed empirically (apart from the fact that it is so for the OMAP4, which gave me the hint why USB was not working). The following dump is for the SOM5 EVB (http://patchwork.ozlabs.org/patch/232739/) with all needed patches applied (this one, as well as http://patchwork.ozlabs.org/patch/232742/). Functional clocks are enabled/disabled in the board file. The boot script just sets a MAC address for the USB Ethernet controller to env. U-Boot SPL 2013.04-rc1-00400-g7f594d9 (Apr 02 2013 - 14:55:24) OMAP5430 ES1.0 OMAP SD/MMC: 0 reading u-boot.img reading u-boot.img U-Boot 2013.04-rc1-00400-g7f594d9 (Apr 02 2013 - 14:55:24) CPU : OMAP5430 ES1.0 Board: MM Solutions SOM5 EVB I2C: ready DRAM: 2 GiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 Using default environment In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 mmc0 is current device reading boot.scr 109 bytes read in 3 ms (35.2 KiB/s) Running bootscript from mmc0 ... ## Executing script at 82000000 SOM5_EVB # SOM5_EVB # usb start (Re)start USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 6 USB Device(s) found scanning usb for storage devices... 3 Storage Device(s) found scanning usb for ethernet devices... 1 Ethernet Device(s) found SOM5_EVB # usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) | u-boot EHCI Host Controller | +-2 Mass Storage (480 Mb/s, 200mA) | FSC MEMORYBIRD USB2 C157040817120315AA | +-3 Hub (480 Mb/s, 2mA) | | | +-4 Mass Storage (480 Mb/s, 96mA) | | Generic Ultra Fast Media Reader 000000264001 | | | +-5 Mass Storage (480 Mb/s, 100mA) | Generic Mass Storage C88BB2CE | +-6 Vendor specific (480 Mb/s, 500mA) SOM5_EVB # Now, for the experiment, I just moved cm_l3init_hsusbtll_clkctrl back to clk_modules_explicit_en_essential[] and built again. As you can see, the result is a Data Abort exception: U-Boot SPL 2013.04-rc2-00020-g6b29a25-dirty (Apr 08 2013 - 11:14:14) OMAP5430 ES1.0 OMAP SD/MMC: 0 reading u-boot.img reading u-boot.img U-Boot 2013.04-rc2-00020-g6b29a25-dirty (Apr 08 2013 - 11:14:14) CPU : OMAP5430 ES1.0 Board: MM Solutions SOM5 EVB I2C: ready DRAM: 2 GiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 Using default environment In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 mmc0 is current device reading boot.scr 109 bytes read in 3 ms (35.2 KiB/s) Running bootscript from mmc0 ... ## Executing script at 82000000 SOM5_EVB # SOM5_EVB # usb start (Re)start USB... USB0: data abort MAYBE you should read doc/README.arm-unaligned-accesses pc : [<fef8f32c>] lr : [<fef738b4>] sp : feef2d50 ip : 00000034 fp : feef2dc4 r10: 00000000 r9 : fefbc0c4 r8 : feef2f40 r7 : 00000680 r6 : fefbc0c0 r5 : 000027da r4 : 4a062000 r3 : 00000000 r2 : 000027da r1 : 000027da r0 : 000027da Flags: nZcv IRQs off FIQs off Mode SVC_32 Resetting CPU ... resetting ... U-Boot SPL 2013.04-rc2-00020-g6b29a25-dirty (Apr 08 2013 - 11:14:14) OMAP5430 ES1.0 OMAP SD/MMC: 0 reading u-boot.img reading u-boot.img ... Best regards, Lubomir
Hi Lubomir, On Monday 08 April 2013 03:05 PM, Lubomir Popov wrote: > Hello Sricharan, > > On 08/04/13 09:05, Sricharan R wrote: >> On Thursday 04 April 2013 09:21 PM, Lubomir Popov wrote: >>> V2 fixes line wrap issue of the patch itself. >>> >>> This fix is needed (but not sufficient) for USB EHCI operation. >>> >>> Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> >>> >>> --- >>> arch/arm/cpu/armv7/omap5/hw_data.c | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c >>> index ced274e..e5e41fd 100644 >>> --- a/arch/arm/cpu/armv7/omap5/hw_data.c >>> +++ b/arch/arm/cpu/armv7/omap5/hw_data.c >>> @@ -403,6 +403,7 @@ void enable_basic_uboot_clocks(void) >>> }; >>> >>> u32 const clk_modules_hw_auto_essential[] = { >>> + (*prcm)->cm_l3init_hsusbtll_clkctrl, >>> 0 >>> }; >>> >>> @@ -411,7 +412,6 @@ void enable_basic_uboot_clocks(void) >>> (*prcm)->cm_l4per_i2c2_clkctrl, >>> (*prcm)->cm_l4per_i2c3_clkctrl, >>> (*prcm)->cm_l4per_i2c4_clkctrl, >>> - (*prcm)->cm_l3init_hsusbtll_clkctrl, >>> (*prcm)->cm_l3init_hsusbhost_clkctrl, >>> (*prcm)->cm_l3init_fsusb_clkctrl, >>> 0 >> >> No, how is this helping you. Are you using EHCI at SPL ? >> Those usb clocks are anyways getting enabled at u-boot. >> >> Regards, >> Sricharan >> > Hmm, i get it. The actual problem was usb_tll clocks does not support 'explicit en essential'. It supports only 'hw_auto' control. That's why moving it to the hw_auto array makes it to work. Acked-by: R Sricharan <r.sricharan@ti.com> Regards, Sricharan > Why SPL? This is in the enable_basic_uboot_clocks() function. The problem seems to be > _when_ are they enabled. > > This fix (moving cm_l3init_hsusbtll_clkctrl from the clk_modules_explicit_en_essential[] > array to clk_modules_hw_auto_essential[]) is something confirmed empirically (apart from > the fact that it is so for the OMAP4, which gave me the hint why USB was not working). > > The following dump is for the SOM5 EVB (http://patchwork.ozlabs.org/patch/232739/) with all > needed patches applied (this one, as well as http://patchwork.ozlabs.org/patch/232742/). > Functional clocks are enabled/disabled in the board file. The boot script just sets a MAC > address for the USB Ethernet controller to env. > > U-Boot SPL 2013.04-rc1-00400-g7f594d9 (Apr 02 2013 - 14:55:24) > OMAP5430 ES1.0 > OMAP SD/MMC: 0 > reading u-boot.img > reading u-boot.img > > > U-Boot 2013.04-rc1-00400-g7f594d9 (Apr 02 2013 - 14:55:24) > > CPU : OMAP5430 ES1.0 > Board: MM Solutions SOM5 EVB > I2C: ready > DRAM: 2 GiB > MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 > Using default environment > > In: serial > Out: serial > Err: serial > Net: No ethernet found. > Hit any key to stop autoboot: 0 > mmc0 is current device > reading boot.scr > 109 bytes read in 3 ms (35.2 KiB/s) > Running bootscript from mmc0 ... > ## Executing script at 82000000 > SOM5_EVB # > SOM5_EVB # usb start > (Re)start USB... > USB0: USB EHCI 1.00 > scanning bus 0 for devices... 6 USB Device(s) found > scanning usb for storage devices... 3 Storage Device(s) found > scanning usb for ethernet devices... 1 Ethernet Device(s) found > SOM5_EVB # usb tree > USB device tree: > 1 Hub (480 Mb/s, 0mA) > | u-boot EHCI Host Controller > | > +-2 Mass Storage (480 Mb/s, 200mA) > | FSC MEMORYBIRD USB2 C157040817120315AA > | > +-3 Hub (480 Mb/s, 2mA) > | | > | +-4 Mass Storage (480 Mb/s, 96mA) > | | Generic Ultra Fast Media Reader 000000264001 > | | > | +-5 Mass Storage (480 Mb/s, 100mA) > | Generic Mass Storage C88BB2CE > | > +-6 Vendor specific (480 Mb/s, 500mA) > > SOM5_EVB # > > Now, for the experiment, I just moved cm_l3init_hsusbtll_clkctrl back to > clk_modules_explicit_en_essential[] and built again. As you can see, the > result is a Data Abort exception: > > U-Boot SPL 2013.04-rc2-00020-g6b29a25-dirty (Apr 08 2013 - 11:14:14) > OMAP5430 ES1.0 > OMAP SD/MMC: 0 > reading u-boot.img > reading u-boot.img > > > U-Boot 2013.04-rc2-00020-g6b29a25-dirty (Apr 08 2013 - 11:14:14) > > CPU : OMAP5430 ES1.0 > Board: MM Solutions SOM5 EVB > I2C: ready > DRAM: 2 GiB > MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 > Using default environment > > In: serial > Out: serial > Err: serial > Net: No ethernet found. > Hit any key to stop autoboot: 0 > mmc0 is current device > reading boot.scr > 109 bytes read in 3 ms (35.2 KiB/s) > Running bootscript from mmc0 ... > ## Executing script at 82000000 > SOM5_EVB # > SOM5_EVB # usb start > (Re)start USB... > USB0: data abort > > MAYBE you should read doc/README.arm-unaligned-accesses > > pc : [<fef8f32c>] lr : [<fef738b4>] > sp : feef2d50 ip : 00000034 fp : feef2dc4 > r10: 00000000 r9 : fefbc0c4 r8 : feef2f40 > r7 : 00000680 r6 : fefbc0c0 r5 : 000027da r4 : 4a062000 > r3 : 00000000 r2 : 000027da r1 : 000027da r0 : 000027da > Flags: nZcv IRQs off FIQs off Mode SVC_32 > Resetting CPU ... > > resetting ... > > U-Boot SPL 2013.04-rc2-00020-g6b29a25-dirty (Apr 08 2013 - 11:14:14) > OMAP5430 ES1.0 > OMAP SD/MMC: 0 > reading u-boot.img > reading u-boot.img > > ... > > Best regards, > Lubomir
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index ced274e..e5e41fd 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -403,6 +403,7 @@ void enable_basic_uboot_clocks(void) }; u32 const clk_modules_hw_auto_essential[] = { + (*prcm)->cm_l3init_hsusbtll_clkctrl, 0 }; @@ -411,7 +412,6 @@ void enable_basic_uboot_clocks(void) (*prcm)->cm_l4per_i2c2_clkctrl, (*prcm)->cm_l4per_i2c3_clkctrl, (*prcm)->cm_l4per_i2c4_clkctrl, - (*prcm)->cm_l3init_hsusbtll_clkctrl, (*prcm)->cm_l3init_hsusbhost_clkctrl, (*prcm)->cm_l3init_fsusb_clkctrl, 0
V2 fixes line wrap issue of the patch itself. This fix is needed (but not sufficient) for USB EHCI operation. Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> --- arch/arm/cpu/armv7/omap5/hw_data.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)