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[03/10] target-i386: SSE4.2: fix pcmpXstri instructions

Message ID 1364324502-9124-4-git-send-email-aurelien@aurel32.net
State New
Headers show

Commit Message

Aurelien Jarno March 26, 2013, 7:01 p.m. UTC
ffs1 returns the first bit set to one starting counting from the most
significant bit.

pcmpXstri returns the most significant bit set to one, starting counting
from the least significant bit.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-i386/ops_sse.h |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Richard Henderson March 27, 2013, 8:10 p.m. UTC | #1
On 03/26/2013 12:01 PM, Aurelien Jarno wrote:
> ffs1 returns the first bit set to one starting counting from the most
> significant bit.
> 
> pcmpXstri returns the most significant bit set to one, starting counting
> from the least significant bit.
> 
> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
> ---
>  target-i386/ops_sse.h |    4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

I wonder if this ought not just be squashed with patch 10.
It would have made it easier to review, actually.  That said,

Reviewed-by: Richard Henderson <rth@twiddle.net>


r~
diff mbox

Patch

diff --git a/target-i386/ops_sse.h b/target-i386/ops_sse.h
index 0136df9..0667c87 100644
--- a/target-i386/ops_sse.h
+++ b/target-i386/ops_sse.h
@@ -2099,7 +2099,7 @@  void glue(helper_pcmpestri, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
                                  pcmp_elen(env, R_EAX, ctrl));
 
     if (res) {
-        env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1 : ffs1)(res) - 1;
+        env->regs[R_ECX] = (ctrl & (1 << 6)) ? rffs1(res) - 1 : 32 - ffs1(res);
     } else {
         env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
     }
@@ -2137,7 +2137,7 @@  void glue(helper_pcmpistri, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
                                  pcmp_ilen(d, ctrl));
 
     if (res) {
-        env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1 : ffs1)(res) - 1;
+        env->regs[R_ECX] = (ctrl & (1 << 6)) ? rffs1(res) - 1 : 32 - ffs1(res);
     } else {
         env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
     }