| Message ID | 1363361648-10326-1-git-send-email-ldewangan@nvidia.com |
|---|---|
| State | Accepted |
| Headers | show |
On 03/15/2013 09:34 AM, Laxman Dewangan wrote: > NVIDIA's Tegra SoC allows read/write of controller register only > if controller clock is enabled. System hangs if read/write happens > to registers without enabling clock. > > clk_prepare_enable() can be fail due to unknown reason and hence > adding check for return value of this function. If this function > success then only access register otherwise return to caller with > error. Wolfram, Reviewed-by: Stephen Warren <swarren@nvidia.com> This is probably suitable for Cc: stable. -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, Mar 15, 2013 at 09:04:08PM +0530, Laxman Dewangan wrote: > NVIDIA's Tegra SoC allows read/write of controller register only > if controller clock is enabled. System hangs if read/write happens > to registers without enabling clock. > > clk_prepare_enable() can be fail due to unknown reason and hence > adding check for return value of this function. If this function > success then only access register otherwise return to caller with > error. > > Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Applied to for-current, thanks! -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 36704e3..b714776 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -411,7 +411,11 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) int clk_multiplier = I2C_CLK_MULTIPLIER_STD_FAST_MODE; u32 clk_divisor; - tegra_i2c_clock_enable(i2c_dev); + err = tegra_i2c_clock_enable(i2c_dev); + if (err < 0) { + dev_err(i2c_dev->dev, "Clock enable failed %d\n", err); + return err; + } tegra_periph_reset_assert(i2c_dev->div_clk); udelay(2); @@ -628,7 +632,12 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], if (i2c_dev->is_suspended) return -EBUSY; - tegra_i2c_clock_enable(i2c_dev); + ret = tegra_i2c_clock_enable(i2c_dev); + if (ret < 0) { + dev_err(i2c_dev->dev, "Clock enable failed %d\n", ret); + return ret; + } + for (i = 0; i < num; i++) { enum msg_end_type end_type = MSG_END_STOP; if (i < (num - 1)) {
NVIDIA's Tegra SoC allows read/write of controller register only if controller clock is enabled. System hangs if read/write happens to registers without enabling clock. clk_prepare_enable() can be fail due to unknown reason and hence adding check for return value of this function. If this function success then only access register otherwise return to caller with error. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> --- drivers/i2c/busses/i2c-tegra.c | 13 +++++++++++-- 1 files changed, 11 insertions(+), 2 deletions(-)