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[U-Boot,v2,02/10] mx23: Document the tRAS lockout setting in memory initialization

Message ID 1360589756-26355-3-git-send-email-otavio@ossystems.com.br
State Changes Requested
Delegated to: Stefano Babic
Headers show

Commit Message

Otavio Salvador Feb. 11, 2013, 1:35 p.m. UTC
Add a comment about the tRAS lockout setting of HW_DRAM_CTL08 to
enable the 'Fast Auto Pre-Charge' found in the memory chip. The
setting is applied after memory initialization and it is worth
document it.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
---
Changes in v2:
- Extend code comment to explicit say it needs to be there.

 arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Marek Vasut Feb. 13, 2013, 9:12 p.m. UTC | #1
Dear Otavio Salvador,

> Add a comment about the tRAS lockout setting of HW_DRAM_CTL08 to
> enable the 'Fast Auto Pre-Charge' found in the memory chip. The
> setting is applied after memory initialization and it is worth
> document it.
> 
> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
> ---
> Changes in v2:
> - Extend code comment to explicit say it needs to be there.
> 
>  arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index f8392f6..1952eac 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> @@ -119,6 +119,7 @@ static void initialize_dram_values(void)
>  		writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
> 
>  #ifdef CONFIG_MX23
> +	/* Enable tRAS lockout in HW_DRAM_CTL08 ; it must be after all */

'After all'?

>  	writel((1 << 24), MXS_DRAM_BASE + (4 * 8));
>  #endif
>  }

Best regards,
Marek Vasut
Otavio Salvador Feb. 13, 2013, 9:20 p.m. UTC | #2
On Wed, Feb 13, 2013 at 7:12 PM, Marek Vasut <marex@denx.de> wrote:
> Dear Otavio Salvador,
>
>> Add a comment about the tRAS lockout setting of HW_DRAM_CTL08 to
>> enable the 'Fast Auto Pre-Charge' found in the memory chip. The
>> setting is applied after memory initialization and it is worth
>> document it.
>>
>> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
>> ---
>> Changes in v2:
>> - Extend code comment to explicit say it needs to be there.
>>
>>  arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
>> b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index f8392f6..1952eac 100644
>> --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
>> +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
>> @@ -119,6 +119,7 @@ static void initialize_dram_values(void)
>>               writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
>>
>>  #ifdef CONFIG_MX23
>> +     /* Enable tRAS lockout in HW_DRAM_CTL08 ; it must be after all */
>
> 'After all'?

For me it is clear enough; I am not native so it'd be good if a native
English speaker could comment on this.

>>       writel((1 << 24), MXS_DRAM_BASE + (4 * 8));
>>  #endif
>>  }
>
> Best regards,
> Marek Vasut
Fabio Estevam Feb. 13, 2013, 9:31 p.m. UTC | #3
On Wed, Feb 13, 2013 at 7:20 PM, Otavio Salvador
<otavio@ossystems.com.br> wrote:

>>>  #ifdef CONFIG_MX23
>>> +     /* Enable tRAS lockout in HW_DRAM_CTL08 ; it must be after all */
>>
>> 'After all'?
>
> For me it is clear enough; I am not native so it'd be good if a native
> English speaker could comment on this.

I think you meant to say "it must be the last element".
diff mbox

Patch

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index f8392f6..1952eac 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -119,6 +119,7 @@  static void initialize_dram_values(void)
 		writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
 
 #ifdef CONFIG_MX23
+	/* Enable tRAS lockout in HW_DRAM_CTL08 ; it must be after all */
 	writel((1 << 24), MXS_DRAM_BASE + (4 * 8));
 #endif
 }