| Message ID | 1360603051-29478-2-git-send-email-twarren@nvidia.com |
|---|---|
| State | Superseded |
| Delegated to: | Tom Warren |
| Headers | show |
Hi Tom, Am Montag, den 11.02.2013, 10:17 -0700 schrieb Tom Warren: > Linux dts files were used for those boards that didn't already > have sdhci info populated. Tamonten has their own dtsi file with > common sdhci nodes (sourced from Linux). > > Signed-off-by: Tom Warren <twarren@nvidia.com> > --- > v2: > - cleanup comments in dts files/match w/kernel files > - add sdhci aliases in all dts files > - use tegra20-tamonten.dtsi from the kernel for AD boards > > arch/arm/dts/tegra20-tamonten.dtsi | 489 ++++++++++++++++++++++ I'm not sure if pushing the whole file in this patch is the right thing to do. > arch/arm/dts/tegra20.dtsi | 16 +- > board/avionic-design/dts/tegra20-medcom-wide.dts | 1 + > board/avionic-design/dts/tegra20-plutux.dts | 1 + > board/avionic-design/dts/tegra20-tec.dts | 1 + > board/compal/dts/tegra20-paz00.dts | 19 +- > board/compulab/dts/tegra20-trimslice.dts | 14 + > board/nvidia/dts/tegra20-harmony.dts | 18 + > board/nvidia/dts/tegra20-seaboard.dts | 12 +- > board/nvidia/dts/tegra20-ventana.dts | 15 + > board/nvidia/dts/tegra20-whistler.dts | 13 + > board/toradex/dts/tegra20-colibri_t20_iris.dts | 6 + > 12 files changed, 595 insertions(+), 10 deletions(-) > create mode 100644 arch/arm/dts/tegra20-tamonten.dtsi > [...] > diff --git a/board/toradex/dts/tegra20-colibri_t20_iris.dts b/board/toradex/dts/tegra20-colibri_t20_iris.dts > index c29b43a..0dd4c43 100644 > --- a/board/toradex/dts/tegra20-colibri_t20_iris.dts > +++ b/board/toradex/dts/tegra20-colibri_t20_iris.dts > @@ -10,6 +10,7 @@ > usb0 = "/usb@c5008000"; > usb1 = "/usb@c5000000"; > usb2 = "/usb@c5004000"; > + sdhci0 = "/sdhci@c8000600"; > }; > > usb@c5000000 { > @@ -35,4 +36,9 @@ > compatible = "nand-flash"; > }; > }; > + > + sdhci@c8000600 { > + status = "okay"; > + bus-width = <4>; You are missing the CD GPIO here. It's PC7. > + }; > }; Regards, Lucas
Lucas, On Mon, Feb 11, 2013 at 10:28 AM, Lucas Stach <dev@lynxeye.de> wrote: > Hi Tom, > > Am Montag, den 11.02.2013, 10:17 -0700 schrieb Tom Warren: >> Linux dts files were used for those boards that didn't already >> have sdhci info populated. Tamonten has their own dtsi file with >> common sdhci nodes (sourced from Linux). >> >> Signed-off-by: Tom Warren <twarren@nvidia.com> >> --- >> v2: >> - cleanup comments in dts files/match w/kernel files >> - add sdhci aliases in all dts files >> - use tegra20-tamonten.dtsi from the kernel for AD boards >> >> arch/arm/dts/tegra20-tamonten.dtsi | 489 ++++++++++++++++++++++ > > I'm not sure if pushing the whole file in this patch is the right thing > to do. I didn't want to edit it since we seem to be moving towards using the Linux DTS files in toto in U-Boot (as per Stephen & Simon). Does it do any harm to have the whole thing here? Saves some work later. Thierry - what do you think? > >> arch/arm/dts/tegra20.dtsi | 16 +- >> board/avionic-design/dts/tegra20-medcom-wide.dts | 1 + >> board/avionic-design/dts/tegra20-plutux.dts | 1 + >> board/avionic-design/dts/tegra20-tec.dts | 1 + >> board/compal/dts/tegra20-paz00.dts | 19 +- >> board/compulab/dts/tegra20-trimslice.dts | 14 + >> board/nvidia/dts/tegra20-harmony.dts | 18 + >> board/nvidia/dts/tegra20-seaboard.dts | 12 +- >> board/nvidia/dts/tegra20-ventana.dts | 15 + >> board/nvidia/dts/tegra20-whistler.dts | 13 + >> board/toradex/dts/tegra20-colibri_t20_iris.dts | 6 + >> 12 files changed, 595 insertions(+), 10 deletions(-) >> create mode 100644 arch/arm/dts/tegra20-tamonten.dtsi >> > [...] >> diff --git a/board/toradex/dts/tegra20-colibri_t20_iris.dts b/board/toradex/dts/tegra20-colibri_t20_iris.dts >> index c29b43a..0dd4c43 100644 >> --- a/board/toradex/dts/tegra20-colibri_t20_iris.dts >> +++ b/board/toradex/dts/tegra20-colibri_t20_iris.dts >> @@ -10,6 +10,7 @@ >> usb0 = "/usb@c5008000"; >> usb1 = "/usb@c5000000"; >> usb2 = "/usb@c5004000"; >> + sdhci0 = "/sdhci@c8000600"; >> }; >> >> usb@c5000000 { >> @@ -35,4 +36,9 @@ >> compatible = "nand-flash"; >> }; >> }; >> + >> + sdhci@c8000600 { >> + status = "okay"; >> + bus-width = <4>; > You are missing the CD GPIO here. It's PC7. Thanks, I'll add it. Tom > >> + }; >> }; > > Regards, > Lucas > >
Am Montag, den 11.02.2013, 10:56 -0700 schrieb Tom Warren: > Lucas, > > On Mon, Feb 11, 2013 at 10:28 AM, Lucas Stach <dev@lynxeye.de> wrote: > > Hi Tom, > > > > Am Montag, den 11.02.2013, 10:17 -0700 schrieb Tom Warren: > >> Linux dts files were used for those boards that didn't already > >> have sdhci info populated. Tamonten has their own dtsi file with > >> common sdhci nodes (sourced from Linux). > >> > >> Signed-off-by: Tom Warren <twarren@nvidia.com> > >> --- > >> v2: > >> - cleanup comments in dts files/match w/kernel files > >> - add sdhci aliases in all dts files > >> - use tegra20-tamonten.dtsi from the kernel for AD boards > >> > >> arch/arm/dts/tegra20-tamonten.dtsi | 489 ++++++++++++++++++++++ > > > > I'm not sure if pushing the whole file in this patch is the right thing > > to do. > > I didn't want to edit it since we seem to be moving towards using the > Linux DTS files in toto in U-Boot (as per Stephen & Simon). Does it do > any harm to have the whole thing here? Saves some work later. Thierry > - what do you think? > I'm not objecting against pulling in the kernel dtsi in general, as I think most of the things in there like pinmux will become handy in a bit. I would just like to see this huge chunk in a separate patch and this one would then just add the aliases. Regards, Lucas
On Mon, Feb 11, 2013 at 10:56:33AM -0700, Tom Warren wrote: > Lucas, > > On Mon, Feb 11, 2013 at 10:28 AM, Lucas Stach <dev@lynxeye.de> wrote: > > Hi Tom, > > > > Am Montag, den 11.02.2013, 10:17 -0700 schrieb Tom Warren: > >> Linux dts files were used for those boards that didn't already > >> have sdhci info populated. Tamonten has their own dtsi file with > >> common sdhci nodes (sourced from Linux). > >> > >> Signed-off-by: Tom Warren <twarren@nvidia.com> > >> --- > >> v2: > >> - cleanup comments in dts files/match w/kernel files > >> - add sdhci aliases in all dts files > >> - use tegra20-tamonten.dtsi from the kernel for AD boards > >> > >> arch/arm/dts/tegra20-tamonten.dtsi | 489 ++++++++++++++++++++++ > > > > I'm not sure if pushing the whole file in this patch is the right thing > > to do. > > I didn't want to edit it since we seem to be moving towards using the > Linux DTS files in toto in U-Boot (as per Stephen & Simon). Does it do > any harm to have the whole thing here? Saves some work later. Thierry > - what do you think? Given that it isn't used anywhere I don't think we really need it right now. We can always add it later when we can make better use of it. Thierry
Thierry/Lucas, On Mon, Feb 11, 2013 at 12:11 PM, Thierry Reding <thierry.reding@avionic-design.de> wrote: > On Mon, Feb 11, 2013 at 10:56:33AM -0700, Tom Warren wrote: >> Lucas, >> >> On Mon, Feb 11, 2013 at 10:28 AM, Lucas Stach <dev@lynxeye.de> wrote: >> > Hi Tom, >> > >> > Am Montag, den 11.02.2013, 10:17 -0700 schrieb Tom Warren: >> >> Linux dts files were used for those boards that didn't already >> >> have sdhci info populated. Tamonten has their own dtsi file with >> >> common sdhci nodes (sourced from Linux). >> >> >> >> Signed-off-by: Tom Warren <twarren@nvidia.com> >> >> --- >> >> v2: >> >> - cleanup comments in dts files/match w/kernel files >> >> - add sdhci aliases in all dts files >> >> - use tegra20-tamonten.dtsi from the kernel for AD boards >> >> >> >> arch/arm/dts/tegra20-tamonten.dtsi | 489 ++++++++++++++++++++++ >> > >> > I'm not sure if pushing the whole file in this patch is the right thing >> > to do. >> >> I didn't want to edit it since we seem to be moving towards using the >> Linux DTS files in toto in U-Boot (as per Stephen & Simon). Does it do >> any harm to have the whole thing here? Saves some work later. Thierry >> - what do you think? > > Given that it isn't used anywhere I don't think we really need it right > now. We can always add it later when we can make better use of it. It actually is used (for SDMMC/sdhci) now, Thierry. That's why it's in this patchset. I had originally put the sdhci node for Avionic Design boards in their respective .dts files, but Stephen pointed out that the kernel had a tegra20-tamonten.dtsi file with common info, which included the sdhci node, and asked that I use it, instead, so we echo the kernel layout. So I pulled that file into my MMC DT patchset, and used it in all AD board builds (medcom/tec/plutux) - it's pulled in via an override of CONFIG_ARCH_DEVICE_TREE in the config files. So the options seem to be: a) Don't use the tamonton dtsi file, and put the sdhci nodes in the AD dts files, just like all other boards (this was my V1 approach). Vetoed by Stephen. b) Use tegra20-tamonten.dtsi as is, identical to the kernel file. If necessary, I can move it's inclusion to a separate patch, independent of the MMC DT patchset, as suggested by Lucas. c) Use tegra20-tamonten.dtsi, but just with the sdhci node (is this what you're suggesting, Thierry?). I'd still pull it in via a CONFIG_ARCH_DEVICE_TREE #define in the AD config files. Let me know ASAP - I'd like to get V3 upstreamed soon so I can move on to work on the T30/T114 MMC patches. Tom > > Thierry
On Mon, Feb 11, 2013 at 12:21:59PM -0700, Tom Warren wrote: > Thierry/Lucas, > > On Mon, Feb 11, 2013 at 12:11 PM, Thierry Reding > <thierry.reding@avionic-design.de> wrote: > > On Mon, Feb 11, 2013 at 10:56:33AM -0700, Tom Warren wrote: > >> Lucas, > >> > >> On Mon, Feb 11, 2013 at 10:28 AM, Lucas Stach <dev@lynxeye.de> wrote: > >> > Hi Tom, > >> > > >> > Am Montag, den 11.02.2013, 10:17 -0700 schrieb Tom Warren: > >> >> Linux dts files were used for those boards that didn't already > >> >> have sdhci info populated. Tamonten has their own dtsi file with > >> >> common sdhci nodes (sourced from Linux). > >> >> > >> >> Signed-off-by: Tom Warren <twarren@nvidia.com> > >> >> --- > >> >> v2: > >> >> - cleanup comments in dts files/match w/kernel files > >> >> - add sdhci aliases in all dts files > >> >> - use tegra20-tamonten.dtsi from the kernel for AD boards > >> >> > >> >> arch/arm/dts/tegra20-tamonten.dtsi | 489 ++++++++++++++++++++++ > >> > > >> > I'm not sure if pushing the whole file in this patch is the right thing > >> > to do. > >> > >> I didn't want to edit it since we seem to be moving towards using the > >> Linux DTS files in toto in U-Boot (as per Stephen & Simon). Does it do > >> any harm to have the whole thing here? Saves some work later. Thierry > >> - what do you think? > > > > Given that it isn't used anywhere I don't think we really need it right > > now. We can always add it later when we can make better use of it. > > It actually is used (for SDMMC/sdhci) now, Thierry. That's why it's in > this patchset. Right, I hadn't looked at that patch yet. > I had originally put the sdhci node for Avionic Design > boards in their respective .dts files, but Stephen pointed out that > the kernel had a tegra20-tamonten.dtsi file with common info, which > included the sdhci node, and asked that I use it, instead, so we echo > the kernel layout. So I pulled that file into my MMC DT patchset, and > used it in all AD board builds (medcom/tec/plutux) - it's pulled in > via an override of CONFIG_ARCH_DEVICE_TREE in the config files. > > So the options seem to be: > > a) Don't use the tamonton dtsi file, and put the sdhci nodes in the AD > dts files, just like all other boards (this was my V1 approach). > Vetoed by Stephen. > b) Use tegra20-tamonten.dtsi as is, identical to the kernel file. If > necessary, I can move it's inclusion to a separate patch, independent > of the MMC DT patchset, as suggested by Lucas. > c) Use tegra20-tamonten.dtsi, but just with the sdhci node (is this > what you're suggesting, Thierry?). I'd still pull it in via a > CONFIG_ARCH_DEVICE_TREE #define in the AD config files. > > Let me know ASAP - I'd like to get V3 upstreamed soon so I can move on > to work on the T30/T114 MMC patches. I think option b) sounds fine given that we want to move to the same DTS as the kernel eventually anyway. So for the Tamonten (and AD board) pieces, consider this: Acked-by: Thierry Reding <thierry.reding@avionic-design.de> I can't give you a Tested-by because I have a bunch of other things to take care of and I probably won't get to testing this for a few days. Thierry
On 02/11/2013 12:21 PM, Tom Warren wrote: ... > So the options seem to be: > > a) Don't use the tamonton dtsi file, and put the sdhci nodes in the AD > dts files, just like all other boards (this was my V1 approach). > Vetoed by Stephen. > b) Use tegra20-tamonten.dtsi as is, identical to the kernel file. If > necessary, I can move it's inclusion to a separate patch, independent > of the MMC DT patchset, as suggested by Lucas. That option looks fine to me. The initial check-in of the .dts file should definitely be a separate patch. Does U-boot actually work correctly if you give it the kernel DT? There are quite a few quirks that U-Boot relies on IIRC...
On 02/11/2013 10:17 AM, Tom Warren wrote: > Linux dts files were used for those boards that didn't already > have sdhci info populated. Tamonten has their own dtsi file with > common sdhci nodes (sourced from Linux). > diff --git a/board/nvidia/dts/tegra20-seaboard.dts b/board/nvidia/dts/tegra20-seaboard.dts > sdhci@c8000400 { > + status = "okay"; > cd-gpios = <&gpio 69 0>; /* gpio PI5 */ > wp-gpios = <&gpio 57 0>; /* gpio PH1 */ > - power-gpios = <&gpio 70 0>; /* gpio PI6 */ > + power-gpios = <&gpio 70 3>; /* gpio PI6 */ > + bus-width = <4>; > }; The "3" for the power-gpios flags looks odd, and doesn't match the kernel. The binding only defines bit 0 for inverted, and doesn't define bit 1.
Stephen, On Tue, Feb 12, 2013 at 1:29 PM, Stephen Warren <swarren@wwwdotorg.org> wrote: > On 02/11/2013 10:17 AM, Tom Warren wrote: >> Linux dts files were used for those boards that didn't already >> have sdhci info populated. Tamonten has their own dtsi file with >> common sdhci nodes (sourced from Linux). > >> diff --git a/board/nvidia/dts/tegra20-seaboard.dts b/board/nvidia/dts/tegra20-seaboard.dts > >> sdhci@c8000400 { >> + status = "okay"; >> cd-gpios = <&gpio 69 0>; /* gpio PI5 */ >> wp-gpios = <&gpio 57 0>; /* gpio PH1 */ >> - power-gpios = <&gpio 70 0>; /* gpio PI6 */ >> + power-gpios = <&gpio 70 3>; /* gpio PI6 */ >> + bus-width = <4>; >> }; > > The "3" for the power-gpios flags looks odd, and doesn't match the > kernel. The binding only defines bit 0 for inverted, and doesn't define > bit 1. That came from our internal U-Boot repo - don't know why it's setting it as an output and asserted and no other Seaboard DT file does. I'll look into it. Thanks
diff --git a/arch/arm/dts/tegra20-tamonten.dtsi b/arch/arm/dts/tegra20-tamonten.dtsi new file mode 100644 index 0000000..4766aba --- /dev/null +++ b/arch/arm/dts/tegra20-tamonten.dtsi @@ -0,0 +1,489 @@ +/include/ "tegra20.dtsi" + +/ { + model = "Avionic Design Tamonten SOM"; + compatible = "ad,tamonten", "nvidia,tegra20"; + + memory { + reg = <0x00000000 0x20000000>; + }; + + host1x { + hdmi { + vdd-supply = <&hdmi_vdd_reg>; + pll-supply = <&hdmi_pll_reg>; + + nvidia,ddc-i2c-bus = <&hdmi_ddc>; + nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ + }; + }; + + pinmux { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + ata { + nvidia,pins = "ata"; + nvidia,function = "ide"; + }; + atb { + nvidia,pins = "atb", "gma", "gme"; + nvidia,function = "sdio4"; + }; + atc { + nvidia,pins = "atc"; + nvidia,function = "nand"; + }; + atd { + nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu", + "spia", "spib", "spic"; + nvidia,function = "gmi"; + }; + cdev1 { + nvidia,pins = "cdev1"; + nvidia,function = "plla_out"; + }; + cdev2 { + nvidia,pins = "cdev2"; + nvidia,function = "pllp_out4"; + }; + crtp { + nvidia,pins = "crtp"; + nvidia,function = "crt"; + }; + csus { + nvidia,pins = "csus"; + nvidia,function = "vi_sensor_clk"; + }; + dap1 { + nvidia,pins = "dap1"; + nvidia,function = "dap1"; + }; + dap2 { + nvidia,pins = "dap2"; + nvidia,function = "dap2"; + }; + dap3 { + nvidia,pins = "dap3"; + nvidia,function = "dap3"; + }; + dap4 { + nvidia,pins = "dap4"; + nvidia,function = "dap4"; + }; + dta { + nvidia,pins = "dta", "dtd"; + nvidia,function = "sdio2"; + }; + dtb { + nvidia,pins = "dtb", "dtc", "dte"; + nvidia,function = "rsvd1"; + }; + dtf { + nvidia,pins = "dtf"; + nvidia,function = "i2c3"; + }; + gmc { + nvidia,pins = "gmc"; + nvidia,function = "uartd"; + }; + gpu7 { + nvidia,pins = "gpu7"; + nvidia,function = "rtck"; + }; + gpv { + nvidia,pins = "gpv", "slxa", "slxk"; + nvidia,function = "pcie"; + }; + hdint { + nvidia,pins = "hdint"; + nvidia,function = "hdmi"; + }; + i2cp { + nvidia,pins = "i2cp"; + nvidia,function = "i2cp"; + }; + irrx { + nvidia,pins = "irrx", "irtx"; + nvidia,function = "uarta"; + }; + kbca { + nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", + "kbce", "kbcf"; + nvidia,function = "kbc"; + }; + lcsn { + nvidia,pins = "lcsn", "ld0", "ld1", "ld2", + "ld3", "ld4", "ld5", "ld6", "ld7", + "ld8", "ld9", "ld10", "ld11", "ld12", + "ld13", "ld14", "ld15", "ld16", "ld17", + "ldc", "ldi", "lhp0", "lhp1", "lhp2", + "lhs", "lm0", "lm1", "lpp", "lpw0", + "lpw1", "lpw2", "lsc0", "lsc1", "lsck", + "lsda", "lsdi", "lspi", "lvp0", "lvp1", + "lvs"; + nvidia,function = "displaya"; + }; + owc { + nvidia,pins = "owc", "spdi", "spdo", "uac"; + nvidia,function = "rsvd2"; + }; + pmc { + nvidia,pins = "pmc"; + nvidia,function = "pwr_on"; + }; + rm { + nvidia,pins = "rm"; + nvidia,function = "i2c1"; + }; + sdb { + nvidia,pins = "sdb", "sdc", "sdd"; + nvidia,function = "pwm"; + }; + sdio1 { + nvidia,pins = "sdio1"; + nvidia,function = "sdio1"; + }; + slxc { + nvidia,pins = "slxc", "slxd"; + nvidia,function = "spdif"; + }; + spid { + nvidia,pins = "spid", "spie", "spif"; + nvidia,function = "spi1"; + }; + spig { + nvidia,pins = "spig", "spih"; + nvidia,function = "spi2_alt"; + }; + uaa { + nvidia,pins = "uaa", "uab", "uda"; + nvidia,function = "ulpi"; + }; + uad { + nvidia,pins = "uad"; + nvidia,function = "irda"; + }; + uca { + nvidia,pins = "uca", "ucb"; + nvidia,function = "uartc"; + }; + conf_ata { + nvidia,pins = "ata", "atb", "atc", "atd", "ate", + "cdev1", "cdev2", "dap1", "dtb", "gma", + "gmb", "gmc", "gmd", "gme", "gpu7", + "gpv", "i2cp", "pta", "rm", "slxa", + "slxk", "spia", "spib", "uac"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + conf_ck32 { + nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", + "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; + nvidia,pull = <0>; + }; + conf_csus { + nvidia,pins = "csus", "spid", "spif"; + nvidia,pull = <1>; + nvidia,tristate = <1>; + }; + conf_crtp { + nvidia,pins = "crtp", "dap2", "dap3", "dap4", + "dtc", "dte", "dtf", "gpu", "sdio1", + "slxc", "slxd", "spdi", "spdo", "spig", + "uda"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + }; + conf_ddc { + nvidia,pins = "ddc", "dta", "dtd", "kbca", + "kbcb", "kbcc", "kbcd", "kbce", "kbcf", + "sdc"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + }; + conf_hdint { + nvidia,pins = "hdint", "lcsn", "ldc", "lm1", + "lpw1", "lsc1", "lsck", "lsda", "lsdi", + "lvp0", "owc", "sdb"; + nvidia,tristate = <1>; + }; + conf_irrx { + nvidia,pins = "irrx", "irtx", "sdd", "spic", + "spie", "spih", "uaa", "uab", "uad", + "uca", "ucb"; + nvidia,pull = <2>; + nvidia,tristate = <1>; + }; + conf_lc { + nvidia,pins = "lc", "ls"; + nvidia,pull = <2>; + }; + conf_ld0 { + nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", + "ld5", "ld6", "ld7", "ld8", "ld9", + "ld10", "ld11", "ld12", "ld13", "ld14", + "ld15", "ld16", "ld17", "ldi", "lhp0", + "lhp1", "lhp2", "lhs", "lm0", "lpp", + "lpw0", "lpw2", "lsc0", "lspi", "lvp1", + "lvs", "pmc"; + nvidia,tristate = <0>; + }; + conf_ld17_0 { + nvidia,pins = "ld17_0", "ld19_18", "ld21_20", + "ld23_22"; + nvidia,pull = <1>; + }; + }; + + state_i2cmux_ddc: pinmux_i2cmux_ddc { + ddc { + nvidia,pins = "ddc"; + nvidia,function = "i2c2"; + }; + pta { + nvidia,pins = "pta"; + nvidia,function = "rsvd4"; + }; + }; + + state_i2cmux_pta: pinmux_i2cmux_pta { + ddc { + nvidia,pins = "ddc"; + nvidia,function = "rsvd4"; + }; + pta { + nvidia,pins = "pta"; + nvidia,function = "i2c2"; + }; + }; + + state_i2cmux_idle: pinmux_i2cmux_idle { + ddc { + nvidia,pins = "ddc"; + nvidia,function = "rsvd4"; + }; + pta { + nvidia,pins = "pta"; + nvidia,function = "rsvd4"; + }; + }; + }; + + i2s@70002800 { + status = "okay"; + }; + + serial@70006300 { + status = "okay"; + }; + + i2c@7000c000 { + clock-frequency = <400000>; + status = "okay"; + }; + + i2c@7000c400 { + clock-frequency = <100000>; + status = "okay"; + }; + + i2cmux { + compatible = "i2c-mux-pinctrl"; + #address-cells = <1>; + #size-cells = <0>; + + i2c-parent = <&{/i2c@7000c400}>; + + pinctrl-names = "ddc", "pta", "idle"; + pinctrl-0 = <&state_i2cmux_ddc>; + pinctrl-1 = <&state_i2cmux_pta>; + pinctrl-2 = <&state_i2cmux_idle>; + + hdmi_ddc: i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + i2c@7000d000 { + clock-frequency = <400000>; + status = "okay"; + + pmic: tps6586x@34 { + compatible = "ti,tps6586x"; + reg = <0x34>; + interrupts = <0 86 0x4>; + + ti,system-power-controller; + + #gpio-cells = <2>; + gpio-controller; + + sys-supply = <&vdd_5v0_reg>; + vin-sm0-supply = <&sys_reg>; + vin-sm1-supply = <&sys_reg>; + vin-sm2-supply = <&sys_reg>; + vinldo01-supply = <&sm2_reg>; + vinldo23-supply = <&sm2_reg>; + vinldo4-supply = <&sm2_reg>; + vinldo678-supply = <&sm2_reg>; + vinldo9-supply = <&sm2_reg>; + + regulators { + sys_reg: sys { + regulator-name = "vdd_sys"; + regulator-always-on; + }; + + sm0 { + regulator-name = "vdd_sys_sm0,vdd_core"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + sm1 { + regulator-name = "vdd_sys_sm1,vdd_cpu"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + sm2_reg: sm2 { + regulator-name = "vdd_sys_sm2,vin_ldo*"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + regulator-always-on; + }; + + ldo0 { + regulator-name = "vdd_ldo0,vddio_pex_clk"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo1 { + regulator-name = "vdd_ldo1,avdd_pll*"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + }; + + ldo2 { + regulator-name = "vdd_ldo2,vdd_rtc"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + ldo3 { + regulator-name = "vdd_ldo3,avdd_usb*"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + ldo4 { + regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo5 { + regulator-name = "vdd_ldo5,vcore_mmc"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + ldo6 { + regulator-name = "vdd_ldo6,avdd_vdac"; + /* + * According to the Tegra 2 Automotive + * DataSheet, a typical value for this + * would be 2.8V, but the PMIC only + * supports 2.85V. + */ + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + hdmi_vdd_reg: ldo7 { + regulator-name = "vdd_ldo7,avdd_hdmi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + hdmi_pll_reg: ldo8 { + regulator-name = "vdd_ldo8,avdd_hdmi_pll"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo9 { + regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam"; + /* + * According to the Tegra 2 Automotive + * DataSheet, a typical value for this + * would be 2.8V, but the PMIC only + * supports 2.85V. + */ + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + }; + + ldo_rtc { + regulator-name = "vdd_rtc_out"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; + + temperature-sensor@4c { + compatible = "onnn,nct1008"; + reg = <0x4c>; + }; + }; + + pmc { + nvidia,invert-interrupt; + }; + + usb@c5008000 { + status = "okay"; + }; + + sdhci@c8000600 { + cd-gpios = <&gpio 58 0>; /* gpio PH2 */ + wp-gpios = <&gpio 59 0>; /* gpio PH3 */ + bus-width = <4>; + status = "okay"; + }; + + regulators { + compatible = "simple-bus"; + + #address-cells = <1>; + #size-cells = <0>; + + vdd_5v0_reg: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "vdd_5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + }; +}; diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi index 9a89685..982a070 100644 --- a/arch/arm/dts/tegra20.dtsi +++ b/arch/arm/dts/tegra20.dtsi @@ -318,24 +318,32 @@ sdhci@c8000000 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000000 0x200>; - interrupts = < 46 >; + interrupts = <0 14 0x04>; + clocks = <&tegra_car 14>; + status = "disabled"; }; sdhci@c8000200 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000200 0x200>; - interrupts = < 47 >; + interrupts = <0 15 0x04>; + clocks = <&tegra_car 9>; + status = "disabled"; }; sdhci@c8000400 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000400 0x200>; - interrupts = < 51 >; + interrupts = <0 19 0x04>; + clocks = <&tegra_car 69>; + status = "disabled"; }; sdhci@c8000600 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000600 0x200>; - interrupts = < 63 >; + interrupts = <0 31 0x04>; + clocks = <&tegra_car 15>; + status = "disabled"; }; }; diff --git a/board/avionic-design/dts/tegra20-medcom-wide.dts b/board/avionic-design/dts/tegra20-medcom-wide.dts index e46afbe..2444f67 100644 --- a/board/avionic-design/dts/tegra20-medcom-wide.dts +++ b/board/avionic-design/dts/tegra20-medcom-wide.dts @@ -8,6 +8,7 @@ aliases { usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; }; memory { diff --git a/board/avionic-design/dts/tegra20-plutux.dts b/board/avionic-design/dts/tegra20-plutux.dts index 3e6cce0..a9dbdc3 100644 --- a/board/avionic-design/dts/tegra20-plutux.dts +++ b/board/avionic-design/dts/tegra20-plutux.dts @@ -8,6 +8,7 @@ aliases { usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; }; memory { diff --git a/board/avionic-design/dts/tegra20-tec.dts b/board/avionic-design/dts/tegra20-tec.dts index bf3ff1d..6afdd5b 100644 --- a/board/avionic-design/dts/tegra20-tec.dts +++ b/board/avionic-design/dts/tegra20-tec.dts @@ -8,6 +8,7 @@ aliases { usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; }; memory { diff --git a/board/compal/dts/tegra20-paz00.dts b/board/compal/dts/tegra20-paz00.dts index 31b064d..6476940 100644 --- a/board/compal/dts/tegra20-paz00.dts +++ b/board/compal/dts/tegra20-paz00.dts @@ -3,11 +3,13 @@ /include/ ARCH_CPU_DTS / { - model = "Toshiba AC100 / Dynabook AZ"; - compatible = "compal,paz00", "nvidia,tegra20"; + model = "Toshiba AC100 / Dynabook AZ"; + compatible = "compal,paz00", "nvidia,tegra20"; aliases { usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000000"; }; memory { @@ -53,6 +55,19 @@ status = "disabled"; }; + sdhci@c8000000 { + status = "okay"; + cd-gpios = <&gpio 173 0>; /* gpio PV5 */ + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ + power-gpios = <&gpio 169 0>; /* gpio PV1 */ + bus-width = <4>; + }; + + sdhci@c8000600 { + status = "okay"; + bus-width = <8>; + }; + lcd_panel: panel { /* PAZ00 has 1024x600 */ clock = <54030000>; diff --git a/board/compulab/dts/tegra20-trimslice.dts b/board/compulab/dts/tegra20-trimslice.dts index 7aeed67..2957f45 100644 --- a/board/compulab/dts/tegra20-trimslice.dts +++ b/board/compulab/dts/tegra20-trimslice.dts @@ -9,6 +9,8 @@ aliases { usb0 = "/usb@c5008000"; usb1 = "/usb@c5000000"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000000"; }; memory { @@ -47,4 +49,16 @@ usb@c5004000 { status = "disabled"; }; + + sdhci@c8000000 { + status = "okay"; + bus-width = <4>; + }; + + sdhci@c8000600 { + status = "okay"; + cd-gpios = <&gpio 121 0>; /* gpio PP1 */ + wp-gpios = <&gpio 122 0>; /* gpio PP2 */ + bus-width = <4>; + }; }; diff --git a/board/nvidia/dts/tegra20-harmony.dts b/board/nvidia/dts/tegra20-harmony.dts index aeda3a1..593885d 100644 --- a/board/nvidia/dts/tegra20-harmony.dts +++ b/board/nvidia/dts/tegra20-harmony.dts @@ -9,6 +9,8 @@ aliases { usb0 = "/usb@c5008000"; usb1 = "/usb@c5004000"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000200"; }; memory { @@ -52,4 +54,20 @@ usb@c5004000 { nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ }; + + sdhci@c8000200 { + status = "okay"; + cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ + power-gpios = <&gpio 155 0>; /* gpio PT3 */ + bus-width = <4>; + }; + + sdhci@c8000600 { + status = "okay"; + cd-gpios = <&gpio 58 0>; /* gpio PH2 */ + wp-gpios = <&gpio 59 0>; /* gpio PH3 */ + power-gpios = <&gpio 70 0>; /* gpio PI6 */ + bus-width = <8>; + }; }; diff --git a/board/nvidia/dts/tegra20-seaboard.dts b/board/nvidia/dts/tegra20-seaboard.dts index 527a296..dccb65e 100644 --- a/board/nvidia/dts/tegra20-seaboard.dts +++ b/board/nvidia/dts/tegra20-seaboard.dts @@ -12,14 +12,15 @@ }; aliases { - /* This defines the order of our USB ports */ + /* This defines the order of our ports */ usb0 = "/usb@c5008000"; usb1 = "/usb@c5000000"; - i2c0 = "/i2c@7000d000"; i2c1 = "/i2c@7000c000"; i2c2 = "/i2c@7000c400"; i2c3 = "/i2c@7000c500"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000400"; }; memory { @@ -156,13 +157,16 @@ }; sdhci@c8000400 { + status = "okay"; cd-gpios = <&gpio 69 0>; /* gpio PI5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ - power-gpios = <&gpio 70 0>; /* gpio PI6 */ + power-gpios = <&gpio 70 3>; /* gpio PI6 */ + bus-width = <4>; }; sdhci@c8000600 { - support-8bit; + status = "okay"; + bus-width = <8>; }; lcd_panel: panel { diff --git a/board/nvidia/dts/tegra20-ventana.dts b/board/nvidia/dts/tegra20-ventana.dts index 3e5e39d..0423595 100644 --- a/board/nvidia/dts/tegra20-ventana.dts +++ b/board/nvidia/dts/tegra20-ventana.dts @@ -8,6 +8,8 @@ aliases { usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000400"; }; memory { @@ -41,4 +43,17 @@ usb@c5004000 { status = "disabled"; }; + + sdhci@c8000400 { + status = "okay"; + cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ + power-gpios = <&gpio 70 0>; /* gpio PI6 */ + bus-width = <4>; + }; + + sdhci@c8000600 { + status = "okay"; + bus-width = <8>; + }; }; diff --git a/board/nvidia/dts/tegra20-whistler.dts b/board/nvidia/dts/tegra20-whistler.dts index 4579557..2d0a2ab 100644 --- a/board/nvidia/dts/tegra20-whistler.dts +++ b/board/nvidia/dts/tegra20-whistler.dts @@ -9,6 +9,8 @@ aliases { i2c0 = "/i2c@7000d000"; usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000400"; }; memory { @@ -57,4 +59,15 @@ usb@c5004000 { status = "disabled"; }; + + sdhci@c8000400 { + status = "okay"; + wp-gpios = <&gpio 173 0>; /* gpio PV5 */ + bus-width = <8>; + }; + + sdhci@c8000600 { + status = "okay"; + bus-width = <8>; + }; }; diff --git a/board/toradex/dts/tegra20-colibri_t20_iris.dts b/board/toradex/dts/tegra20-colibri_t20_iris.dts index c29b43a..0dd4c43 100644 --- a/board/toradex/dts/tegra20-colibri_t20_iris.dts +++ b/board/toradex/dts/tegra20-colibri_t20_iris.dts @@ -10,6 +10,7 @@ usb0 = "/usb@c5008000"; usb1 = "/usb@c5000000"; usb2 = "/usb@c5004000"; + sdhci0 = "/sdhci@c8000600"; }; usb@c5000000 { @@ -35,4 +36,9 @@ compatible = "nand-flash"; }; }; + + sdhci@c8000600 { + status = "okay"; + bus-width = <4>; + }; };
Linux dts files were used for those boards that didn't already have sdhci info populated. Tamonten has their own dtsi file with common sdhci nodes (sourced from Linux). Signed-off-by: Tom Warren <twarren@nvidia.com> --- v2: - cleanup comments in dts files/match w/kernel files - add sdhci aliases in all dts files - use tegra20-tamonten.dtsi from the kernel for AD boards arch/arm/dts/tegra20-tamonten.dtsi | 489 ++++++++++++++++++++++ arch/arm/dts/tegra20.dtsi | 16 +- board/avionic-design/dts/tegra20-medcom-wide.dts | 1 + board/avionic-design/dts/tegra20-plutux.dts | 1 + board/avionic-design/dts/tegra20-tec.dts | 1 + board/compal/dts/tegra20-paz00.dts | 19 +- board/compulab/dts/tegra20-trimslice.dts | 14 + board/nvidia/dts/tegra20-harmony.dts | 18 + board/nvidia/dts/tegra20-seaboard.dts | 12 +- board/nvidia/dts/tegra20-ventana.dts | 15 + board/nvidia/dts/tegra20-whistler.dts | 13 + board/toradex/dts/tegra20-colibri_t20_iris.dts | 6 + 12 files changed, 595 insertions(+), 10 deletions(-) create mode 100644 arch/arm/dts/tegra20-tamonten.dtsi