| Message ID | 1360247305-20620-1-git-send-email-fabio.estevam@freescale.com |
|---|---|
| State | Changes Requested |
| Headers | show |
On Thu, Feb 7, 2013 at 12:28 PM, Fabio Estevam <fabio.estevam@freescale.com> wrote: > On a mx6qsabresd revision C board with rev1.2 mx6q, the system gets resetted and it is not able > to reach the Linux prompt. > > Clearing the PDE - Power Down Enable bit fixes the problem. > > Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> What is not clear to me is why this affects only revision C of the board. Is it clear for you?
On Thu, Feb 7, 2013 at 12:39 PM, Otavio Salvador <otavio@ossystems.com.br> wrote: > On Thu, Feb 7, 2013 at 12:28 PM, Fabio Estevam > <fabio.estevam@freescale.com> wrote: >> On a mx6qsabresd revision C board with rev1.2 mx6q, the system gets resetted and it is not able >> to reach the Linux prompt. >> >> Clearing the PDE - Power Down Enable bit fixes the problem. >> >> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> > > What is not clear to me is why this affects only revision C of the > board. Is it clear for you? Yes, I investigated this further and I see that on mx6qsabresd revB the watchdog does not cut power to the mx6. For example: - On mx6qsabresd revB: U-Boot > reset resetting ... U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46) CPU: Freescale i.MX6Q rev1.1 at 792 MHz Reset cause: WDOG Board: MX6Q-SabreSD DRAM: 1 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FEC [PRIME] Warning: FEC using MAC address from net device Hit any key to stop autoboot: 0 U-Boot > - On mx6qsabresd revC: U-Boot > reset resetting ... U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46) CPU: Freescale i.MX6Q rev1.1 at 792 MHz Reset cause: POR Board: MX6Q-SabreSD DRAM: 1 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FEC [PRIME] Warning: FEC using MAC address from net device Hit any key to stop autoboot: 0 U-Boot > So the watchdog reset happens on both revisions, but only on revC it causes a POR due to its POR/watchdog circuitry. So in order to fix this: 1. We can always clear Power Down Enable (PDE) bit as I did on this patch and how it is done on FSL U-boot. 2. Check the board revision and only clear (PDE) for revC board. I would prefer number 1. as if someone copies the schematics of a revC board, but does not burn the fuses to indicate that their hardware behaves as a mx6qsabresd revC, then the reset problem will occur on their own board. I can also improve the commit log of the original patch to provide more details.
On Thu, Feb 7, 2013 at 2:07 PM, Fabio Estevam <festevam@gmail.com> wrote: > On Thu, Feb 7, 2013 at 12:39 PM, Otavio Salvador > <otavio@ossystems.com.br> wrote: >> On Thu, Feb 7, 2013 at 12:28 PM, Fabio Estevam >> <fabio.estevam@freescale.com> wrote: >>> On a mx6qsabresd revision C board with rev1.2 mx6q, the system gets resetted and it is not able >>> to reach the Linux prompt. >>> >>> Clearing the PDE - Power Down Enable bit fixes the problem. >>> >>> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> >> >> What is not clear to me is why this affects only revision C of the >> board. Is it clear for you? > > Yes, I investigated this further and I see that on mx6qsabresd revB > the watchdog does not cut power to the mx6. > > For example: > > - On mx6qsabresd revB: > > U-Boot > reset > resetting ... > > > U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46) > > CPU: Freescale i.MX6Q rev1.1 at 792 MHz > Reset cause: WDOG > Board: MX6Q-SabreSD > DRAM: 1 GiB > MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 > *** Warning - bad CRC, using default environment > In: serial > Out: serial > Err: serial > Net: FEC [PRIME] > Warning: FEC using MAC address from net device > > Hit any key to stop autoboot: 0 > U-Boot > > > - On mx6qsabresd revC: > > U-Boot > reset > resetting ... > > > U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46) > > CPU: Freescale i.MX6Q rev1.1 at 792 MHz > Reset cause: POR > Board: MX6Q-SabreSD > DRAM: 1 GiB > MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 > *** Warning - bad CRC, using default environment > In: serial > Out: serial > Err: serial > Net: FEC [PRIME] > Warning: FEC using MAC address from net device > > Hit any key to stop autoboot: 0 > U-Boot > > > So the watchdog reset happens on both revisions, but only on revC it > causes a POR due to its POR/watchdog circuitry. > > So in order to fix this: > > 1. We can always clear Power Down Enable (PDE) bit as I did on this > patch and how it is done on FSL U-boot. > > 2. Check the board revision and only clear (PDE) for revC board. > > I would prefer number 1. as if someone copies the schematics of a revC > board, but does not burn the fuses to indicate that their hardware > behaves as a mx6qsabresd revC, then the reset problem will occur on > their own board. > > I can also improve the commit log of the original patch to provide more details. Yes; I think an improved commit log would be handy.
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index a8aad5d..0e4ab36 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -121,12 +121,27 @@ void set_vddsoc(u32 mv) writel(reg, &anatop->reg_core); } +static void imx_set_wdog_powerdown(int enable) +{ + struct wdog_regs *wdog1 = (struct wdog_regs *)WDOG1_BASE_ADDR; + struct wdog_regs *wdog2 = (struct wdog_regs *)WDOG2_BASE_ADDR; + + /* Set or Clear PDE - Power Down Enable bit */ + if (!enable) { + writew(0x0, &wdog1->wmcr); + writew(0x0, &wdog2->wmcr); + } else { + writew(0x1, &wdog1->wmcr); + writew(0x1, &wdog2->wmcr); + } +} + int arch_cpu_init(void) { init_aips(); set_vddsoc(1200); /* Set VDDSOC to 1.2V */ - + imx_set_wdog_powerdown(0); /* Disable PDE bit of WMCR register */ return 0; } diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 3eb0081..eaa7439 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -601,5 +601,13 @@ struct iomuxc_base_regs { u32 daisy[104]; /* 0x7b0..94c */ }; +struct wdog_regs { + u16 wcr; /* Control */ + u16 wsr; /* Service */ + u16 wrsr; /* Reset Status */ + u16 wicr; /* Interrupt Control */ + u16 wmcr; /* Miscellaneous Control */ +}; + #endif /* __ASSEMBLER__*/ #endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */
On a mx6qsabresd revision C board with rev1.2 mx6q, the system gets resetted and it is not able to reach the Linux prompt. Clearing the PDE - Power Down Enable bit fixes the problem. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> --- arch/arm/cpu/armv7/mx6/soc.c | 17 ++++++++++++++++- arch/arm/include/asm/arch-mx6/imx-regs.h | 8 ++++++++ 2 files changed, 24 insertions(+), 1 deletion(-)