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[U-Boot] am33xx: Drop gpio0_7_pin_mux from phytec pcm051

Message ID 1359998582-29028-1-git-send-email-trini@ti.com
State Accepted
Delegated to: Tom Rini
Headers show

Commit Message

Tom Rini Feb. 4, 2013, 5:23 p.m. UTC
This mux is not currently used and appears to be a carry-over from the
am335x evm code.

Cc: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Tom Rini <trini@ti.com>
---
 board/phytec/pcm051/mux.c |    5 -----
 1 file changed, 5 deletions(-)

Comments

Lars Poeschel Feb. 5, 2013, 9:01 a.m. UTC | #1
On Monday 04 February 2013 at 18:23:02, Tom Rini wrote:
> This mux is not currently used and appears to be a carry-over from the
> am335x evm code.

This is absolutely right,so my

Acked-by: Lars Poeschel <poeschel@lemonage.de>

> Cc: Lars Poeschel <poeschel@lemonage.de>
> Signed-off-by: Tom Rini <trini@ti.com>
> ---
>  board/phytec/pcm051/mux.c |    5 -----
>  1 file changed, 5 deletions(-)
> 
> diff --git a/board/phytec/pcm051/mux.c b/board/phytec/pcm051/mux.c
> index 2cda331..4d3a1d5 100644
> --- a/board/phytec/pcm051/mux.c
> +++ b/board/phytec/pcm051/mux.c
> @@ -63,11 +63,6 @@ static struct module_pin_mux spi0_pin_mux[] = {
>  };
>  #endif
> 
> -static struct module_pin_mux gpio0_7_pin_mux[] = {
> -	{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN)},	/* GPIO0_7 */
> -	{-1},
> -};
> -
>  static struct module_pin_mux rmii1_pin_mux[] = {
>  	{OFFSET(mii1_crs), MODE(1) | RXACTIVE},     /* RMII1_CRS */
>  	{OFFSET(mii1_rxerr), MODE(1) | RXACTIVE},   /* RMII1_RXERR */
diff mbox

Patch

diff --git a/board/phytec/pcm051/mux.c b/board/phytec/pcm051/mux.c
index 2cda331..4d3a1d5 100644
--- a/board/phytec/pcm051/mux.c
+++ b/board/phytec/pcm051/mux.c
@@ -63,11 +63,6 @@  static struct module_pin_mux spi0_pin_mux[] = {
 };
 #endif
 
-static struct module_pin_mux gpio0_7_pin_mux[] = {
-	{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN)},	/* GPIO0_7 */
-	{-1},
-};
-
 static struct module_pin_mux rmii1_pin_mux[] = {
 	{OFFSET(mii1_crs), MODE(1) | RXACTIVE},     /* RMII1_CRS */
 	{OFFSET(mii1_rxerr), MODE(1) | RXACTIVE},   /* RMII1_RXERR */