diff mbox

[v2,4/6] ARM: davinci: da850: add DT node for eth0.

Message ID 1359380879-26306-5-git-send-email-prabhakar.lad@ti.com
State Not Applicable, archived
Delegated to: David Miller
Headers show

Commit Message

Prabhakar Jan. 28, 2013, 1:47 p.m. UTC
From: Lad, Prabhakar <prabhakar.lad@ti.com>

Add eth0 device tree node information and pinmux for mii to da850 by
providing interrupt details and local mac address of eth0.

Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: davinci-linux-open-source@linux.davincidsp.com
Cc: netdev@vger.kernel.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Heiko Schocher <hs@denx.de>
---
 arch/arm/boot/dts/da850-evm.dts |    5 +++++
 arch/arm/boot/dts/da850.dtsi    |   35 +++++++++++++++++++++++++++++++++++
 2 files changed, 40 insertions(+), 0 deletions(-)

Comments

Sekhar Nori Feb. 3, 2013, 12:03 p.m. UTC | #1
On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
> From: Lad, Prabhakar <prabhakar.lad@ti.com>
> 
> Add eth0 device tree node information and pinmux for mii to da850 by
> providing interrupt details and local mac address of eth0.
> 
> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: davinci-linux-open-source@linux.davincidsp.com
> Cc: netdev@vger.kernel.org
> Cc: devicetree-discuss@lists.ozlabs.org
> Cc: Sekhar Nori <nsekhar@ti.com>
> Cc: Heiko Schocher <hs@denx.de>
> ---
>  arch/arm/boot/dts/da850-evm.dts |    5 +++++
>  arch/arm/boot/dts/da850.dtsi    |   35 +++++++++++++++++++++++++++++++++++
>  2 files changed, 40 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
> index a319491..19aa2b3 100644
> --- a/arch/arm/boot/dts/da850-evm.dts
> +++ b/arch/arm/boot/dts/da850-evm.dts
> @@ -30,6 +30,11 @@
>  		mdio: davinci_mdio@1e24000 {
>  			status = "okay";
>  		};
> +		eth0: emac@1e20000 {
> +			status = "okay";
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&mii_pins>;
> +		};
>  	};
>  	nand_cs3@62000000 {
>  		status = "okay";
> diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
> index ba28f2d..76905f3 100644
> --- a/arch/arm/boot/dts/da850.dtsi
> +++ b/arch/arm/boot/dts/da850.dtsi
> @@ -56,6 +56,26 @@
>  					0x30 0x01100000  0x0ff00000
>  				>;
>  			};
> +			mii_pins: pinmux_mii_pins {
> +				pinctrl-single,bits = <
> +					/*
> +					 * MII_TXEN, MII_TXCLK, MII_COL
> +					 * MII_TXD_3, MII_TXD_2, MII_TXD_1
> +					 * MII_TXD_0
> +					 */
> +					0x8 0x88888880 0xfffffff0
> +					/*
> +					 * MII_RXER, MII_CRS, MII_RXCLK
> +					 * MII_RXDV, MII_RXD_3, MII_RXD_2
> +					 * MII_RXD_1, MII_RXD_0
> +					 */
> +					0xc 0x88888888 0xffffffff
> +					/* MDIO_CLK, MDIO_D */

You call this mii_pins, but include mdio pins in there as well. Can you
separate them out? Then some board which uses rmii can simply reuse the
entry.

> +					0x10 0x00222288 0x00ffffff
> +					/* GPIO2_6 */
> +					0x18 0x00000080 0x000000f0

This is SoC specific pin list. Such board specific pins should not make
it here.

> +				>;
> +			};
>  		};
>  		serial0: serial@1c42000 {
>  			compatible = "ns16550a";
> @@ -88,6 +108,21 @@
>  			reg = <0x224000 0x1000>;
>  			bus_freq = <2200000>;
>  		};
> +		eth0: emac@1e20000 {
> +			compatible = "ti,davinci-dm6467-emac";
> +			reg = <0x220000 0x4000>;
> +			ti,davinci-ctrl-reg-offset = <0x3000>;
> +			ti,davinci-ctrl-mod-reg-offset = <0x2000>;
> +			ti,davinci-ctrl-ram-offset = <0>;
> +			ti,davinci-ctrl-ram-size = <0x2000>;
> +			local-mac-address = [ 00 00 00 00 00 00 ];
> +			interrupts = <33
> +					34
> +					35
> +					36
> +					>;
> +			phy-handle = <&mdio>;

I doubt this is required. This property is to pass a handle to the phy,
not mdio bus.

Thanks,
Sekhar
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Prabhakar Feb. 4, 2013, 5:07 a.m. UTC | #2
Sekhar ,

On Sun, Feb 3, 2013 at 5:33 PM, Sekhar Nori <nsekhar@ti.com> wrote:
> On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
>> From: Lad, Prabhakar <prabhakar.lad@ti.com>
>>
>> Add eth0 device tree node information and pinmux for mii to da850 by
>> providing interrupt details and local mac address of eth0.
>>
>> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
>> Cc: linux-arm-kernel@lists.infradead.org
>> Cc: linux-kernel@vger.kernel.org
>> Cc: davinci-linux-open-source@linux.davincidsp.com
>> Cc: netdev@vger.kernel.org
>> Cc: devicetree-discuss@lists.ozlabs.org
>> Cc: Sekhar Nori <nsekhar@ti.com>
>> Cc: Heiko Schocher <hs@denx.de>
>> ---
>>  arch/arm/boot/dts/da850-evm.dts |    5 +++++
>>  arch/arm/boot/dts/da850.dtsi    |   35 +++++++++++++++++++++++++++++++++++
>>  2 files changed, 40 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
>> index a319491..19aa2b3 100644
>> --- a/arch/arm/boot/dts/da850-evm.dts
>> +++ b/arch/arm/boot/dts/da850-evm.dts
>> @@ -30,6 +30,11 @@
>>               mdio: davinci_mdio@1e24000 {
>>                       status = "okay";
>>               };
>> +             eth0: emac@1e20000 {
>> +                     status = "okay";
>> +                     pinctrl-names = "default";
>> +                     pinctrl-0 = <&mii_pins>;
>> +             };
>>       };
>>       nand_cs3@62000000 {
>>               status = "okay";
>> diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
>> index ba28f2d..76905f3 100644
>> --- a/arch/arm/boot/dts/da850.dtsi
>> +++ b/arch/arm/boot/dts/da850.dtsi
>> @@ -56,6 +56,26 @@
>>                                       0x30 0x01100000  0x0ff00000
>>                               >;
>>                       };
>> +                     mii_pins: pinmux_mii_pins {
>> +                             pinctrl-single,bits = <
>> +                                     /*
>> +                                      * MII_TXEN, MII_TXCLK, MII_COL
>> +                                      * MII_TXD_3, MII_TXD_2, MII_TXD_1
>> +                                      * MII_TXD_0
>> +                                      */
>> +                                     0x8 0x88888880 0xfffffff0
>> +                                     /*
>> +                                      * MII_RXER, MII_CRS, MII_RXCLK
>> +                                      * MII_RXDV, MII_RXD_3, MII_RXD_2
>> +                                      * MII_RXD_1, MII_RXD_0
>> +                                      */
>> +                                     0xc 0x88888888 0xffffffff
>> +                                     /* MDIO_CLK, MDIO_D */
>
> You call this mii_pins, but include mdio pins in there as well. Can you
> separate them out? Then some board which uses rmii can simply reuse the
> entry.
>
Ok makes sense.

>> +                                     0x10 0x00222288 0x00ffffff
>> +                                     /* GPIO2_6 */
>> +                                     0x18 0x00000080 0x000000f0
>
> This is SoC specific pin list. Such board specific pins should not make
> it here.
>
Ok, so this should be set up using GPIO API's ?

>> +                             >;
>> +                     };
>>               };
>>               serial0: serial@1c42000 {
>>                       compatible = "ns16550a";
>> @@ -88,6 +108,21 @@
>>                       reg = <0x224000 0x1000>;
>>                       bus_freq = <2200000>;
>>               };
>> +             eth0: emac@1e20000 {
>> +                     compatible = "ti,davinci-dm6467-emac";
>> +                     reg = <0x220000 0x4000>;
>> +                     ti,davinci-ctrl-reg-offset = <0x3000>;
>> +                     ti,davinci-ctrl-mod-reg-offset = <0x2000>;
>> +                     ti,davinci-ctrl-ram-offset = <0>;
>> +                     ti,davinci-ctrl-ram-size = <0x2000>;
>> +                     local-mac-address = [ 00 00 00 00 00 00 ];
>> +                     interrupts = <33
>> +                                     34
>> +                                     35
>> +                                     36
>> +                                     >;
>> +                     phy-handle = <&mdio>;
>
> I doubt this is required. This property is to pass a handle to the phy,
> not mdio bus.
>
Ok I'll check on this.

Regards,
--Prabhakar


> Thanks,
> Sekhar
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Sekhar Nori Feb. 4, 2013, 5:50 p.m. UTC | #3
On 2/4/2013 10:37 AM, Prabhakar Lad wrote:
> Sekhar ,
> 
> On Sun, Feb 3, 2013 at 5:33 PM, Sekhar Nori <nsekhar@ti.com> wrote:
>> On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
>>> From: Lad, Prabhakar <prabhakar.lad@ti.com>
>>>
>>> Add eth0 device tree node information and pinmux for mii to da850 by
>>> providing interrupt details and local mac address of eth0.
>>>
>>> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
>>> Cc: linux-arm-kernel@lists.infradead.org
>>> Cc: linux-kernel@vger.kernel.org
>>> Cc: davinci-linux-open-source@linux.davincidsp.com
>>> Cc: netdev@vger.kernel.org
>>> Cc: devicetree-discuss@lists.ozlabs.org
>>> Cc: Sekhar Nori <nsekhar@ti.com>
>>> Cc: Heiko Schocher <hs@denx.de>
>>> ---
>>>  arch/arm/boot/dts/da850-evm.dts |    5 +++++
>>>  arch/arm/boot/dts/da850.dtsi    |   35 +++++++++++++++++++++++++++++++++++
>>>  2 files changed, 40 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
>>> index a319491..19aa2b3 100644
>>> --- a/arch/arm/boot/dts/da850-evm.dts
>>> +++ b/arch/arm/boot/dts/da850-evm.dts
>>> @@ -30,6 +30,11 @@
>>>               mdio: davinci_mdio@1e24000 {
>>>                       status = "okay";
>>>               };
>>> +             eth0: emac@1e20000 {
>>> +                     status = "okay";
>>> +                     pinctrl-names = "default";
>>> +                     pinctrl-0 = <&mii_pins>;
>>> +             };
>>>       };
>>>       nand_cs3@62000000 {
>>>               status = "okay";
>>> diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
>>> index ba28f2d..76905f3 100644
>>> --- a/arch/arm/boot/dts/da850.dtsi
>>> +++ b/arch/arm/boot/dts/da850.dtsi
>>> @@ -56,6 +56,26 @@
>>>                                       0x30 0x01100000  0x0ff00000
>>>                               >;
>>>                       };
>>> +                     mii_pins: pinmux_mii_pins {
>>> +                             pinctrl-single,bits = <
>>> +                                     /*
>>> +                                      * MII_TXEN, MII_TXCLK, MII_COL
>>> +                                      * MII_TXD_3, MII_TXD_2, MII_TXD_1
>>> +                                      * MII_TXD_0
>>> +                                      */
>>> +                                     0x8 0x88888880 0xfffffff0
>>> +                                     /*
>>> +                                      * MII_RXER, MII_CRS, MII_RXCLK
>>> +                                      * MII_RXDV, MII_RXD_3, MII_RXD_2
>>> +                                      * MII_RXD_1, MII_RXD_0
>>> +                                      */
>>> +                                     0xc 0x88888888 0xffffffff
>>> +                                     /* MDIO_CLK, MDIO_D */
>>
>> You call this mii_pins, but include mdio pins in there as well. Can you
>> separate them out? Then some board which uses rmii can simply reuse the
>> entry.
>>
> Ok makes sense.
> 
>>> +                                     0x10 0x00222288 0x00ffffff
>>> +                                     /* GPIO2_6 */
>>> +                                     0x18 0x00000080 0x000000f0
>>
>> This is SoC specific pin list. Such board specific pins should not make
>> it here.
>>
> Ok, so this should be set up using GPIO API's ?

Yes, the pins ultimately will be controlled by gpiolib APIs, but the
pins should be defined under the eth node in .dts

Thanks,
Sekhar
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Prabhakar March 8, 2013, 9:45 a.m. UTC | #4
Sekhar,

On Mon, Feb 4, 2013 at 11:20 PM, Sekhar Nori <nsekhar@ti.com> wrote:
> On 2/4/2013 10:37 AM, Prabhakar Lad wrote:
>> Sekhar ,
>>
>> On Sun, Feb 3, 2013 at 5:33 PM, Sekhar Nori <nsekhar@ti.com> wrote:
>>> On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
>>>> From: Lad, Prabhakar <prabhakar.lad@ti.com>
>>>>
>>>> Add eth0 device tree node information and pinmux for mii to da850 by
>>>> providing interrupt details and local mac address of eth0.
>>>>
>>>> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
>>>> Cc: linux-arm-kernel@lists.infradead.org
>>>> Cc: linux-kernel@vger.kernel.org
>>>> Cc: davinci-linux-open-source@linux.davincidsp.com
>>>> Cc: netdev@vger.kernel.org
>>>> Cc: devicetree-discuss@lists.ozlabs.org
>>>> Cc: Sekhar Nori <nsekhar@ti.com>
>>>> Cc: Heiko Schocher <hs@denx.de>
>>>> ---
>>>>  arch/arm/boot/dts/da850-evm.dts |    5 +++++
>>>>  arch/arm/boot/dts/da850.dtsi    |   35 +++++++++++++++++++++++++++++++++++
>>>>  2 files changed, 40 insertions(+), 0 deletions(-)
>>>>
>>>> diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
>>>> index a319491..19aa2b3 100644
>>>> --- a/arch/arm/boot/dts/da850-evm.dts
>>>> +++ b/arch/arm/boot/dts/da850-evm.dts
>>>> @@ -30,6 +30,11 @@
>>>>               mdio: davinci_mdio@1e24000 {
>>>>                       status = "okay";
>>>>               };
>>>> +             eth0: emac@1e20000 {
>>>> +                     status = "okay";
>>>> +                     pinctrl-names = "default";
>>>> +                     pinctrl-0 = <&mii_pins>;
>>>> +             };
>>>>       };
>>>>       nand_cs3@62000000 {
>>>>               status = "okay";
>>>> diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
>>>> index ba28f2d..76905f3 100644
>>>> --- a/arch/arm/boot/dts/da850.dtsi
>>>> +++ b/arch/arm/boot/dts/da850.dtsi
>>>> @@ -56,6 +56,26 @@
>>>>                                       0x30 0x01100000  0x0ff00000
>>>>                               >;
>>>>                       };
>>>> +                     mii_pins: pinmux_mii_pins {
>>>> +                             pinctrl-single,bits = <
>>>> +                                     /*
>>>> +                                      * MII_TXEN, MII_TXCLK, MII_COL
>>>> +                                      * MII_TXD_3, MII_TXD_2, MII_TXD_1
>>>> +                                      * MII_TXD_0
>>>> +                                      */
>>>> +                                     0x8 0x88888880 0xfffffff0
>>>> +                                     /*
>>>> +                                      * MII_RXER, MII_CRS, MII_RXCLK
>>>> +                                      * MII_RXDV, MII_RXD_3, MII_RXD_2
>>>> +                                      * MII_RXD_1, MII_RXD_0
>>>> +                                      */
>>>> +                                     0xc 0x88888888 0xffffffff
>>>> +                                     /* MDIO_CLK, MDIO_D */
>>>
>>> You call this mii_pins, but include mdio pins in there as well. Can you
>>> separate them out? Then some board which uses rmii can simply reuse the
>>> entry.
>>>
>> Ok makes sense.
>>
>>>> +                                     0x10 0x00222288 0x00ffffff
>>>> +                                     /* GPIO2_6 */
>>>> +                                     0x18 0x00000080 0x000000f0
>>>
>>> This is SoC specific pin list. Such board specific pins should not make
>>> it here.
>>>
>> Ok, so this should be set up using GPIO API's ?
>
> Yes, the pins ultimately will be controlled by gpiolib APIs, but the
> pins should be defined under the eth node in .dts
>
You mean '0x18 0x00000080 0x000000f0'  still needs to defined in eth0 node ?
Can you elaborate and give some pointers.

Regards,
--Prabhakar

> Thanks,
> Sekhar
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Sekhar Nori March 8, 2013, 9:51 a.m. UTC | #5
On 3/8/2013 3:15 PM, Prabhakar Lad wrote:
> Sekhar,
> 
> On Mon, Feb 4, 2013 at 11:20 PM, Sekhar Nori <nsekhar@ti.com> wrote:
>> On 2/4/2013 10:37 AM, Prabhakar Lad wrote:
>>> Sekhar ,
>>>
>>> On Sun, Feb 3, 2013 at 5:33 PM, Sekhar Nori <nsekhar@ti.com> wrote:
>>>> On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
>>>>> From: Lad, Prabhakar <prabhakar.lad@ti.com>
>>>>>
>>>>> Add eth0 device tree node information and pinmux for mii to da850 by
>>>>> providing interrupt details and local mac address of eth0.
>>>>>
>>>>> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
>>>>> Cc: linux-arm-kernel@lists.infradead.org
>>>>> Cc: linux-kernel@vger.kernel.org
>>>>> Cc: davinci-linux-open-source@linux.davincidsp.com
>>>>> Cc: netdev@vger.kernel.org
>>>>> Cc: devicetree-discuss@lists.ozlabs.org
>>>>> Cc: Sekhar Nori <nsekhar@ti.com>
>>>>> Cc: Heiko Schocher <hs@denx.de>
>>>>> ---
>>>>>  arch/arm/boot/dts/da850-evm.dts |    5 +++++
>>>>>  arch/arm/boot/dts/da850.dtsi    |   35 +++++++++++++++++++++++++++++++++++
>>>>>  2 files changed, 40 insertions(+), 0 deletions(-)
>>>>>
>>>>> diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
>>>>> index a319491..19aa2b3 100644
>>>>> --- a/arch/arm/boot/dts/da850-evm.dts
>>>>> +++ b/arch/arm/boot/dts/da850-evm.dts
>>>>> @@ -30,6 +30,11 @@
>>>>>               mdio: davinci_mdio@1e24000 {
>>>>>                       status = "okay";
>>>>>               };
>>>>> +             eth0: emac@1e20000 {
>>>>> +                     status = "okay";
>>>>> +                     pinctrl-names = "default";
>>>>> +                     pinctrl-0 = <&mii_pins>;
>>>>> +             };
>>>>>       };
>>>>>       nand_cs3@62000000 {
>>>>>               status = "okay";
>>>>> diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
>>>>> index ba28f2d..76905f3 100644
>>>>> --- a/arch/arm/boot/dts/da850.dtsi
>>>>> +++ b/arch/arm/boot/dts/da850.dtsi
>>>>> @@ -56,6 +56,26 @@
>>>>>                                       0x30 0x01100000  0x0ff00000
>>>>>                               >;
>>>>>                       };
>>>>> +                     mii_pins: pinmux_mii_pins {
>>>>> +                             pinctrl-single,bits = <
>>>>> +                                     /*
>>>>> +                                      * MII_TXEN, MII_TXCLK, MII_COL
>>>>> +                                      * MII_TXD_3, MII_TXD_2, MII_TXD_1
>>>>> +                                      * MII_TXD_0
>>>>> +                                      */
>>>>> +                                     0x8 0x88888880 0xfffffff0
>>>>> +                                     /*
>>>>> +                                      * MII_RXER, MII_CRS, MII_RXCLK
>>>>> +                                      * MII_RXDV, MII_RXD_3, MII_RXD_2
>>>>> +                                      * MII_RXD_1, MII_RXD_0
>>>>> +                                      */
>>>>> +                                     0xc 0x88888888 0xffffffff
>>>>> +                                     /* MDIO_CLK, MDIO_D */
>>>>
>>>> You call this mii_pins, but include mdio pins in there as well. Can you
>>>> separate them out? Then some board which uses rmii can simply reuse the
>>>> entry.
>>>>
>>> Ok makes sense.
>>>
>>>>> +                                     0x10 0x00222288 0x00ffffff
>>>>> +                                     /* GPIO2_6 */
>>>>> +                                     0x18 0x00000080 0x000000f0
>>>>
>>>> This is SoC specific pin list. Such board specific pins should not make
>>>> it here.
>>>>
>>> Ok, so this should be set up using GPIO API's ?
>>
>> Yes, the pins ultimately will be controlled by gpiolib APIs, but the
>> pins should be defined under the eth node in .dts
>>
> You mean '0x18 0x00000080 0x000000f0'  still needs to defined in eth0 node ?
> Can you elaborate and give some pointers.

Since the GPIO usage for ethernet is board specific, it cannot be in
.dtsi which is SoC generic. I am suggesting do in the .dts file which is
board specific.

Thanks,
Sekhar
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diff mbox

Patch

diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
index a319491..19aa2b3 100644
--- a/arch/arm/boot/dts/da850-evm.dts
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -30,6 +30,11 @@ 
 		mdio: davinci_mdio@1e24000 {
 			status = "okay";
 		};
+		eth0: emac@1e20000 {
+			status = "okay";
+			pinctrl-names = "default";
+			pinctrl-0 = <&mii_pins>;
+		};
 	};
 	nand_cs3@62000000 {
 		status = "okay";
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index ba28f2d..76905f3 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -56,6 +56,26 @@ 
 					0x30 0x01100000  0x0ff00000
 				>;
 			};
+			mii_pins: pinmux_mii_pins {
+				pinctrl-single,bits = <
+					/*
+					 * MII_TXEN, MII_TXCLK, MII_COL
+					 * MII_TXD_3, MII_TXD_2, MII_TXD_1
+					 * MII_TXD_0
+					 */
+					0x8 0x88888880 0xfffffff0
+					/*
+					 * MII_RXER, MII_CRS, MII_RXCLK
+					 * MII_RXDV, MII_RXD_3, MII_RXD_2
+					 * MII_RXD_1, MII_RXD_0
+					 */
+					0xc 0x88888888 0xffffffff
+					/* MDIO_CLK, MDIO_D */
+					0x10 0x00222288 0x00ffffff
+					/* GPIO2_6 */
+					0x18 0x00000080 0x000000f0
+				>;
+			};
 		};
 		serial0: serial@1c42000 {
 			compatible = "ns16550a";
@@ -88,6 +108,21 @@ 
 			reg = <0x224000 0x1000>;
 			bus_freq = <2200000>;
 		};
+		eth0: emac@1e20000 {
+			compatible = "ti,davinci-dm6467-emac";
+			reg = <0x220000 0x4000>;
+			ti,davinci-ctrl-reg-offset = <0x3000>;
+			ti,davinci-ctrl-mod-reg-offset = <0x2000>;
+			ti,davinci-ctrl-ram-offset = <0>;
+			ti,davinci-ctrl-ram-size = <0x2000>;
+			local-mac-address = [ 00 00 00 00 00 00 ];
+			interrupts = <33
+					34
+					35
+					36
+					>;
+			phy-handle = <&mdio>;
+		};
 	};
 	nand_cs3@62000000 {
 		compatible = "ti,davinci-nand";