| Message ID | 1359548001-14278-3-git-send-email-otavio@ossystems.com.br |
|---|---|
| State | Changes Requested |
| Delegated to: | Stefano Babic |
| Headers | show |
Dear Otavio Salvador, > Add a comment about the tRAS lockout setting of HW_DRAM_CTL08 to > enable the 'Fast Auto Pre-Charge' found in the memory chip. The > setting is applied after memory initialization and it is worth > document it. > > Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> > --- > arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c > b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index f8392f6..37b50e9 100644 > --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c > +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c > @@ -119,6 +119,7 @@ static void initialize_dram_values(void) > writel(dram_vals[i], MXS_DRAM_BASE + (4 * i)); > > #ifdef CONFIG_MX23 > + /* Enable tRAS lockout in HW_DRAM_CTL08 */ This does not explain why it must be here and not in the dram_vals table. It would be nice to explain it here, since it'd prevent others from sending patch stuffing it into the dram_vals table without knowing it must definitelly be here. But why does it have to be here? I wonder ... > writel((1 << 24), MXS_DRAM_BASE + (4 * 8)); > #endif > } Best regards, Marek Vasut
On Wed, Jan 30, 2013 at 12:10 PM, Marek Vasut <marex@denx.de> wrote: > Dear Otavio Salvador, > >> Add a comment about the tRAS lockout setting of HW_DRAM_CTL08 to >> enable the 'Fast Auto Pre-Charge' found in the memory chip. The >> setting is applied after memory initialization and it is worth >> document it. >> >> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> >> --- >> arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c >> b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index f8392f6..37b50e9 100644 >> --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c >> +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c >> @@ -119,6 +119,7 @@ static void initialize_dram_values(void) >> writel(dram_vals[i], MXS_DRAM_BASE + (4 * i)); >> >> #ifdef CONFIG_MX23 >> + /* Enable tRAS lockout in HW_DRAM_CTL08 */ > > This does not explain why it must be here and not in the dram_vals table. It > would be nice to explain it here, since it'd prevent others from sending patch > stuffing it into the dram_vals table without knowing it must definitelly be > here. Ok; I will extend the comment. > But why does it have to be here? I wonder ... Yes; I don't know as well. We may try to find it out in future but for now let's keep it as is. Will change it for v2. -- Otavio Salvador O.S. Systems E-mail: otavio@ossystems.com.br http://www.ossystems.com.br Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index f8392f6..37b50e9 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -119,6 +119,7 @@ static void initialize_dram_values(void) writel(dram_vals[i], MXS_DRAM_BASE + (4 * i)); #ifdef CONFIG_MX23 + /* Enable tRAS lockout in HW_DRAM_CTL08 */ writel((1 << 24), MXS_DRAM_BASE + (4 * 8)); #endif }
Add a comment about the tRAS lockout setting of HW_DRAM_CTL08 to enable the 'Fast Auto Pre-Charge' found in the memory chip. The setting is applied after memory initialization and it is worth document it. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> --- arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 1 + 1 file changed, 1 insertion(+)