| Message ID | 1356246228-26732-2-git-send-email-nikita@compulab.co.il |
|---|---|
| State | Superseded |
| Delegated to: | Tom Rini |
| Headers | show |
Hello Nikita, On 12/23/2012 08:03 AM, Nikita Kiryanov wrote: > Add useful omap3 dss defines for: polarity, TFT data lines, lcd > display type, gfx burst size, and gfx format > > Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> > Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> > --- > arch/arm/include/asm/arch-omap3/dss.h | 35 +++++++++++++++++++++++++++++++++ > 1 file changed, 35 insertions(+) > > diff --git a/arch/arm/include/asm/arch-omap3/dss.h b/arch/arm/include/asm/arch-omap3/dss.h > index ffaffbb..cb6d746 100644 > --- a/arch/arm/include/asm/arch-omap3/dss.h > +++ b/arch/arm/include/asm/arch-omap3/dss.h > @@ -167,6 +167,41 @@ struct venc_regs { > #define VENC_OUT_SEL (1 << 6) > #define DIG_LPP_SHIFT 16 > > +/* LCD display type */ > +#define PASSIVE_DISPLAY 0 > +#define ACTIVE_DISPLAY 1 > + > +/* TFTDATALINES */ > +#define LCD_INTERFACE_12_BIT 0 > +#define LCD_INTERFACE_16_BIT 1 > +#define LCD_INTERFACE_18_BIT 2 > +#define LCD_INTERFACE_24_BIT 3 > + > +/* Polarity */ > +#define DSS_IVS (1 << 12) > +#define DSS_IHS (1 << 13) > +#define DSS_IPC (1 << 14) > +#define DSS_IEO (1 << 15) > + > +/* GFX format */ > +#define GFXFORMAT_BITMAP1 0x0 > +#define GFXFORMAT_BITMAP2 0x1 > +#define GFXFORMAT_BITMAP4 0x2 > +#define GFXFORMAT_BITMAP8 0x3 > +#define GFXFORMAT_RGB12 0x4 > +#define GFXFORMAT_ARGB16 0x5 > +#define GFXFORMAT_RGB16 0x6 > +#define GFXFORMAT_RGB24_UNPACKED 0x8 > +#define GFXFORMAT_RGB24_PACKED 0x9 > +#define GFXFORMAT_ARGB32 0xC > +#define GFXFORMAT_RGBA32 0xD > +#define GFXFORMAT_RGBx32 0xE > + > +/* GFX burst size */ > +#define GFXBURSTSIZE4 0 > +#define GFXBURSTSIZE8 1 > +#define GFXBURSTSIZE16 2 > + > /* Panel Configuration */ > struct panel_config { > u32 timing_h; most defines in omap dss use the location in the silicon itself. For consistency you might want to shift these values to the appropriate place. (or just use 32 mode so you can drop most if not all of them) Regards, Jeroen
Hi Jeroen, On 01/20/2013 11:42 PM, Jeroen Hofstee wrote: > Hello Nikita, > [...] >> +#define GFXFORMAT_ARGB32 0xC >> +#define GFXFORMAT_RGBA32 0xD >> +#define GFXFORMAT_RGBx32 0xE >> + >> +/* GFX burst size */ >> +#define GFXBURSTSIZE4 0 >> +#define GFXBURSTSIZE8 1 >> +#define GFXBURSTSIZE16 2 >> + >> /* Panel Configuration */ >> struct panel_config { >> u32 timing_h; > most defines in omap dss use the location in the silicon itself. > For consistency you might want to shift these values to the > appropriate place. (or just use 32 mode so you can drop most > if not all of them) > These aren't offsets against a base address. These are input values for the various sections of the dss registers. For example the /* GFX burst size */ defines are values for DISPC_GFX_ATTRIBUTES[7:6]. > Regards, > Jeroen
Hello Nikita, +#define GFXFORMAT_ARGB32 0xC >>> +#define GFXFORMAT_RGBA32 0xD >>> +#define GFXFORMAT_RGBx32 0xE >>> + >>> +/* GFX burst size */ >>> +#define GFXBURSTSIZE4 0 >>> +#define GFXBURSTSIZE8 1 >>> +#define GFXBURSTSIZE16 2 >>> + >>> /* Panel Configuration */ >>> struct panel_config { >>> u32 timing_h; >> most defines in omap dss use the location in the silicon itself. >> For consistency you might want to shift these values to the >> appropriate place. (or just use 32 mode so you can drop most >> if not all of them) >> > > These aren't offsets against a base address. These are input values > for the various sections of the dss registers. For example > the /* GFX burst size */ defines are values for > DISPC_GFX_ATTRIBUTES[7:6]. > What I mean is that the defines currently in dss.h already shift the values to the location where the hardware expects them, e.g.. /* Configure VENC DSS Params */ #define VENC_CLK_ENABLE (1 << 3) #define DAC_DEMEN (1 << 4) #define DAC_POWERDN (1 << 5) #define VENC_OUT_SEL (1 << 6) The defines you add are not shifted however, so after this patch half of the defines need shifting, the other half does not. Thats confusing, so macro's like #define GFXBURSTSIZE8 (1 << 6) is a better option in my opinion. Regards, Jeroen
On 01/21/2013 08:38 PM, Jeroen Hofstee wrote: > Hello Nikita, > > +#define GFXFORMAT_ARGB32 0xC >>>> +#define GFXFORMAT_RGBA32 0xD >>>> +#define GFXFORMAT_RGBx32 0xE >>>> + >>>> +/* GFX burst size */ >>>> +#define GFXBURSTSIZE4 0 >>>> +#define GFXBURSTSIZE8 1 >>>> +#define GFXBURSTSIZE16 2 >>>> + >>>> /* Panel Configuration */ >>>> struct panel_config { >>>> u32 timing_h; >>> most defines in omap dss use the location in the silicon itself. >>> For consistency you might want to shift these values to the >>> appropriate place. (or just use 32 mode so you can drop most >>> if not all of them) >>> >> >> These aren't offsets against a base address. These are input values >> for the various sections of the dss registers. For example >> the /* GFX burst size */ defines are values for >> DISPC_GFX_ATTRIBUTES[7:6]. >> > > What I mean is that the defines currently in dss.h already shift the > values to the location where the hardware expects them, e.g.. > > /* Configure VENC DSS Params */ > #define VENC_CLK_ENABLE (1 << 3) > #define DAC_DEMEN (1 << 4) > #define DAC_POWERDN (1 << 5) > #define VENC_OUT_SEL (1 << 6) > > The defines you add are not shifted however, so after this patch half > of the defines need shifting, the other half does not. Thats confusing, > so macro's like > > #define GFXBURSTSIZE8 (1 << 6) > > is a better option in my opinion. OK now I understand. Some of these could indeed be shifted, and I'll do that in a V2, but LCD_INTERFACE_* and *_DISPLAY cannot be shifted, because they are passed to a function that expects them to be unshifted (omap3_dss_panel_config). > > Regards, > Jeroen >
diff --git a/arch/arm/include/asm/arch-omap3/dss.h b/arch/arm/include/asm/arch-omap3/dss.h index ffaffbb..cb6d746 100644 --- a/arch/arm/include/asm/arch-omap3/dss.h +++ b/arch/arm/include/asm/arch-omap3/dss.h @@ -167,6 +167,41 @@ struct venc_regs { #define VENC_OUT_SEL (1 << 6) #define DIG_LPP_SHIFT 16 +/* LCD display type */ +#define PASSIVE_DISPLAY 0 +#define ACTIVE_DISPLAY 1 + +/* TFTDATALINES */ +#define LCD_INTERFACE_12_BIT 0 +#define LCD_INTERFACE_16_BIT 1 +#define LCD_INTERFACE_18_BIT 2 +#define LCD_INTERFACE_24_BIT 3 + +/* Polarity */ +#define DSS_IVS (1 << 12) +#define DSS_IHS (1 << 13) +#define DSS_IPC (1 << 14) +#define DSS_IEO (1 << 15) + +/* GFX format */ +#define GFXFORMAT_BITMAP1 0x0 +#define GFXFORMAT_BITMAP2 0x1 +#define GFXFORMAT_BITMAP4 0x2 +#define GFXFORMAT_BITMAP8 0x3 +#define GFXFORMAT_RGB12 0x4 +#define GFXFORMAT_ARGB16 0x5 +#define GFXFORMAT_RGB16 0x6 +#define GFXFORMAT_RGB24_UNPACKED 0x8 +#define GFXFORMAT_RGB24_PACKED 0x9 +#define GFXFORMAT_ARGB32 0xC +#define GFXFORMAT_RGBA32 0xD +#define GFXFORMAT_RGBx32 0xE + +/* GFX burst size */ +#define GFXBURSTSIZE4 0 +#define GFXBURSTSIZE8 1 +#define GFXBURSTSIZE16 2 + /* Panel Configuration */ struct panel_config { u32 timing_h;