Message ID | 1353949160-26803-267-git-send-email-herton.krzesinski@canonical.com |
---|---|
State | New |
Headers | show |
On Mon, 2012-11-26 at 14:59 -0200, Herton Ronaldo Krzesinski wrote: > 3.5.7u1 -stable review patch. If anyone has any objections, please let me know. > > ------------------ > > From: Paul Walmsley <paul@pwsan.com> > > commit 39141ddfb63a664f26d3f42f64ee386e879b492c upstream. > > After commit 846a136881b8f73c1f74250bf6acfaa309cab1f2 ("ARM: vfp: fix > saving d16-d31 vfp registers on v6+ kernels"), the OMAP 2430SDP board > started crashing during boot with omap2plus_defconfig: [...] > [ herton: no uapi directory on 3.5 ] > Signed-off-by: Herton Ronaldo Krzesinski <herton.krzesinski@canonical.com> [...] I've also queued this up for 3.2. Greg, you'll want to add this to the other 3.x series since you applied commit 846a136881b8. Ben.
On Mon, Dec 10, 2012 at 12:28:54AM +0000, Ben Hutchings wrote: > On Mon, 2012-11-26 at 14:59 -0200, Herton Ronaldo Krzesinski wrote: > > 3.5.7u1 -stable review patch. If anyone has any objections, please let me know. > > > > ------------------ > > > > From: Paul Walmsley <paul@pwsan.com> > > > > commit 39141ddfb63a664f26d3f42f64ee386e879b492c upstream. > > > > After commit 846a136881b8f73c1f74250bf6acfaa309cab1f2 ("ARM: vfp: fix > > saving d16-d31 vfp registers on v6+ kernels"), the OMAP 2430SDP board > > started crashing during boot with omap2plus_defconfig: > [...] > > [ herton: no uapi directory on 3.5 ] > > Signed-off-by: Herton Ronaldo Krzesinski <herton.krzesinski@canonical.com> > [...] > > I've also queued this up for 3.2. Greg, you'll want to add this to the > other 3.x series since you applied commit 846a136881b8. Thanks for letting me know, I've now queued it up after having to fix it up a bit by hand for the 3.0-stable tree. greg k-h
diff --git a/arch/arm/include/asm/hwcap.h b/arch/arm/include/asm/hwcap.h index 9176261..a2fe893 100644 --- a/arch/arm/include/asm/hwcap.h +++ b/arch/arm/include/asm/hwcap.h @@ -18,11 +18,12 @@ #define HWCAP_THUMBEE (1 << 11) #define HWCAP_NEON (1 << 12) #define HWCAP_VFPv3 (1 << 13) -#define HWCAP_VFPv3D16 (1 << 14) +#define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */ #define HWCAP_TLS (1 << 15) #define HWCAP_VFPv4 (1 << 16) #define HWCAP_IDIVA (1 << 17) #define HWCAP_IDIVT (1 << 18) +#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */ #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) #if defined(__KERNEL__) diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h index bf53047..c49c8f7 100644 --- a/arch/arm/include/asm/vfpmacros.h +++ b/arch/arm/include/asm/vfpmacros.h @@ -27,9 +27,9 @@ #if __LINUX_ARM_ARCH__ <= 6 ldr \tmp, =elf_hwcap @ may not have MVFR regs ldr \tmp, [\tmp, #0] - tst \tmp, #HWCAP_VFPv3D16 - ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} - addne \base, \base, #32*4 @ step over unused register space + tst \tmp, #HWCAP_VFPD32 + ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} + addeq \base, \base, #32*4 @ step over unused register space #else VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field @@ -51,9 +51,9 @@ #if __LINUX_ARM_ARCH__ <= 6 ldr \tmp, =elf_hwcap @ may not have MVFR regs ldr \tmp, [\tmp, #0] - tst \tmp, #HWCAP_VFPv3D16 - stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} - addne \base, \base, #32*4 @ step over unused register space + tst \tmp, #HWCAP_VFPD32 + stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} + addeq \base, \base, #32*4 @ step over unused register space #else VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index c834b32..3b44e0d 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c @@ -701,11 +701,14 @@ static int __init vfp_init(void) elf_hwcap |= HWCAP_VFPv3; /* - * Check for VFPv3 D16. CPUs in this configuration - * only have 16 x 64bit registers. + * Check for VFPv3 D16 and VFPv4 D16. CPUs in + * this configuration only have 16 x 64bit + * registers. */ if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1) - elf_hwcap |= HWCAP_VFPv3D16; + elf_hwcap |= HWCAP_VFPv3D16; /* also v4-D16 */ + else + elf_hwcap |= HWCAP_VFPD32; } #endif /*