| Message ID | 1353942801-24441-1-git-send-email-petar.jovanovic@rt-rk.com |
|---|---|
| State | New |
| Headers | show |
> -----Original Message----- > From: qemu-devel-bounces+ericj=mips.com@nongnu.org [mailto:qemu-devel- > bounces+ericj=mips.com@nongnu.org] On Behalf Of Petar Jovanovic > Sent: Monday, November 26, 2012 7:13 AM > To: qemu-devel@nongnu.org > Cc: Jovanovic, Petar; aurelien@aurel32.net > Subject: [Qemu-devel] [PATCH] target-mips: Fix incorrect code and test for > INSV > > From: Petar Jovanovic <petarj@mips.com> > > Content of register rs should be shifted for pos before applying a mask. > This change contains both fix for the instruction and to the existing > test. > > Signed-off-by: Petar Jovanovic <petarj@mips.com> > --- > target-mips/dsp_helper.c | 2 +- > tests/tcg/mips/mips32-dsp/insv.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c > index e7949c2..fda5f04 100644 > --- a/target-mips/dsp_helper.c > +++ b/target-mips/dsp_helper.c > @@ -3152,7 +3152,7 @@ target_ulong helper_##name(CPUMIPSState *env, > target_ulong rs, \ > \ > filter = ((int32_t)0x01 << size) - 1; \ > filter = filter << pos; \ > - temprs = rs & filter; \ > + temprs = (rs << pos) & filter; \ > temprt = rt & ~filter; \ > temp = temprs | temprt; \ > \ > diff --git a/tests/tcg/mips/mips32-dsp/insv.c b/tests/tcg/mips/mips32- > dsp/insv.c > index 7e3b047..243b007 100644 > --- a/tests/tcg/mips/mips32-dsp/insv.c > +++ b/tests/tcg/mips/mips32-dsp/insv.c > @@ -10,7 +10,7 @@ int main() > dsp = 0x305; > rt = 0x12345678; > rs = 0x87654321; > - result = 0x12345338; > + result = 0x12345438; > __asm > ("wrdsp %2, 0x03\n\t" > "insv %0, %1\n\t" > -- > 1.7.5.4 > Reviewed-by: Eric Johnson <ericj@mips.com>
On Mon, Nov 26, 2012 at 04:13:21PM +0100, Petar Jovanovic wrote: > From: Petar Jovanovic <petarj@mips.com> > > Content of register rs should be shifted for pos before applying a mask. > This change contains both fix for the instruction and to the existing test. > > Signed-off-by: Petar Jovanovic <petarj@mips.com> > --- > target-mips/dsp_helper.c | 2 +- > tests/tcg/mips/mips32-dsp/insv.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c > index e7949c2..fda5f04 100644 > --- a/target-mips/dsp_helper.c > +++ b/target-mips/dsp_helper.c > @@ -3152,7 +3152,7 @@ target_ulong helper_##name(CPUMIPSState *env, target_ulong rs, \ > \ > filter = ((int32_t)0x01 << size) - 1; \ > filter = filter << pos; \ > - temprs = rs & filter; \ > + temprs = (rs << pos) & filter; \ > temprt = rt & ~filter; \ > temp = temprs | temprt; \ > \ > diff --git a/tests/tcg/mips/mips32-dsp/insv.c b/tests/tcg/mips/mips32-dsp/insv.c > index 7e3b047..243b007 100644 > --- a/tests/tcg/mips/mips32-dsp/insv.c > +++ b/tests/tcg/mips/mips32-dsp/insv.c > @@ -10,7 +10,7 @@ int main() > dsp = 0x305; > rt = 0x12345678; > rs = 0x87654321; > - result = 0x12345338; > + result = 0x12345438; > __asm > ("wrdsp %2, 0x03\n\t" > "insv %0, %1\n\t" Thanks, applied. I added a CC: to qemu-stable@nongnu.org, as it is definitely stable material.
diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c index e7949c2..fda5f04 100644 --- a/target-mips/dsp_helper.c +++ b/target-mips/dsp_helper.c @@ -3152,7 +3152,7 @@ target_ulong helper_##name(CPUMIPSState *env, target_ulong rs, \ \ filter = ((int32_t)0x01 << size) - 1; \ filter = filter << pos; \ - temprs = rs & filter; \ + temprs = (rs << pos) & filter; \ temprt = rt & ~filter; \ temp = temprs | temprt; \ \ diff --git a/tests/tcg/mips/mips32-dsp/insv.c b/tests/tcg/mips/mips32-dsp/insv.c index 7e3b047..243b007 100644 --- a/tests/tcg/mips/mips32-dsp/insv.c +++ b/tests/tcg/mips/mips32-dsp/insv.c @@ -10,7 +10,7 @@ int main() dsp = 0x305; rt = 0x12345678; rs = 0x87654321; - result = 0x12345338; + result = 0x12345438; __asm ("wrdsp %2, 0x03\n\t" "insv %0, %1\n\t"