@@ -1487,9 +1487,7 @@ rtx_equal_for_memref_p (const_rtx x, const_rtx y)
case VALUE:
CASE_CONST_UNIQUE:
- /* There's no need to compare the contents of CONST_DOUBLEs or
- CONST_INTs because pointer equality is a good enough
- comparison for these nodes. */
+ /* Pointer equality guarantees equality for these nodes. */
return 0;
default:
@@ -671,20 +671,24 @@ c_getstr (tree src)
return TREE_STRING_POINTER (src) + tree_low_cst (offset_node, 1);
}
-/* Return a CONST_INT or CONST_DOUBLE corresponding to target reading
+/* Return a constant integer corresponding to target reading
GET_MODE_BITSIZE (MODE) bits from string constant STR. */
static rtx
c_readstr (const char *str, enum machine_mode mode)
{
- HOST_WIDE_INT c[2];
+ wide_int c;
HOST_WIDE_INT ch;
unsigned int i, j;
+ HOST_WIDE_INT tmp[MAX_BITSIZE_MODE_ANY_INT / HOST_BITS_PER_WIDE_INT];
+ unsigned int len = (GET_MODE_PRECISION (mode) + HOST_BITS_PER_WIDE_INT - 1)
+ / HOST_BITS_PER_WIDE_INT;
+
+ for (i = 0; i < len; i++)
+ tmp[i] = 0;
gcc_assert (GET_MODE_CLASS (mode) == MODE_INT);
- c[0] = 0;
- c[1] = 0;
ch = 1;
for (i = 0; i < GET_MODE_SIZE (mode); i++)
{
@@ -695,13 +699,14 @@ c_readstr (const char *str, enum machine_mode mode)
&& GET_MODE_SIZE (mode) >= UNITS_PER_WORD)
j = j + UNITS_PER_WORD - 2 * (j % UNITS_PER_WORD) - 1;
j *= BITS_PER_UNIT;
- gcc_assert (j < HOST_BITS_PER_DOUBLE_INT);
if (ch)
ch = (unsigned char) str[i];
- c[j / HOST_BITS_PER_WIDE_INT] |= ch << (j % HOST_BITS_PER_WIDE_INT);
+ tmp[j / HOST_BITS_PER_WIDE_INT] |= ch << (j % HOST_BITS_PER_WIDE_INT);
}
- return immed_double_const (c[0], c[1], mode);
+
+ c = wide_int::from_array (tmp, len, mode);
+ return immed_wide_int_const (c, mode);
}
/* Cast a target constant CST to target CHAR and if that value fits into
@@ -4998,12 +5003,12 @@ expand_builtin_signbit (tree exp, rtx target)
if (bitpos < GET_MODE_BITSIZE (rmode))
{
- double_int mask = double_int_zero.set_bit (bitpos);
+ wide_int mask = wide_int::set_bit_in_zero (bitpos, rmode);
if (GET_MODE_SIZE (imode) > GET_MODE_SIZE (rmode))
temp = gen_lowpart (rmode, temp);
temp = expand_binop (rmode, and_optab, temp,
- immed_double_int_const (mask, rmode),
+ immed_wide_int_const (mask, rmode),
NULL_RTX, 1, OPTAB_LIB_WIDEN);
}
else
@@ -2660,23 +2660,15 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
offset = -1;
}
- if (offset >= 0
- && (GET_MODE_PRECISION (GET_MODE (SET_DEST (temp)))
- <= HOST_BITS_PER_DOUBLE_INT))
+ if (offset >= 0)
{
- double_int m, o, i;
+ wide_int o;
rtx inner = SET_SRC (PATTERN (i3));
rtx outer = SET_SRC (temp);
-
- o = rtx_to_double_int (outer);
- i = rtx_to_double_int (inner);
-
- m = double_int::mask (width);
- i &= m;
- m = m.llshift (offset, HOST_BITS_PER_DOUBLE_INT);
- i = i.llshift (offset, HOST_BITS_PER_DOUBLE_INT);
- o = o.and_not (m) | i;
-
+
+ o = (wide_int::from_rtx (outer, GET_MODE (SET_DEST (temp)))
+ .insert (wide_int::from_rtx (inner, GET_MODE (dest)),
+ offset, width));
combine_merges++;
subst_insn = i3;
subst_low_luid = DF_INSN_LUID (i2);
@@ -2687,8 +2679,8 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
/* Replace the source in I2 with the new constant and make the
resulting insn the new pattern for I3. Then skip to where we
validate the pattern. Everything was set up above. */
- SUBST (SET_SRC (temp),
- immed_double_int_const (o, GET_MODE (SET_DEST (temp))));
+ SUBST (SET_SRC (temp),
+ immed_wide_int_const (o, GET_MODE (SET_DEST (temp))));
newpat = PATTERN (i2);
@@ -5106,7 +5098,7 @@ subst (rtx x, rtx from, rtx to, int in_dest, int in_cond, int unique_copy)
if (! x)
x = gen_rtx_CLOBBER (mode, const0_rtx);
}
- else if (CONST_INT_P (new_rtx)
+ else if (CONST_SCALAR_INT_P (new_rtx)
&& GET_CODE (x) == ZERO_EXTEND)
{
x = simplify_unary_operation (ZERO_EXTEND, GET_MODE (x),
@@ -56,6 +56,9 @@ typedef const struct rtx_def *const_rtx;
struct rtvec_def;
typedef struct rtvec_def *rtvec;
typedef const struct rtvec_def *const_rtvec;
+struct hwivec_def;
+typedef struct hwivec_def *hwivec;
+typedef const struct hwivec_def *const_hwivec;
union tree_node;
typedef union tree_node *tree;
union gimple_statement_d;
@@ -2333,15 +2333,23 @@ hash_rtx_cb (const_rtx x, enum machine_mode mode,
+ (unsigned int) INTVAL (x));
return hash;
+ case CONST_WIDE_INT:
+ {
+ int i;
+ for (i = 0; i < CONST_WIDE_INT_NUNITS (x); i++)
+ hash += CONST_WIDE_INT_ELT (x, i);
+ }
+ return hash;
+
case CONST_DOUBLE:
/* This is like the general case, except that it only counts
the integers representing the constant. */
hash += (unsigned int) code + (unsigned int) GET_MODE (x);
- if (GET_MODE (x) != VOIDmode)
- hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
- else
+ if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (x) == VOIDmode)
hash += ((unsigned int) CONST_DOUBLE_LOW (x)
+ (unsigned int) CONST_DOUBLE_HIGH (x));
+ else
+ hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
return hash;
case CONST_FIXED:
@@ -3758,6 +3766,7 @@ equiv_constant (rtx x)
/* See if we previously assigned a constant value to this SUBREG. */
if ((new_rtx = lookup_as_function (x, CONST_INT)) != 0
+ || (new_rtx = lookup_as_function (x, CONST_WIDE_INT)) != 0
|| (new_rtx = lookup_as_function (x, CONST_DOUBLE)) != 0
|| (new_rtx = lookup_as_function (x, CONST_FIXED)) != 0)
return new_rtx;
@@ -925,8 +925,7 @@ rtx_equal_for_cselib_1 (rtx x, rtx y, enum machine_mode memmode)
/* These won't be handled correctly by the code below. */
switch (GET_CODE (x))
{
- case CONST_DOUBLE:
- case CONST_FIXED:
+ CASE_CONST_UNIQUE:
case DEBUG_EXPR:
return 0;
@@ -1120,15 +1119,23 @@ cselib_hash_rtx (rtx x, int create, enum machine_mode memmode)
hash += ((unsigned) CONST_INT << 7) + INTVAL (x);
return hash ? hash : (unsigned int) CONST_INT;
+ case CONST_WIDE_INT:
+ {
+ int i;
+ for (i = 0; i < CONST_WIDE_INT_NUNITS (x); i++)
+ hash += CONST_WIDE_INT_ELT (x, i);
+ }
+ return hash;
+
case CONST_DOUBLE:
/* This is like the general case, except that it only counts
the integers representing the constant. */
hash += (unsigned) code + (unsigned) GET_MODE (x);
- if (GET_MODE (x) != VOIDmode)
- hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
- else
+ if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (x) == VOIDmode)
hash += ((unsigned) CONST_DOUBLE_LOW (x)
+ (unsigned) CONST_DOUBLE_HIGH (x));
+ else
+ hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
return hash ? hash : (unsigned int) CONST_DOUBLE;
case CONST_FIXED:
@@ -1406,6 +1406,14 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
#define SWITCHABLE_TARGET 0
#endif
+/* If the target supports integers that are wider than two
+ HOST_WIDE_INTs on the host compiler, then the target should define
+ TARGET_SUPPORTS_WIDE_INT and make the appropriate fixups.
+ Otherwise the compiler really is not robust. */
+#ifndef TARGET_SUPPORTS_WIDE_INT
+#define TARGET_SUPPORTS_WIDE_INT 0
+#endif
+
#endif /* GCC_INSN_FLAGS_H */
#endif /* ! GCC_DEFAULTS_H */
@@ -1533,17 +1533,22 @@ Similarly, there is only one object for the integer whose value is
@findex const_double
@item (const_double:@var{m} @var{i0} @var{i1} @dots{})
-Represents either a floating-point constant of mode @var{m} or an
-integer constant too large to fit into @code{HOST_BITS_PER_WIDE_INT}
-bits but small enough to fit within twice that number of bits (GCC
-does not provide a mechanism to represent even larger constants). In
-the latter case, @var{m} will be @code{VOIDmode}. For integral values
-constants for modes with more bits than twice the number in
-@code{HOST_WIDE_INT} the implied high order bits of that constant are
-copies of the top bit of @code{CONST_DOUBLE_HIGH}. Note however that
-integral values are neither inherently signed nor inherently unsigned;
-where necessary, signedness is determined by the rtl operation
-instead.
+This represents either a floating-point constant of mode @var{m} or
+(on ports older ports that do not define
+@code{TARGET_SUPPORTS_WIDE_INT}) an integer constant too large to fit
+into @code{HOST_BITS_PER_WIDE_INT} bits but small enough to fit within
+twice that number of bits (GCC does not provide a mechanism to
+represent even larger constants). In the latter case, @var{m} will be
+@code{VOIDmode}. For integral values constants for modes with more
+bits than twice the number in @code{HOST_WIDE_INT} the implied high
+order bits of that constant are copies of the top bit of
+@code{CONST_DOUBLE_HIGH}. Note however that integral values are
+neither inherently signed nor inherently unsigned; where necessary,
+signedness is determined by the rtl operation instead.
+
+On more modern ports, @code{CONST_DOUBLE} only represents floating
+point values. New ports define to @code{TARGET_SUPPORTS_WIDE_INT} to
+make this designation.
@findex CONST_DOUBLE_LOW
If @var{m} is @code{VOIDmode}, the bits of the value are stored in
@@ -1558,6 +1563,37 @@ machine's or host machine's floating point format. To convert them to
the precise bit pattern used by the target machine, use the macro
@code{REAL_VALUE_TO_TARGET_DOUBLE} and friends (@pxref{Data Output}).
+@findex CONST_WIDE_INT
+@item (const_wide_int:@var{m} @var{nunits} @var{elt0} @dots{})
+This contains an array of @code{HOST_WIDE_INTS} that is large enough
+to hold any constant that can be represented on the target. This form
+of rtl is only used on targets that define
+@code{TARGET_SUPPORTS_WIDE_INT} to be non zero and then
+@code{CONST_DOUBLES} are only used to hold floating point values. If
+the target leaves @code{TARGET_SUPPORTS_WIDE_INT} defined as 0,
+@code{CONST_WIDE_INT}s are not used and @code{CONST_DOUBLE}s are as
+they were before.
+
+The values are stored in a compressed format. The higher order
+0s or -1s are not represented if they are just the logical sign
+extension of the number that is represented.
+
+@findex CONST_WIDE_INT_VEC
+@item CONST_WIDE_INT_VEC (@var{code})
+Returns the entire array of @code{HOST_WIDE_INT}s that are used to
+store the value. This macro should be rarely used.
+
+@findex CONST_WIDE_INT_NUNITS
+@item CONST_WIDE_INT_NUNITS (@var{code})
+The number of @code{HOST_WIDE_INT}s used to represent the number.
+Note that this generally be smaller than the number of
+@code{HOST_WIDE_INT}s implied by the mode size.
+
+@findex CONST_WIDE_INT_ELT
+@item CONST_WIDE_INT_NUNITS (@var{code},@var{i})
+Returns the @code{i}th element of the array. Element 0 is contains
+the low order bits of the constant.
+
@findex const_fixed
@item (const_fixed:@var{m} @dots{})
Represents a fixed-point constant of mode @var{m}.
@@ -11336,3 +11336,48 @@ memory model bits are allowed.
@deftypevr {Target Hook} {unsigned char} TARGET_ATOMIC_TEST_AND_SET_TRUEVAL
This value should be set if the result written by @code{atomic_test_and_set} is not exactly 1, i.e. the @code{bool} @code{true}.
@end deftypevr
+@defmac TARGET_SUPPORTS_WIDE_INT
+
+On older ports, large integers are stored in @code{CONST_DOUBLE} rtl
+objects. Newer ports define @code{TARGET_SUPPORTS_WIDE_INT} to be non
+zero to indicate that large integers are stored in
+@code{CONST_WIDE_INT} rtl objects. The @code{CONST_WIDE_INT} allows
+very large integer constants to be represented. @code{CONST_DOUBLE}
+are limited to twice the size of host's @code{HOST_WIDE_INT}
+representation.
+
+Converting a port mostly requires looking for the places where
+@code{CONST_DOUBLES} are used with @code{VOIDmode} and replacing that
+code with code that accesses @code{CONST_WIDE_INT}s. @code{"grep -i
+const_double"} at the port level gets you to 95% of the changes that
+need to be made. There are a few places that require a deeper look.
+
+@itemize @bullet
+@item
+There is no equivalent to @code{hval} and @code{lval} for
+@code{CONST_WIDE_INT}s. This would be difficult to express in the md
+language since there are a variable number of elements.
+
+Most ports only check that @code{hval} is either 0 or -1 to see if the
+value is small. As mentioned above, this will no longer be necessary
+since small constants are always @code{CONST_INT}. Of course there
+are still a few exceptions, the alpha's constraint used by the zap
+instruction certainly requires careful examination by C code.
+However, all the current code does is pass the hval and lval to C
+code, so evolving the c code to look at the @code{CONST_WIDE_INT} is
+not really a large change.
+
+@item
+Because there is no standard template that ports use to materialize
+constants, there is likely to be some futzing that is unique to each
+port in this code.
+
+@item
+The rtx costs may have to be adjusted to properly account for larger
+constants that are represented as @code{CONST_WIDE_INT}.
+@end itemize
+
+All and all it does not takes long to convert ports that the
+maintainer is familiar with.
+
+@end defmac
@@ -11172,3 +11172,48 @@ memory model bits are allowed.
@end deftypefn
@hook TARGET_ATOMIC_TEST_AND_SET_TRUEVAL
+@defmac TARGET_SUPPORTS_WIDE_INT
+
+On older ports, large integers are stored in @code{CONST_DOUBLE} rtl
+objects. Newer ports define @code{TARGET_SUPPORTS_WIDE_INT} to be non
+zero to indicate that large integers are stored in
+@code{CONST_WIDE_INT} rtl objects. The @code{CONST_WIDE_INT} allows
+very large integer constants to be represented. @code{CONST_DOUBLE}
+are limited to twice the size of host's @code{HOST_WIDE_INT}
+representation.
+
+Converting a port mostly requires looking for the places where
+@code{CONST_DOUBLES} are used with @code{VOIDmode} and replacing that
+code with code that accesses @code{CONST_WIDE_INT}s. @samp{"grep -i
+const_double"} at the port level gets you to 95% of the changes that
+need to be made. There are a few places that require a deeper look.
+
+@itemize @bullet
+@item
+There is no equivalent to @code{hval} and @code{lval} for
+@code{CONST_WIDE_INT}s. This would be difficult to express in the md
+language since there are a variable number of elements.
+
+Most ports only check that @code{hval} is either 0 or -1 to see if the
+value is small. As mentioned above, this will no longer be necessary
+since small constants are always @code{CONST_INT}. Of course there
+are still a few exceptions, the alpha's constraint used by the zap
+instruction certainly requires careful examination by C code.
+However, all the current code does is pass the hval and lval to C
+code, so evolving the c code to look at the @code{CONST_WIDE_INT} is
+not really a large change.
+
+@item
+Because there is no standard template that ports use to materialize
+constants, there is likely to be some futzing that is unique to each
+port in this code.
+
+@item
+The rtx costs may have to be adjusted to properly account for larger
+constants that are represented as @code{CONST_WIDE_INT}.
+@end itemize
+
+All and all it does not takes long to convert ports that the
+maintainer is familiar with.
+
+@end defmac
@@ -144,6 +144,7 @@ static bool
prefer_and_bit_test (enum machine_mode mode, int bitnum)
{
bool speed_p;
+ wide_int mask = wide_int::set_bit_in_zero (bitnum, mode);
if (and_test == 0)
{
@@ -164,8 +165,7 @@ prefer_and_bit_test (enum machine_mode mode, int bitnum)
}
/* Fill in the integers. */
- XEXP (and_test, 1)
- = immed_double_int_const (double_int_zero.set_bit (bitnum), mode);
+ XEXP (and_test, 1) = immed_wide_int_const (mask, mode);
XEXP (XEXP (shift_test, 0), 1) = GEN_INT (bitnum);
speed_p = optimize_insn_for_speed_p ();
@@ -325,6 +325,17 @@ dump_struct_debug (tree type, enum debug_info_usage usage,
#endif
+
+/* Get the number of host wide ints needed to represent the precision
+ of the number. */
+
+static unsigned int
+get_full_len (const wide_int &op)
+{
+ return ((op.get_precision () + HOST_BITS_PER_WIDE_INT - 1)
+ / HOST_BITS_PER_WIDE_INT);
+}
+
static bool
should_emit_struct_debug (tree type, enum debug_info_usage usage)
{
@@ -1356,6 +1367,9 @@ dw_val_equal_p (dw_val_node *a, dw_val_node *b)
return (a->v.val_double.high == b->v.val_double.high
&& a->v.val_double.low == b->v.val_double.low);
+ case dw_val_class_wide_int:
+ return a->v.val_wide == b->v.val_wide;
+
case dw_val_class_vec:
{
size_t a_len = a->v.val_vec.elt_size * a->v.val_vec.length;
@@ -1612,6 +1626,10 @@ size_of_loc_descr (dw_loc_descr_ref loc)
case dw_val_class_const_double:
size += HOST_BITS_PER_DOUBLE_INT / BITS_PER_UNIT;
break;
+ case dw_val_class_wide_int:
+ size += (get_full_len (loc->dw_loc_oprnd2.v.val_wide)
+ * HOST_BITS_PER_WIDE_INT / BITS_PER_UNIT);
+ break;
default:
gcc_unreachable ();
}
@@ -1789,6 +1807,20 @@ output_loc_operands (dw_loc_descr_ref loc, int for_eh_or_skip)
second, NULL);
}
break;
+ case dw_val_class_wide_int:
+ {
+ int i;
+ int len = get_full_len (val2->v.val_wide);
+ if (WORDS_BIG_ENDIAN)
+ for (i = len; i >= 0; --i)
+ dw2_asm_output_data (HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR,
+ val2->v.val_wide.elt (i), NULL);
+ else
+ for (i = 0; i < len; ++i)
+ dw2_asm_output_data (HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR,
+ val2->v.val_wide.elt (i), NULL);
+ }
+ break;
case dw_val_class_addr:
gcc_assert (val1->v.val_unsigned == DWARF2_ADDR_SIZE);
dw2_asm_output_addr_rtx (DWARF2_ADDR_SIZE, val2->v.val_addr, NULL);
@@ -1998,6 +2030,21 @@ output_loc_operands (dw_loc_descr_ref loc, int for_eh_or_skip)
dw2_asm_output_data (l, second, NULL);
}
break;
+ case dw_val_class_wide_int:
+ {
+ int i;
+ int len = get_full_len (val2->v.val_wide);
+ l = HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR;
+
+ dw2_asm_output_data (1, len * l, NULL);
+ if (WORDS_BIG_ENDIAN)
+ for (i = len; i >= 0; --i)
+ dw2_asm_output_data (l, val2->v.val_wide.elt (i), NULL);
+ else
+ for (i = 0; i < len; ++i)
+ dw2_asm_output_data (l, val2->v.val_wide.elt (i), NULL);
+ }
+ break;
default:
gcc_unreachable ();
}
@@ -3096,7 +3143,7 @@ static void add_AT_location_description (dw_die_ref, enum dwarf_attribute,
static void add_data_member_location_attribute (dw_die_ref, tree);
static bool add_const_value_attribute (dw_die_ref, rtx);
static void insert_int (HOST_WIDE_INT, unsigned, unsigned char *);
-static void insert_double (double_int, unsigned char *);
+static void insert_wide_int (const wide_int &, unsigned char *);
static void insert_float (const_rtx, unsigned char *);
static rtx rtl_for_decl_location (tree);
static bool add_location_or_const_value_attribute (dw_die_ref, tree, bool,
@@ -3721,6 +3768,20 @@ AT_unsigned (dw_attr_ref a)
/* Add an unsigned double integer attribute value to a DIE. */
static inline void
+add_AT_wide (dw_die_ref die, enum dwarf_attribute attr_kind,
+ wide_int w)
+{
+ dw_attr_node attr;
+
+ attr.dw_attr = attr_kind;
+ attr.dw_attr_val.val_class = dw_val_class_wide_int;
+ attr.dw_attr_val.v.val_wide = w;
+ add_dwarf_attr (die, &attr);
+}
+
+/* Add an unsigned double integer attribute value to a DIE. */
+
+static inline void
add_AT_double (dw_die_ref die, enum dwarf_attribute attr_kind,
HOST_WIDE_INT high, unsigned HOST_WIDE_INT low)
{
@@ -5274,6 +5335,19 @@ print_die (dw_die_ref die, FILE *outfile)
a->dw_attr_val.v.val_double.high,
a->dw_attr_val.v.val_double.low);
break;
+ case dw_val_class_wide_int:
+ {
+ int i = a->dw_attr_val.v.val_wide.get_len ();
+ fprintf (outfile, "constant (");
+ gcc_assert (i > 0);
+ if (a->dw_attr_val.v.val_wide.elt (i) == 0)
+ fprintf (outfile, "0x");
+ fprintf (outfile, HOST_WIDE_INT_PRINT_HEX, a->dw_attr_val.v.val_wide.elt (--i));
+ while (-- i >= 0)
+ fprintf (outfile, HOST_WIDE_INT_PRINT_PADDED_HEX, a->dw_attr_val.v.val_wide.elt (i));
+ fprintf (outfile, ")");
+ break;
+ }
case dw_val_class_vec:
fprintf (outfile, "floating-point or vector constant");
break;
@@ -5429,6 +5503,9 @@ attr_checksum (dw_attr_ref at, struct md5_ctx *ctx, int *mark)
case dw_val_class_const_double:
CHECKSUM (at->dw_attr_val.v.val_double);
break;
+ case dw_val_class_wide_int:
+ CHECKSUM (at->dw_attr_val.v.val_wide);
+ break;
case dw_val_class_vec:
CHECKSUM (at->dw_attr_val.v.val_vec);
break;
@@ -5699,6 +5776,12 @@ attr_checksum_ordered (enum dwarf_tag tag, dw_attr_ref at,
CHECKSUM (at->dw_attr_val.v.val_double);
break;
+ case dw_val_class_wide_int:
+ CHECKSUM_ULEB128 (DW_FORM_block);
+ CHECKSUM_ULEB128 (sizeof (at->dw_attr_val.v.val_wide));
+ CHECKSUM (at->dw_attr_val.v.val_wide);
+ break;
+
case dw_val_class_vec:
CHECKSUM_ULEB128 (DW_FORM_block);
CHECKSUM_ULEB128 (sizeof (at->dw_attr_val.v.val_vec));
@@ -6163,6 +6246,8 @@ same_dw_val_p (const dw_val_node *v1, const dw_val_node *v2, int *mark)
case dw_val_class_const_double:
return v1->v.val_double.high == v2->v.val_double.high
&& v1->v.val_double.low == v2->v.val_double.low;
+ case dw_val_class_wide_int:
+ return v1->v.val_wide == v2->v.val_wide;
case dw_val_class_vec:
if (v1->v.val_vec.length != v2->v.val_vec.length
|| v1->v.val_vec.elt_size != v2->v.val_vec.elt_size)
@@ -7625,6 +7710,13 @@ size_of_die (dw_die_ref die)
if (HOST_BITS_PER_WIDE_INT >= 64)
size++; /* block */
break;
+ case dw_val_class_wide_int:
+ size += (get_full_len (a->dw_attr_val.v.val_wide)
+ * HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR);
+ if (get_full_len (a->dw_attr_val.v.val_wide) * HOST_BITS_PER_WIDE_INT
+ > 64)
+ size++; /* block */
+ break;
case dw_val_class_vec:
size += constant_size (a->dw_attr_val.v.val_vec.length
* a->dw_attr_val.v.val_vec.elt_size)
@@ -7961,6 +8053,20 @@ value_format (dw_attr_ref a)
default:
return DW_FORM_block1;
}
+ case dw_val_class_wide_int:
+ switch (get_full_len (a->dw_attr_val.v.val_wide) * HOST_BITS_PER_WIDE_INT)
+ {
+ case 8:
+ return DW_FORM_data1;
+ case 16:
+ return DW_FORM_data2;
+ case 32:
+ return DW_FORM_data4;
+ case 64:
+ return DW_FORM_data8;
+ default:
+ return DW_FORM_block1;
+ }
case dw_val_class_vec:
switch (constant_size (a->dw_attr_val.v.val_vec.length
* a->dw_attr_val.v.val_vec.elt_size))
@@ -8400,6 +8506,32 @@ output_die (dw_die_ref die)
}
break;
+ case dw_val_class_wide_int:
+ {
+ int i;
+ int len = get_full_len (a->dw_attr_val.v.val_wide);
+ int l = HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR;
+ if (len * HOST_BITS_PER_WIDE_INT > 64)
+ dw2_asm_output_data (1, get_full_len (a->dw_attr_val.v.val_wide) * l,
+ NULL);
+
+ if (WORDS_BIG_ENDIAN)
+ for (i = len; i >= 0; --i)
+ {
+ dw2_asm_output_data (l, a->dw_attr_val.v.val_wide.elt (i),
+ name);
+ name = NULL;
+ }
+ else
+ for (i = 0; i < len; ++i)
+ {
+ dw2_asm_output_data (l, a->dw_attr_val.v.val_wide.elt (i),
+ name);
+ name = NULL;
+ }
+ }
+ break;
+
case dw_val_class_vec:
{
unsigned int elt_size = a->dw_attr_val.v.val_vec.elt_size;
@@ -11511,9 +11643,8 @@ clz_loc_descriptor (rtx rtl, enum machine_mode mode,
msb = GEN_INT ((unsigned HOST_WIDE_INT) 1
<< (GET_MODE_BITSIZE (mode) - 1));
else
- msb = immed_double_const (0, (unsigned HOST_WIDE_INT) 1
- << (GET_MODE_BITSIZE (mode)
- - HOST_BITS_PER_WIDE_INT - 1), mode);
+ msb = immed_wide_int_const
+ (wide_int::set_bit_in_zero (GET_MODE_PRECISION (mode) - 1, mode), mode);
if (GET_CODE (msb) == CONST_INT && INTVAL (msb) < 0)
tmp = new_loc_descr (HOST_BITS_PER_WIDE_INT == 32
? DW_OP_const4u : HOST_BITS_PER_WIDE_INT == 64
@@ -12440,7 +12571,16 @@ mem_loc_descriptor (rtx rtl, enum machine_mode mode,
mem_loc_result->dw_loc_oprnd1.val_class = dw_val_class_die_ref;
mem_loc_result->dw_loc_oprnd1.v.val_die_ref.die = type_die;
mem_loc_result->dw_loc_oprnd1.v.val_die_ref.external = 0;
- if (SCALAR_FLOAT_MODE_P (mode))
+#if TARGET_SUPPORTS_WIDE_INT == 0
+ if (!SCALAR_FLOAT_MODE_P (mode))
+ {
+ mem_loc_result->dw_loc_oprnd2.val_class
+ = dw_val_class_const_double;
+ mem_loc_result->dw_loc_oprnd2.v.val_double
+ = rtx_to_double_int (rtl);
+ }
+ else
+#endif
{
unsigned int length = GET_MODE_SIZE (mode);
unsigned char *array
@@ -12452,13 +12592,26 @@ mem_loc_descriptor (rtx rtl, enum machine_mode mode,
mem_loc_result->dw_loc_oprnd2.v.val_vec.elt_size = 4;
mem_loc_result->dw_loc_oprnd2.v.val_vec.array = array;
}
- else
- {
- mem_loc_result->dw_loc_oprnd2.val_class
- = dw_val_class_const_double;
- mem_loc_result->dw_loc_oprnd2.v.val_double
- = rtx_to_double_int (rtl);
- }
+ }
+ break;
+
+ case CONST_WIDE_INT:
+ if (!dwarf_strict)
+ {
+ dw_die_ref type_die;
+
+ type_die = base_type_for_mode (mode,
+ GET_MODE_CLASS (mode) == MODE_INT);
+ if (type_die == NULL)
+ return NULL;
+ mem_loc_result = new_loc_descr (DW_OP_GNU_const_type, 0, 0);
+ mem_loc_result->dw_loc_oprnd1.val_class = dw_val_class_die_ref;
+ mem_loc_result->dw_loc_oprnd1.v.val_die_ref.die = type_die;
+ mem_loc_result->dw_loc_oprnd1.v.val_die_ref.external = 0;
+ mem_loc_result->dw_loc_oprnd2.val_class
+ = dw_val_class_wide_int;
+ mem_loc_result->dw_loc_oprnd2.v.val_wide
+ = wide_int::from_rtx (rtl, mode);
}
break;
@@ -12929,7 +13082,15 @@ loc_descriptor (rtx rtl, enum machine_mode mode,
adequately represented. We output CONST_DOUBLEs as blocks. */
loc_result = new_loc_descr (DW_OP_implicit_value,
GET_MODE_SIZE (mode), 0);
- if (SCALAR_FLOAT_MODE_P (mode))
+#if TARGET_SUPPORTS_WIDE_INT == 0
+ if (!SCALAR_FLOAT_MODE_P (mode))
+ {
+ loc_result->dw_loc_oprnd2.val_class = dw_val_class_const_double;
+ loc_result->dw_loc_oprnd2.v.val_double
+ = rtx_to_double_int (rtl);
+ }
+ else
+#endif
{
unsigned int length = GET_MODE_SIZE (mode);
unsigned char *array
@@ -12941,12 +13102,26 @@ loc_descriptor (rtx rtl, enum machine_mode mode,
loc_result->dw_loc_oprnd2.v.val_vec.elt_size = 4;
loc_result->dw_loc_oprnd2.v.val_vec.array = array;
}
- else
- {
- loc_result->dw_loc_oprnd2.val_class = dw_val_class_const_double;
- loc_result->dw_loc_oprnd2.v.val_double
- = rtx_to_double_int (rtl);
- }
+ }
+ break;
+
+ case CONST_WIDE_INT:
+ if (mode == VOIDmode)
+ mode = GET_MODE (rtl);
+
+ if (mode != VOIDmode && (dwarf_version >= 4 || !dwarf_strict))
+ {
+ gcc_assert (mode == GET_MODE (rtl) || VOIDmode == GET_MODE (rtl));
+
+ /* Note that a CONST_DOUBLE rtx could represent either an integer
+ or a floating-point constant. A CONST_DOUBLE is used whenever
+ the constant requires more than one word in order to be
+ adequately represented. We output CONST_DOUBLEs as blocks. */
+ loc_result = new_loc_descr (DW_OP_implicit_value,
+ GET_MODE_SIZE (mode), 0);
+ loc_result->dw_loc_oprnd2.val_class = dw_val_class_wide_int;
+ loc_result->dw_loc_oprnd2.v.val_wide
+ = wide_int::from_rtx (rtl, mode);
}
break;
@@ -12962,6 +13137,7 @@ loc_descriptor (rtx rtl, enum machine_mode mode,
ggc_alloc_atomic (length * elt_size);
unsigned int i;
unsigned char *p;
+ enum machine_mode imode = GET_MODE_INNER (mode);
gcc_assert (mode == GET_MODE (rtl) || VOIDmode == GET_MODE (rtl));
switch (GET_MODE_CLASS (mode))
@@ -12970,15 +13146,8 @@ loc_descriptor (rtx rtl, enum machine_mode mode,
for (i = 0, p = array; i < length; i++, p += elt_size)
{
rtx elt = CONST_VECTOR_ELT (rtl, i);
- double_int val = rtx_to_double_int (elt);
-
- if (elt_size <= sizeof (HOST_WIDE_INT))
- insert_int (val.to_shwi (), elt_size, p);
- else
- {
- gcc_assert (elt_size == 2 * sizeof (HOST_WIDE_INT));
- insert_double (val, p);
- }
+ wide_int val = wide_int::from_rtx (elt, imode);
+ insert_wide_int (val, p);
}
break;
@@ -14603,22 +14772,27 @@ extract_int (const unsigned char *src, unsigned int size)
return val;
}
-/* Writes double_int values to dw_vec_const array. */
+/* Writes wide_int values to dw_vec_const array. */
static void
-insert_double (double_int val, unsigned char *dest)
+insert_wide_int (const wide_int &val, unsigned char *dest)
{
- unsigned char *p0 = dest;
- unsigned char *p1 = dest + sizeof (HOST_WIDE_INT);
+ int i;
if (WORDS_BIG_ENDIAN)
- {
- p0 = p1;
- p1 = dest;
- }
-
- insert_int ((HOST_WIDE_INT) val.low, sizeof (HOST_WIDE_INT), p0);
- insert_int ((HOST_WIDE_INT) val.high, sizeof (HOST_WIDE_INT), p1);
+ for (i = (int)get_full_len (val) - 1; i >= 0; i--)
+ {
+ insert_int ((HOST_WIDE_INT) val.elt (i),
+ sizeof (HOST_WIDE_INT), dest);
+ dest += sizeof (HOST_WIDE_INT);
+ }
+ else
+ for (i = 0; i < (int)get_full_len (val); i++)
+ {
+ insert_int ((HOST_WIDE_INT) val.elt (i),
+ sizeof (HOST_WIDE_INT), dest);
+ dest += sizeof (HOST_WIDE_INT);
+ }
}
/* Writes floating point values to dw_vec_const array. */
@@ -14663,6 +14837,11 @@ add_const_value_attribute (dw_die_ref die, rtx rtl)
}
return true;
+ case CONST_WIDE_INT:
+ add_AT_wide (die, DW_AT_const_value,
+ wide_int::from_rtx (rtl, GET_MODE (rtl)));
+ return true;
+
case CONST_DOUBLE:
/* Note that a CONST_DOUBLE rtx could represent either an integer or a
floating-point constant. A CONST_DOUBLE is used whenever the
@@ -14671,7 +14850,10 @@ add_const_value_attribute (dw_die_ref die, rtx rtl)
{
enum machine_mode mode = GET_MODE (rtl);
- if (SCALAR_FLOAT_MODE_P (mode))
+ if (TARGET_SUPPORTS_WIDE_INT == 0 && !SCALAR_FLOAT_MODE_P (mode))
+ add_AT_double (die, DW_AT_const_value,
+ CONST_DOUBLE_HIGH (rtl), CONST_DOUBLE_LOW (rtl));
+ else
{
unsigned int length = GET_MODE_SIZE (mode);
unsigned char *array = (unsigned char *) ggc_alloc_atomic (length);
@@ -14679,9 +14861,6 @@ add_const_value_attribute (dw_die_ref die, rtx rtl)
insert_float (rtl, array);
add_AT_vec (die, DW_AT_const_value, length / 4, 4, array);
}
- else
- add_AT_double (die, DW_AT_const_value,
- CONST_DOUBLE_HIGH (rtl), CONST_DOUBLE_LOW (rtl));
}
return true;
@@ -14694,6 +14873,7 @@ add_const_value_attribute (dw_die_ref die, rtx rtl)
(length * elt_size);
unsigned int i;
unsigned char *p;
+ enum machine_mode imode = GET_MODE_INNER (mode);
switch (GET_MODE_CLASS (mode))
{
@@ -14701,15 +14881,8 @@ add_const_value_attribute (dw_die_ref die, rtx rtl)
for (i = 0, p = array; i < length; i++, p += elt_size)
{
rtx elt = CONST_VECTOR_ELT (rtl, i);
- double_int val = rtx_to_double_int (elt);
-
- if (elt_size <= sizeof (HOST_WIDE_INT))
- insert_int (val.to_shwi (), elt_size, p);
- else
- {
- gcc_assert (elt_size == 2 * sizeof (HOST_WIDE_INT));
- insert_double (val, p);
- }
+ wide_int val = wide_int::from_rtx (elt, imode);
+ insert_wide_int (val, p);
}
break;
@@ -22753,6 +22926,9 @@ hash_loc_operands (dw_loc_descr_ref loc, hashval_t hash)
hash = iterative_hash_object (val2->v.val_double.low, hash);
hash = iterative_hash_object (val2->v.val_double.high, hash);
break;
+ case dw_val_class_wide_int:
+ hash = iterative_hash_object (val2->v.val_wide, hash);
+ break;
case dw_val_class_addr:
hash = iterative_hash_rtx (val2->v.val_addr, hash);
break;
@@ -22842,6 +23018,9 @@ hash_loc_operands (dw_loc_descr_ref loc, hashval_t hash)
hash = iterative_hash_object (val2->v.val_double.low, hash);
hash = iterative_hash_object (val2->v.val_double.high, hash);
break;
+ case dw_val_class_wide_int:
+ hash = iterative_hash_object (val2->v.val_wide, hash);
+ break;
default:
gcc_unreachable ();
}
@@ -22990,6 +23169,8 @@ compare_loc_operands (dw_loc_descr_ref x, dw_loc_descr_ref y)
case dw_val_class_const_double:
return valx2->v.val_double.low == valy2->v.val_double.low
&& valx2->v.val_double.high == valy2->v.val_double.high;
+ case dw_val_class_wide_int:
+ return valx2->v.val_wide == valy2->v.val_wide;
case dw_val_class_addr:
return rtx_equal_p (valx2->v.val_addr, valy2->v.val_addr);
default:
@@ -23033,6 +23214,8 @@ compare_loc_operands (dw_loc_descr_ref x, dw_loc_descr_ref y)
case dw_val_class_const_double:
return valx2->v.val_double.low == valy2->v.val_double.low
&& valx2->v.val_double.high == valy2->v.val_double.high;
+ case dw_val_class_wide_int:
+ return valx2->v.val_wide == valy2->v.val_wide;
default:
gcc_unreachable ();
}
@@ -22,6 +22,7 @@ along with GCC; see the file COPYING3. If not see
#define GCC_DWARF2OUT_H 1
#include "dwarf2.h" /* ??? Remove this once only used by dwarf2foo.c. */
+#include "wide-int.h"
typedef struct die_struct *dw_die_ref;
typedef const struct die_struct *const_dw_die_ref;
@@ -140,6 +141,7 @@ enum dw_val_class
dw_val_class_const,
dw_val_class_unsigned_const,
dw_val_class_const_double,
+ dw_val_class_wide_int,
dw_val_class_vec,
dw_val_class_flag,
dw_val_class_die_ref,
@@ -181,6 +183,7 @@ typedef struct GTY(()) dw_val_struct {
HOST_WIDE_INT GTY ((default)) val_int;
unsigned HOST_WIDE_INT GTY ((tag ("dw_val_class_unsigned_const"))) val_unsigned;
double_int GTY ((tag ("dw_val_class_const_double"))) val_double;
+ wide_int GTY ((tag ("dw_val_class_wide_int"))) val_wide;
dw_vec_const GTY ((tag ("dw_val_class_vec"))) val_vec;
struct dw_val_die_union
{
@@ -124,6 +124,9 @@ rtx cc0_rtx;
static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
htab_t const_int_htab;
+static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
+ htab_t const_wide_int_htab;
+
/* A hash table storing memory attribute structures. */
static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
htab_t mem_attrs_htab;
@@ -149,6 +152,11 @@ static void set_used_decls (tree);
static void mark_label_nuses (rtx);
static hashval_t const_int_htab_hash (const void *);
static int const_int_htab_eq (const void *, const void *);
+#if TARGET_SUPPORTS_WIDE_INT
+static hashval_t const_wide_int_htab_hash (const void *);
+static int const_wide_int_htab_eq (const void *, const void *);
+static rtx lookup_const_wide_int (rtx);
+#endif
static hashval_t const_double_htab_hash (const void *);
static int const_double_htab_eq (const void *, const void *);
static rtx lookup_const_double (rtx);
@@ -185,6 +193,43 @@ const_int_htab_eq (const void *x, const void *y)
return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
}
+#if TARGET_SUPPORTS_WIDE_INT
+/* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
+
+static hashval_t
+const_wide_int_htab_hash (const void *x)
+{
+ int i;
+ HOST_WIDE_INT hash = 0;
+ const_rtx xr = (const_rtx) x;
+
+ for (i = 0; i < CONST_WIDE_INT_NUNITS (xr); i++)
+ hash += CONST_WIDE_INT_ELT (xr, i);
+
+ return (hashval_t) hash;
+}
+
+/* Returns nonzero if the value represented by X (which is really a
+ CONST_WIDE_INT) is the same as that given by Y (which is really a
+ CONST_WIDE_INT). */
+
+static int
+const_wide_int_htab_eq (const void *x, const void *y)
+{
+ int i;
+ const_rtx xr = (const_rtx)x;
+ const_rtx yr = (const_rtx)y;
+ if (CONST_WIDE_INT_NUNITS (xr) != CONST_WIDE_INT_NUNITS (yr))
+ return 0;
+
+ for (i = 0; i < CONST_WIDE_INT_NUNITS (xr); i++)
+ if (CONST_WIDE_INT_ELT (xr, i) != CONST_WIDE_INT_ELT (yr, i))
+ return 0;
+
+ return 1;
+}
+#endif
+
/* Returns a hash code for X (which is really a CONST_DOUBLE). */
static hashval_t
const_double_htab_hash (const void *x)
@@ -192,7 +237,7 @@ const_double_htab_hash (const void *x)
const_rtx const value = (const_rtx) x;
hashval_t h;
- if (GET_MODE (value) == VOIDmode)
+ if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (value) == VOIDmode)
h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
else
{
@@ -212,7 +257,7 @@ const_double_htab_eq (const void *x, const void *y)
if (GET_MODE (a) != GET_MODE (b))
return 0;
- if (GET_MODE (a) == VOIDmode)
+ if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (a) == VOIDmode)
return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
&& CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
else
@@ -478,6 +523,7 @@ const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
return lookup_const_fixed (fixed);
}
+#if TARGET_SUPPORTS_WIDE_INT == 0
/* Constructs double_int from rtx CST. */
double_int
@@ -497,17 +543,61 @@ rtx_to_double_int (const_rtx cst)
return r;
}
+#endif
+#if TARGET_SUPPORTS_WIDE_INT
+/* Determine whether WIDE_INT, already exists in the hash table. If
+ so, return its counterpart; otherwise add it to the hash table and
+ return it. */
+
+static rtx
+lookup_const_wide_int (rtx wint)
+{
+ void **slot = htab_find_slot (const_wide_int_htab, wint, INSERT);
+ if (*slot == 0)
+ *slot = wint;
-/* Return a CONST_DOUBLE or CONST_INT for a value specified as
- a double_int. */
+ return (rtx) *slot;
+}
+#endif
+/* V contains a wide_int. A CONST_INT or CONST_WIDE_INT (if
+ TARGET_SUPPORTS_WIDE_INT is defined) or CONST_DOUBLE if
+ TARGET_SUPPORTS_WIDE_INT is not defined is produced based on the
+ number of HOST_WIDE_INTs that are necessary to represent the value
+ in compact form. */
rtx
-immed_double_int_const (double_int i, enum machine_mode mode)
+immed_wide_int_const (const wide_int &v, enum machine_mode mode)
{
- return immed_double_const (i.low, i.high, mode);
+ unsigned int len = v.get_len ();
+
+ if (len < 2)
+ return gen_int_mode (v.elt (0), mode);
+
+ gcc_assert (GET_MODE_PRECISION (mode) == v.get_precision ());
+ gcc_assert (GET_MODE_BITSIZE (mode) == v.get_bitsize ());
+
+#if TARGET_SUPPORTS_WIDE_INT
+ {
+ rtx value = const_wide_int_alloc (len);
+ unsigned int i;
+
+ /* It is so tempting to just put the mode in here. Must control
+ myself ... */
+ PUT_MODE (value, VOIDmode);
+ HWI_PUT_NUM_ELEM (CONST_WIDE_INT_VEC (value), len);
+
+ for (i = 0; i < len; i++)
+ CONST_WIDE_INT_ELT (value, i) = v.elt (i);
+
+ return lookup_const_wide_int (value);
+ }
+#else
+ return immed_double_const (v.elt (0), v.elt (1), mode);
+#endif
}
+#if TARGET_SUPPORTS_WIDE_INT == 0
/* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
of ints: I0 is the low-order word and I1 is the high-order word.
For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
@@ -559,6 +649,7 @@ immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
return lookup_const_double (value);
}
+#endif
rtx
gen_rtx_REG (enum machine_mode mode, unsigned int regno)
@@ -5609,11 +5700,15 @@ init_emit_once (void)
enum machine_mode mode;
enum machine_mode double_mode;
- /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
- hash tables. */
+ /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
+ CONST_FIXED, and memory attribute hash tables. */
const_int_htab = htab_create_ggc (37, const_int_htab_hash,
const_int_htab_eq, NULL);
+#if TARGET_SUPPORTS_WIDE_INT
+ const_wide_int_htab = htab_create_ggc (37, const_wide_int_htab_hash,
+ const_wide_int_htab_eq, NULL);
+#endif
const_double_htab = htab_create_ggc (37, const_double_htab_hash,
const_double_htab_eq, NULL);
@@ -97,38 +97,9 @@ plus_constant (enum machine_mode mode, rtx x, HOST_WIDE_INT c)
switch (code)
{
- case CONST_INT:
- if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
- {
- double_int di_x = double_int::from_shwi (INTVAL (x));
- double_int di_c = double_int::from_shwi (c);
-
- bool overflow;
- double_int v = di_x.add_with_sign (di_c, false, &overflow);
- if (overflow)
- gcc_unreachable ();
-
- return immed_double_int_const (v, VOIDmode);
- }
-
- return GEN_INT (INTVAL (x) + c);
-
- case CONST_DOUBLE:
- {
- double_int di_x = double_int::from_pair (CONST_DOUBLE_HIGH (x),
- CONST_DOUBLE_LOW (x));
- double_int di_c = double_int::from_shwi (c);
-
- bool overflow;
- double_int v = di_x.add_with_sign (di_c, false, &overflow);
- if (overflow)
- /* Sorry, we have no way to represent overflows this wide.
- To fix, add constant support wider than CONST_DOUBLE. */
- gcc_assert (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_DOUBLE_INT);
-
- return immed_double_int_const (v, VOIDmode);
- }
-
+ CASE_CONST_SCALAR_INT:
+ return immed_wide_int_const (wide_int::from_rtx (x, mode)
+ + wide_int::from_shwi (c, mode), mode);
case MEM:
/* If this is a reference to the constant pool, try replacing it with
a reference to a new constant. If the resulting address isn't
@@ -58,7 +58,6 @@ static void store_split_bit_field (rtx, unsigned HOST_WIDE_INT,
static rtx extract_fixed_bit_field (enum machine_mode, rtx,
unsigned HOST_WIDE_INT,
unsigned HOST_WIDE_INT, rtx, int, bool);
-static rtx mask_rtx (enum machine_mode, int, int, int);
static rtx lshift_value (enum machine_mode, rtx, int, int);
static rtx extract_split_bit_field (rtx, unsigned HOST_WIDE_INT,
unsigned HOST_WIDE_INT, int);
@@ -66,6 +65,18 @@ static void do_cmp_and_jump (rtx, rtx, enum rtx_code, enum machine_mode, rtx);
static rtx expand_smod_pow2 (enum machine_mode, rtx, HOST_WIDE_INT);
static rtx expand_sdiv_pow2 (enum machine_mode, rtx, HOST_WIDE_INT);
+/* Return a constant integer mask value of mode MODE with BITSIZE ones
+ followed by BITPOS zeros, or the complement of that if COMPLEMENT.
+ The mask is truncated if necessary to the width of mode MODE. The
+ mask is zero-extended if BITSIZE+BITPOS is too small for MODE. */
+
+static inline rtx
+mask_rtx (enum machine_mode mode, int bitpos, int bitsize, bool complement)
+{
+ return immed_wide_int_const
+ (wide_int::shifted_mask (bitpos, bitsize, complement, mode), mode);
+}
+
/* Test whether a value is zero of a power of two. */
#define EXACT_POWER_OF_2_OR_ZERO_P(x) (((x) & ((x) - 1)) == 0)
@@ -1825,39 +1836,16 @@ extract_fixed_bit_field (enum machine_mode tmode, rtx op0,
return expand_shift (RSHIFT_EXPR, mode, op0,
GET_MODE_BITSIZE (mode) - bitsize, target, 0);
}
-
-/* Return a constant integer (CONST_INT or CONST_DOUBLE) mask value
- of mode MODE with BITSIZE ones followed by BITPOS zeros, or the
- complement of that if COMPLEMENT. The mask is truncated if
- necessary to the width of mode MODE. The mask is zero-extended if
- BITSIZE+BITPOS is too small for MODE. */
-
-static rtx
-mask_rtx (enum machine_mode mode, int bitpos, int bitsize, int complement)
-{
- double_int mask;
-
- mask = double_int::mask (bitsize);
- mask = mask.llshift (bitpos, HOST_BITS_PER_DOUBLE_INT);
-
- if (complement)
- mask = ~mask;
-
- return immed_double_int_const (mask, mode);
-}
-
-/* Return a constant integer (CONST_INT or CONST_DOUBLE) rtx with the value
- VALUE truncated to BITSIZE bits and then shifted left BITPOS bits. */
+/* Return a constant integer rtx with the value VALUE truncated to
+ BITSIZE bits and then shifted left BITPOS bits. */
static rtx
lshift_value (enum machine_mode mode, rtx value, int bitpos, int bitsize)
{
- double_int val;
-
- val = double_int::from_uhwi (INTVAL (value)).zext (bitsize);
- val = val.llshift (bitpos, HOST_BITS_PER_DOUBLE_INT);
-
- return immed_double_int_const (val, mode);
+ return
+ immed_wide_int_const (wide_int::from_rtx (value, mode)
+ .zext (bitsize)
+ .lshift (bitpos, wide_int::NONE), mode);
}
/* Extract a bit field that is split across two words
@@ -3062,34 +3050,41 @@ expand_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target,
only if the constant value exactly fits in an `unsigned int' without
any truncation. This means that multiplying by negative values does
not work; results are off by 2^32 on a 32 bit machine. */
-
if (CONST_INT_P (scalar_op1))
{
coeff = INTVAL (scalar_op1);
is_neg = coeff < 0;
}
+#if TARGET_SUPPORTS_WIDE_INT
+ else if (CONST_WIDE_INT_P (scalar_op1))
+#else
else if (CONST_DOUBLE_AS_INT_P (scalar_op1))
+#endif
{
- /* If we are multiplying in DImode, it may still be a win
- to try to work with shifts and adds. */
- if (CONST_DOUBLE_HIGH (scalar_op1) == 0
- && CONST_DOUBLE_LOW (scalar_op1) > 0)
+ int p = GET_MODE_PRECISION (mode);
+ wide_int val = wide_int::from_rtx (scalar_op1, mode);
+ int shift = val.exact_log2 ();
+ /* Perfect power of 2. */
+ is_neg = false;
+ if (shift > 0)
{
- coeff = CONST_DOUBLE_LOW (scalar_op1);
- is_neg = false;
+ /* Do the shift count trucation against the bitsize, not
+ the precision. See the comment above
+ wide-int.c:trunc_shift for details. */
+ if (SHIFT_COUNT_TRUNCATED)
+ shift &= GET_MODE_BITSIZE (mode) - 1;
+ /* We could consider adding just a move of 0 to target
+ if the shift >= p */
+ if (shift < p)
+ return expand_shift (LSHIFT_EXPR, mode, op0,
+ shift, target, unsignedp);
+ /* Any positive number that fits in a word. */
+ coeff = CONST_WIDE_INT_ELT (scalar_op1, 0);
}
- else if (CONST_DOUBLE_LOW (scalar_op1) == 0)
+ else if (val.sign_mask () == 0)
{
- coeff = CONST_DOUBLE_HIGH (scalar_op1);
- if (EXACT_POWER_OF_2_OR_ZERO_P (coeff))
- {
- int shift = floor_log2 (coeff) + HOST_BITS_PER_WIDE_INT;
- if (shift < HOST_BITS_PER_DOUBLE_INT - 1
- || mode_bitsize <= HOST_BITS_PER_DOUBLE_INT)
- return expand_shift (LSHIFT_EXPR, mode, op0,
- shift, target, unsignedp);
- }
- goto skip_synth;
+ /* Any positive number that fits in a word. */
+ coeff = CONST_WIDE_INT_ELT (scalar_op1, 0);
}
else
goto skip_synth;
@@ -3579,9 +3574,10 @@ expmed_mult_highpart (enum machine_mode mode, rtx op0, rtx op1,
static rtx
expand_smod_pow2 (enum machine_mode mode, rtx op0, HOST_WIDE_INT d)
{
- unsigned HOST_WIDE_INT masklow, maskhigh;
rtx result, temp, shift, label;
int logd;
+ wide_int mask;
+ int prec = GET_MODE_PRECISION (mode);
logd = floor_log2 (d);
result = gen_reg_rtx (mode);
@@ -3594,8 +3590,8 @@ expand_smod_pow2 (enum machine_mode mode, rtx op0, HOST_WIDE_INT d)
mode, 0, -1);
if (signmask)
{
+ HOST_WIDE_INT masklow = ((HOST_WIDE_INT) 1 << logd) - 1;
signmask = force_reg (mode, signmask);
- masklow = ((HOST_WIDE_INT) 1 << logd) - 1;
shift = GEN_INT (GET_MODE_BITSIZE (mode) - logd);
/* Use the rtx_cost of a LSHIFTRT instruction to determine
@@ -3640,19 +3636,11 @@ expand_smod_pow2 (enum machine_mode mode, rtx op0, HOST_WIDE_INT d)
modulus. By including the signbit in the operation, many targets
can avoid an explicit compare operation in the following comparison
against zero. */
-
- masklow = ((HOST_WIDE_INT) 1 << logd) - 1;
- if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
- {
- masklow |= (HOST_WIDE_INT) -1 << (GET_MODE_BITSIZE (mode) - 1);
- maskhigh = -1;
- }
- else
- maskhigh = (HOST_WIDE_INT) -1
- << (GET_MODE_BITSIZE (mode) - HOST_BITS_PER_WIDE_INT - 1);
+ mask = wide_int::mask (logd, false, mode);
+ mask = mask.set_bit (prec - 1);
temp = expand_binop (mode, and_optab, op0,
- immed_double_const (masklow, maskhigh, mode),
+ immed_wide_int_const (mask, mode),
result, 1, OPTAB_LIB_WIDEN);
if (temp != result)
emit_move_insn (result, temp);
@@ -3662,10 +3650,10 @@ expand_smod_pow2 (enum machine_mode mode, rtx op0, HOST_WIDE_INT d)
temp = expand_binop (mode, sub_optab, result, const1_rtx, result,
0, OPTAB_LIB_WIDEN);
- masklow = (HOST_WIDE_INT) -1 << logd;
- maskhigh = -1;
+
+ mask = wide_int::mask (logd, true, mode);
temp = expand_binop (mode, ior_optab, temp,
- immed_double_const (masklow, maskhigh, mode),
+ immed_wide_int_const (mask, mode),
result, 1, OPTAB_LIB_WIDEN);
temp = expand_binop (mode, add_optab, temp, const1_rtx, result,
0, OPTAB_LIB_WIDEN);
@@ -4919,8 +4907,12 @@ make_tree (tree type, rtx x)
return t;
}
+ case CONST_WIDE_INT:
+ t = wide_int_to_tree (type, wide_int::from_rtx (x, TYPE_MODE (type)));
+ return t;
+
case CONST_DOUBLE:
- if (GET_MODE (x) == VOIDmode)
+ if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (x) == VOIDmode)
t = build_int_cst_wide (type,
CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x));
else
@@ -712,23 +712,23 @@ convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int uns
if (mode == oldmode)
return x;
- /* There is one case that we must handle specially: If we are converting
- a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
- we are to interpret the constant as unsigned, gen_lowpart will do
- the wrong if the constant appears negative. What we want to do is
- make the high-order word of the constant zero, not all ones. */
+ /* There is one case that we must handle specially: If we are
+ converting a CONST_INT into a mode whose size is larger than
+ HOST_BITS_PER_WIDE_INT and we are to interpret the constant as
+ unsigned, gen_lowpart will do the wrong if the constant appears
+ negative. What we want to do is make the high-order word of the
+ constant zero, not all ones. */
if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
- && GET_MODE_BITSIZE (mode) == HOST_BITS_PER_DOUBLE_INT
+ && GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT
&& CONST_INT_P (x) && INTVAL (x) < 0)
{
- double_int val = double_int::from_uhwi (INTVAL (x));
-
+ HOST_WIDE_INT val = INTVAL (x);
/* We need to zero extend VAL. */
if (oldmode != VOIDmode)
- val = val.zext (GET_MODE_BITSIZE (oldmode));
+ val &= GET_MODE_PRECISION (oldmode) - 1;
- return immed_double_int_const (val, mode);
+ return immed_wide_int_const (wide_int::from_uhwi (val, mode), mode);
}
/* We can do this with a gen_lowpart if both desired and current modes
@@ -740,7 +740,11 @@ convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int uns
&& GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
|| (GET_MODE_CLASS (mode) == MODE_INT
&& GET_MODE_CLASS (oldmode) == MODE_INT
- && (CONST_DOUBLE_AS_INT_P (x)
+#if TARGET_SUPPORTS_WIDE_INT
+ && (CONST_WIDE_INT_P (x)
+#else
+ && (CONST_DOUBLE_AS_INT_P (x)
+#endif
|| (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
&& ((MEM_P (x) && ! MEM_VOLATILE_P (x)
&& direct_load[(int) mode])
@@ -1745,6 +1749,7 @@ emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
{
rtx first, second;
+ /* TODO: const_wide_int can have sizes other than this... */
gcc_assert (2 * len == ssize);
split_double (src, &first, &second);
if (i)
@@ -5192,10 +5197,10 @@ store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
&alt_rtl);
}
- /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
- the same as that of TARGET, adjust the constant. This is needed, for
- example, in case it is a CONST_DOUBLE and we want only a word-sized
- value. */
+ /* If TEMP is a VOIDmode constant and the mode of the type of EXP is
+ not the same as that of TARGET, adjust the constant. This is
+ needed, for example, in case it is a CONST_DOUBLE or
+ CONST_WIDE_INT and we want only a word-sized value. */
if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
&& TREE_CODE (exp) != ERROR_MARK
&& GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
@@ -7694,11 +7699,12 @@ expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
/* All elts simple constants => refer to a constant in memory. But
if this is a non-BLKmode mode, let it store a field at a time
- since that should make a CONST_INT or CONST_DOUBLE when we
- fold. Likewise, if we have a target we can use, it is best to
- store directly into the target unless the type is large enough
- that memcpy will be used. If we are making an initializer and
- all operands are constant, put it in memory as well.
+ since that should make a CONST_INT, CONST_WIDE_INT or
+ CONST_DOUBLE when we fold. Likewise, if we have a target we can
+ use, it is best to store directly into the target unless the type
+ is large enough that memcpy will be used. If we are making an
+ initializer and all operands are constant, put it in memory as
+ well.
FIXME: Avoid trying to fill vector constructors piece-meal.
Output them with output_constant_def below unless we're sure
@@ -8167,17 +8173,18 @@ expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
&& TREE_CONSTANT (treeop1))
{
rtx constant_part;
+ HOST_WIDE_INT wc;
+ enum machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop1));
op1 = expand_expr (treeop1, subtarget, VOIDmode,
EXPAND_SUM);
- /* Use immed_double_const to ensure that the constant is
+ /* Use wide_int::from_shwi to ensure that the constant is
truncated according to the mode of OP1, then sign extended
to a HOST_WIDE_INT. Using the constant directly can result
in non-canonical RTL in a 64x32 cross compile. */
- constant_part
- = immed_double_const (TREE_INT_CST_LOW (treeop0),
- (HOST_WIDE_INT) 0,
- TYPE_MODE (TREE_TYPE (treeop1)));
+ wc = TREE_INT_CST_LOW (treeop0);
+ constant_part
+ = immed_wide_int_const (wide_int::from_shwi (wc, wmode), wmode);
op1 = plus_constant (mode, op1, INTVAL (constant_part));
if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
op1 = force_operand (op1, target);
@@ -8189,7 +8196,8 @@ expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
&& TREE_CONSTANT (treeop0))
{
rtx constant_part;
-
+ HOST_WIDE_INT wc;
+ enum machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop0));
op0 = expand_expr (treeop0, subtarget, VOIDmode,
(modifier == EXPAND_INITIALIZER
? EXPAND_INITIALIZER : EXPAND_SUM));
@@ -8203,14 +8211,13 @@ expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
return simplify_gen_binary (PLUS, mode, op0, op1);
goto binop2;
}
- /* Use immed_double_const to ensure that the constant is
+ /* Use wide_int::from_shwi to ensure that the constant is
truncated according to the mode of OP1, then sign extended
to a HOST_WIDE_INT. Using the constant directly can result
in non-canonical RTL in a 64x32 cross compile. */
- constant_part
- = immed_double_const (TREE_INT_CST_LOW (treeop1),
- (HOST_WIDE_INT) 0,
- TYPE_MODE (TREE_TYPE (treeop0)));
+ wc = TREE_INT_CST_LOW (treeop1);
+ constant_part
+ = immed_wide_int_const (wide_int::from_shwi (wc, wmode), wmode);
op0 = plus_constant (mode, op0, INTVAL (constant_part));
if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
op0 = force_operand (op0, target);
@@ -8712,10 +8719,13 @@ expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
for unsigned bitfield expand this as XOR with a proper constant
instead. */
if (reduce_bit_field && TYPE_UNSIGNED (type))
- temp = expand_binop (mode, xor_optab, op0,
- immed_double_int_const
- (double_int::mask (TYPE_PRECISION (type)), mode),
- target, 1, OPTAB_LIB_WIDEN);
+ {
+ wide_int mask = wide_int::mask (TYPE_PRECISION (type), false, mode);
+
+ temp = expand_binop (mode, xor_optab, op0,
+ immed_wide_int_const (mask, mode),
+ target, 1, OPTAB_LIB_WIDEN);
+ }
else
temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
gcc_assert (temp);
@@ -9300,9 +9310,8 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
return decl_rtl;
case INTEGER_CST:
- temp = immed_double_const (TREE_INT_CST_LOW (exp),
- TREE_INT_CST_HIGH (exp), mode);
-
+ temp = immed_wide_int_const (wide_int::from_tree (exp),
+ TYPE_MODE (TREE_TYPE (exp)));
return temp;
case VECTOR_CST:
@@ -9533,8 +9542,9 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
op0 = memory_address_addr_space (address_mode, op0, as);
if (!integer_zerop (TREE_OPERAND (exp, 1)))
{
- rtx off
- = immed_double_int_const (mem_ref_offset (exp), address_mode);
+ wide_int wi = wide_int::from_double_int
+ (mem_ref_offset (exp), address_mode);
+ rtx off = immed_wide_int_const (wi, address_mode);
op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
}
op0 = memory_address_addr_space (mode, op0, as);
@@ -10411,9 +10421,10 @@ reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
}
else if (TYPE_UNSIGNED (type))
{
- rtx mask = immed_double_int_const (double_int::mask (prec),
- GET_MODE (exp));
- return expand_and (GET_MODE (exp), exp, mask, target);
+ enum machine_mode mode = GET_MODE (exp);
+ rtx mask = immed_wide_int_const
+ (wide_int::mask (prec, false, mode), mode);
+ return expand_and (mode, exp, mask, target);
}
else
{
@@ -10985,8 +10996,9 @@ const_vector_from_tree (tree exp)
RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
inner);
else
- RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
- inner);
+ RTVEC_ELT (v, i)
+ = immed_wide_int_const (wide_int::from_tree (elt),
+ TYPE_MODE (TREE_TYPE (elt)));
}
return gen_rtx_CONST_VECTOR (mode, v);
@@ -3728,8 +3728,16 @@ output_addr_const (FILE *file, rtx x)
output_addr_const (file, XEXP (x, 0));
break;
+ case CONST_WIDE_INT:
+ /* This should be ok for a while. */
+ gcc_assert (CONST_WIDE_INT_NUNITS (x) == 2);
+ fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
+ (unsigned HOST_WIDE_INT) CONST_WIDE_INT_ELT (x, 1),
+ (unsigned HOST_WIDE_INT) CONST_WIDE_INT_ELT (x, 0));
+ break;
+
case CONST_DOUBLE:
- if (GET_MODE (x) == VOIDmode)
+ if (CONST_DOUBLE_AS_INT_P (x))
{
/* We can use %d if the number is one word and positive. */
if (CONST_DOUBLE_HIGH (x))
@@ -205,6 +205,7 @@ gen_exp (rtx x, enum rtx_code subroutine_type, char *used)
case CONST_DOUBLE:
case CONST_FIXED:
+ case CONST_WIDE_INT:
/* These shouldn't be written in MD files. Instead, the appropriate
routines in varasm.c should be called. */
gcc_unreachable ();
@@ -143,6 +143,7 @@ static int
excluded_rtx (int idx)
{
return ((strcmp (defs[idx].enumname, "CONST_DOUBLE") == 0)
+ || (strcmp (defs[idx].enumname, "CONST_WIDE_INT") == 0)
|| (strcmp (defs[idx].enumname, "CONST_FIXED") == 0));
}
@@ -5548,6 +5548,7 @@ main (int argc, char **argv)
POS_HERE (do_scalar_typedef ("REAL_VALUE_TYPE", &pos));
POS_HERE (do_scalar_typedef ("FIXED_VALUE_TYPE", &pos));
POS_HERE (do_scalar_typedef ("double_int", &pos));
+ POS_HERE (do_scalar_typedef ("wide_int", &pos));
POS_HERE (do_scalar_typedef ("uint64_t", &pos));
POS_HERE (do_scalar_typedef ("uint8", &pos));
POS_HERE (do_scalar_typedef ("uintptr_t", &pos));
@@ -613,7 +613,7 @@ write_one_predicate_function (struct pred_data *p)
add_mode_tests (p);
/* A normal predicate can legitimately not look at enum machine_mode
- if it accepts only CONST_INTs and/or CONST_DOUBLEs. */
+ if it accepts only CONST_INTs and/or CONST_WIDE_INT and/or CONST_DOUBLEs. */
printf ("int\n%s (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)\n{\n",
p->name);
write_predicate_stmts (p->exp);
@@ -810,8 +810,11 @@ add_constraint (const char *name, const char *regclass,
if (is_const_int || is_const_dbl)
{
enum rtx_code appropriate_code
+#if TARGET_SUPPORTS_WIDE_INT
+ = is_const_int ? CONST_INT : CONST_WIDE_INT;
+#else
= is_const_int ? CONST_INT : CONST_DOUBLE;
-
+#endif
/* Consider relaxing this requirement in the future. */
if (regclass
|| GET_CODE (exp) != AND
@@ -1075,12 +1078,17 @@ write_tm_constrs_h (void)
if (needs_ival)
puts (" if (CONST_INT_P (op))\n"
" ival = INTVAL (op);");
+#if TARGET_SUPPORTS_WIDE_INT
+ if (needs_lval || needs_hval)
+ error ("you can't use lval or hval");
+#else
if (needs_hval)
puts (" if (GET_CODE (op) == CONST_DOUBLE && mode == VOIDmode)"
" hval = CONST_DOUBLE_HIGH (op);");
if (needs_lval)
puts (" if (GET_CODE (op) == CONST_DOUBLE && mode == VOIDmode)"
" lval = CONST_DOUBLE_LOW (op);");
+#endif
if (needs_rval)
puts (" if (GET_CODE (op) == CONST_DOUBLE && mode != VOIDmode)"
" rval = CONST_DOUBLE_REAL_VALUE (op);");
@@ -2776,7 +2776,13 @@ static const struct std_pred_table std_preds[] = {
{"scratch_operand", false, false, {SCRATCH, REG}},
{"immediate_operand", false, true, {UNKNOWN}},
{"const_int_operand", false, false, {CONST_INT}},
+#if TARGET_SUPPORTS_WIDE_INT
+ {"const_wide_int_operand", false, false, {CONST_WIDE_INT}},
+ {"const_scalar_int_operand", false, false, {CONST_INT, CONST_WIDE_INT}},
+ {"const_double_operand", false, false, {CONST_DOUBLE}},
+#else
{"const_double_operand", false, false, {CONST_INT, CONST_DOUBLE}},
+#endif
{"nonimmediate_operand", false, false, {SUBREG, REG, MEM}},
{"nonmemory_operand", false, true, {SUBREG, REG}},
{"push_operand", false, false, {MEM}},
@@ -1373,6 +1373,9 @@ ggc_alloc_typed_stat (enum gt_types_enum gte, size_t size
case gt_ggc_e_9rtvec_def:
return ggc_internal_alloc_zone_pass_stat (size, &rtl_zone);
+ case gt_ggc_e_10hwivec_def:
+ return ggc_internal_alloc_zone_pass_stat (size, &rtl_zone);
+
default:
return ggc_internal_alloc_zone_pass_stat (size, &main_zone);
}
@@ -271,6 +271,11 @@ extern struct alloc_zone tree_id_zone;
+ ((NELT) - 1) * sizeof (rtx), \
&rtl_zone)
+#define ggc_alloc_hwivec_sized(NELT) \
+ ggc_alloc_zone_hwivec_def (sizeof (struct hwivec_def) \
+ + ((NELT) - 1) * sizeof (HOST_WIDE_INT), \
+ &rtl_zone)
+
#if defined (GGC_ZONE) && !defined (GENERATOR_FILE)
/* Allocate an object into the specified allocation zone. */
@@ -838,7 +838,8 @@ expand_subword_shift (enum machine_mode op1_mode, optab binoptab,
if (CONSTANT_P (op1) || shift_mask >= BITS_PER_WORD)
{
carries = outof_input;
- tmp = immed_double_const (BITS_PER_WORD, 0, op1_mode);
+ tmp = immed_wide_int_const (wide_int::from_shwi (BITS_PER_WORD,
+ op1_mode), op1_mode);
tmp = simplify_expand_binop (op1_mode, sub_optab, tmp, op1,
0, true, methods);
}
@@ -853,13 +854,14 @@ expand_subword_shift (enum machine_mode op1_mode, optab binoptab,
outof_input, const1_rtx, 0, unsignedp, methods);
if (shift_mask == BITS_PER_WORD - 1)
{
- tmp = immed_double_const (-1, -1, op1_mode);
+ tmp = immed_wide_int_const (wide_int::minus_one (op1_mode), op1_mode);
tmp = simplify_expand_binop (op1_mode, xor_optab, op1, tmp,
0, true, methods);
}
else
{
- tmp = immed_double_const (BITS_PER_WORD - 1, 0, op1_mode);
+ tmp = immed_wide_int_const (wide_int::from_shwi (BITS_PER_WORD - 1,
+ op1_mode), op1_mode);
tmp = simplify_expand_binop (op1_mode, sub_optab, tmp, op1,
0, true, methods);
}
@@ -1022,7 +1024,8 @@ expand_doubleword_shift (enum machine_mode op1_mode, optab binoptab,
is true when the effective shift value is less than BITS_PER_WORD.
Set SUPERWORD_OP1 to the shift count that should be used to shift
OUTOF_INPUT into INTO_TARGET when the condition is false. */
- tmp = immed_double_const (BITS_PER_WORD, 0, op1_mode);
+ tmp = immed_wide_int_const (wide_int::from_shwi (BITS_PER_WORD, op1_mode),
+ op1_mode);
if (!CONSTANT_P (op1) && shift_mask == BITS_PER_WORD - 1)
{
/* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
@@ -2872,7 +2875,7 @@ expand_absneg_bit (enum rtx_code code, enum machine_mode mode,
const struct real_format *fmt;
int bitpos, word, nwords, i;
enum machine_mode imode;
- double_int mask;
+ wide_int mask;
rtx temp, insns;
/* The format has to have a simple sign bit. */
@@ -2908,7 +2911,7 @@ expand_absneg_bit (enum rtx_code code, enum machine_mode mode,
nwords = (GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD;
}
- mask = double_int_zero.set_bit (bitpos);
+ mask = wide_int::set_bit_in_zero (bitpos, imode);
if (code == ABS)
mask = ~mask;
@@ -2930,7 +2933,7 @@ expand_absneg_bit (enum rtx_code code, enum machine_mode mode,
{
temp = expand_binop (imode, code == ABS ? and_optab : xor_optab,
op0_piece,
- immed_double_int_const (mask, imode),
+ immed_wide_int_const (mask, imode),
targ_piece, 1, OPTAB_LIB_WIDEN);
if (temp != targ_piece)
emit_move_insn (targ_piece, temp);
@@ -2948,7 +2951,7 @@ expand_absneg_bit (enum rtx_code code, enum machine_mode mode,
{
temp = expand_binop (imode, code == ABS ? and_optab : xor_optab,
gen_lowpart (imode, op0),
- immed_double_int_const (mask, imode),
+ immed_wide_int_const (mask, imode),
gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
target = lowpart_subreg_maybe_copy (mode, temp, imode);
@@ -3547,7 +3550,7 @@ expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
}
else
{
- double_int mask;
+ wide_int mask;
if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
{
@@ -3569,10 +3572,9 @@ expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
op1 = operand_subword_force (op1, word, mode);
}
- mask = double_int_zero.set_bit (bitpos);
-
+ mask = wide_int::set_bit_in_zero (bitpos, imode);
sign = expand_binop (imode, and_optab, op1,
- immed_double_int_const (mask, imode),
+ immed_wide_int_const (mask, imode),
NULL_RTX, 1, OPTAB_LIB_WIDEN);
}
@@ -3616,7 +3618,7 @@ expand_copysign_bit (enum machine_mode mode, rtx op0, rtx op1, rtx target,
int bitpos, bool op0_is_abs)
{
enum machine_mode imode;
- double_int mask;
+ wide_int mask, nmask;
int word, nwords, i;
rtx temp, insns;
@@ -3640,7 +3642,7 @@ expand_copysign_bit (enum machine_mode mode, rtx op0, rtx op1, rtx target,
nwords = (GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD;
}
- mask = double_int_zero.set_bit (bitpos);
+ mask = wide_int::set_bit_in_zero (bitpos, imode);
if (target == 0
|| target == op0
@@ -3660,14 +3662,16 @@ expand_copysign_bit (enum machine_mode mode, rtx op0, rtx op1, rtx target,
if (i == word)
{
if (!op0_is_abs)
- op0_piece
- = expand_binop (imode, and_optab, op0_piece,
- immed_double_int_const (~mask, imode),
- NULL_RTX, 1, OPTAB_LIB_WIDEN);
-
+ {
+ nmask = ~mask;
+ op0_piece
+ = expand_binop (imode, and_optab, op0_piece,
+ immed_wide_int_const (nmask, imode),
+ NULL_RTX, 1, OPTAB_LIB_WIDEN);
+ }
op1 = expand_binop (imode, and_optab,
operand_subword_force (op1, i, mode),
- immed_double_int_const (mask, imode),
+ immed_wide_int_const (mask, imode),
NULL_RTX, 1, OPTAB_LIB_WIDEN);
temp = expand_binop (imode, ior_optab, op0_piece, op1,
@@ -3687,15 +3691,17 @@ expand_copysign_bit (enum machine_mode mode, rtx op0, rtx op1, rtx target,
else
{
op1 = expand_binop (imode, and_optab, gen_lowpart (imode, op1),
- immed_double_int_const (mask, imode),
+ immed_wide_int_const (mask, imode),
NULL_RTX, 1, OPTAB_LIB_WIDEN);
op0 = gen_lowpart (imode, op0);
if (!op0_is_abs)
- op0 = expand_binop (imode, and_optab, op0,
- immed_double_int_const (~mask, imode),
- NULL_RTX, 1, OPTAB_LIB_WIDEN);
-
+ {
+ nmask = ~mask;
+ op0 = expand_binop (imode, and_optab, op0,
+ immed_wide_int_const (nmask, imode),
+ NULL_RTX, 1, OPTAB_LIB_WIDEN);
+ }
temp = expand_binop (imode, ior_optab, op0, op1,
gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
target = lowpart_subreg_maybe_copy (mode, temp, imode);
@@ -297,27 +297,25 @@ reload_cse_simplify_set (rtx set, rtx insn)
#ifdef LOAD_EXTEND_OP
if (extend_op != UNKNOWN)
{
- HOST_WIDE_INT this_val;
+ wide_int result;
- /* ??? I'm lazy and don't wish to handle CONST_DOUBLE. Other
- constants, such as SYMBOL_REF, cannot be extended. */
- if (!CONST_INT_P (this_rtx))
+ if (!CONST_SCALAR_INT_P (this_rtx))
continue;
- this_val = INTVAL (this_rtx);
switch (extend_op)
{
case ZERO_EXTEND:
- this_val &= GET_MODE_MASK (GET_MODE (src));
+ result = (wide_int::from_rtx (this_rtx, GET_MODE (src))
+ .zext (word_mode));
break;
case SIGN_EXTEND:
- /* ??? In theory we're already extended. */
- if (this_val == trunc_int_for_mode (this_val, GET_MODE (src)))
- break;
+ result = (wide_int::from_rtx (this_rtx, GET_MODE (src))
+ .sext (word_mode));
+ break;
default:
gcc_unreachable ();
}
- this_rtx = GEN_INT (this_val);
+ this_rtx = immed_wide_int_const (result, GET_MODE (src));
}
#endif
this_cost = set_src_cost (this_rtx, speed);
@@ -614,6 +614,12 @@ print_rtx (const_rtx in_rtx)
fprintf (outfile, " [%s]", s);
}
break;
+
+ case CONST_WIDE_INT:
+ if (! flag_simple)
+ fprintf (outfile, " ");
+ hwivec_output_hex (outfile, CONST_WIDE_INT_VEC (in_rtx));
+ break;
#endif
case CODE_LABEL:
@@ -808,6 +808,29 @@ validate_const_int (const char *string)
fatal_with_file_and_line ("invalid decimal constant \"%s\"\n", string);
}
+static void
+validate_const_wide_int (const char *string)
+{
+ const char *cp;
+ int valid = 1;
+
+ cp = string;
+ while (*cp && ISSPACE (*cp))
+ cp++;
+ /* Skip the leading 0x. */
+ if (cp[0] == '0' || cp[1] == 'x')
+ cp += 2;
+ else
+ valid = 0;
+ if (*cp == 0)
+ valid = 0;
+ for (; *cp; cp++)
+ if (! ISXDIGIT (*cp))
+ valid = 0;
+ if (!valid)
+ fatal_with_file_and_line ("invalid hex constant \"%s\"\n", string);
+}
+
/* Record that PTR uses iterator ITERATOR. */
static void
@@ -1321,6 +1344,56 @@ read_rtx_code (const char *code_name)
gcc_unreachable ();
}
+ if (CONST_WIDE_INT_P (return_rtx))
+ {
+ read_name (&name);
+ validate_const_wide_int (name.string);
+ {
+ hwivec hwiv;
+ const char *s = name.string;
+ int len;
+ int index = 0;
+ int gs = HOST_BITS_PER_WIDE_INT/4;
+ int pos;
+ char * buf = XALLOCAVEC (char, gs + 1);
+ unsigned HOST_WIDE_INT wi;
+ int wlen;
+
+ /* Skip the leading spaces. */
+ while (*s && ISSPACE (*s))
+ s++;
+
+ /* Skip the leading 0x. */
+ gcc_assert (s[0] == '0');
+ gcc_assert (s[1] == 'x');
+ s += 2;
+
+ len = strlen (s);
+ pos = len - gs;
+ wlen = (len + gs - 1) / gs; /* Number of words needed */
+
+ return_rtx = const_wide_int_alloc (wlen);
+
+ hwiv = CONST_WIDE_INT_VEC (return_rtx);
+ while (pos > 0)
+ {
+#if HOST_BITS_PER_WIDE_INT == 64
+ sscanf (s + pos, "%16" HOST_WIDE_INT_PRINT "x", &wi);
+#else
+ sscanf (s + pos, "%8" HOST_WIDE_INT_PRINT "x", &wi);
+#endif
+ XHWIVEC_ELT (hwiv, index++) = wi;
+ pos -= gs;
+ }
+ strncpy (buf, s, gs - pos);
+ buf [gs - pos] = 0;
+ sscanf (buf, "%" HOST_WIDE_INT_PRINT "x", &wi);
+ XHWIVEC_ELT (hwiv, index++) = wi;
+ /* TODO: After reading, do we want to canonicalize with:
+ value = lookup_const_wide_int (value); ? */
+ }
+ }
+
c = read_skip_spaces ();
/* Syntactic sugar for AND and IOR, allowing Lisp-like
arbitrary number of arguments for them. */
@@ -1143,7 +1143,7 @@ immediate_operand (rtx op, enum machine_mode mode)
: mode, op));
}
-/* Returns 1 if OP is an operand that is a CONST_INT. */
+/* Returns 1 if OP is an operand that is a CONST_INT of mode MODE. */
int
const_int_operand (rtx op, enum machine_mode mode)
@@ -1158,8 +1158,64 @@ const_int_operand (rtx op, enum machine_mode mode)
return 1;
}
+#if TARGET_SUPPORTS_WIDE_INT
+/* Returns 1 if OP is an operand that is a CONST_INT or CONST_WIDE_INT
+ of mode MODE. */
+int
+const_scalar_int_operand (rtx op, enum machine_mode mode)
+{
+ if (!CONST_SCALAR_INT_P (op))
+ return 0;
+
+ if (CONST_INT_P (op))
+ return const_int_operand (op, mode);
+
+ if (mode != VOIDmode)
+ {
+ int prec = GET_MODE_PRECISION (mode);
+ int bitsize = GET_MODE_BITSIZE (mode);
+
+ if (CONST_WIDE_INT_NUNITS (op) * HOST_BITS_PER_WIDE_INT > bitsize)
+ return 0;
+
+ if (prec == bitsize)
+ return 1;
+ else
+ {
+ /* Multiword partial int. */
+ HOST_WIDE_INT x
+ = CONST_WIDE_INT_ELT (op, CONST_WIDE_INT_NUNITS (op) - 1);
+ return (wide_int::sext (x, prec & (HOST_BITS_PER_WIDE_INT - 1))
+ == x);
+ }
+ }
+ return 1;
+}
+
+/* Returns 1 if OP is an operand that is a CONST_WIDE_INT of mode
+ MODE. This most likely is not as useful as
+ const_scalar_int_operand, but is here for consistancy. */
+int
+const_wide_int_operand (rtx op, enum machine_mode mode)
+{
+ if (!CONST_WIDE_INT_P (op))
+ return 0;
+
+ return const_scalar_int_operand (op, mode);
+}
+
/* Returns 1 if OP is an operand that is a constant integer or constant
- floating-point number. */
+ floating-point number of MODE. */
+
+int
+const_double_operand (rtx op, enum machine_mode mode)
+{
+ return (GET_CODE (op) == CONST_DOUBLE)
+ && (GET_MODE (op) == mode || mode == VOIDmode);
+}
+#else
+/* Returns 1 if OP is an operand that is a constant integer or constant
+ floating-point number of MODE. */
int
const_double_operand (rtx op, enum machine_mode mode)
@@ -1175,8 +1231,9 @@ const_double_operand (rtx op, enum machine_mode mode)
&& (mode == VOIDmode || GET_MODE (op) == mode
|| GET_MODE (op) == VOIDmode));
}
-
-/* Return 1 if OP is a general operand that is not an immediate operand. */
+#endif
+/* Return 1 if OP is a general operand that is not an immediate
+ operand of mode MODE. */
int
nonimmediate_operand (rtx op, enum machine_mode mode)
@@ -1184,7 +1241,8 @@ nonimmediate_operand (rtx op, enum machine_mode mode)
return (general_operand (op, mode) && ! CONSTANT_P (op));
}
-/* Return 1 if OP is a register reference or immediate value of mode MODE. */
+/* Return 1 if OP is a register reference or immediate value of mode
+ MODE. */
int
nonmemory_operand (rtx op, enum machine_mode mode)
@@ -111,7 +111,7 @@ const enum rtx_class rtx_class[NUM_RTX_CODE] = {
const unsigned char rtx_code_size[NUM_RTX_CODE] = {
#define DEF_RTL_EXPR(ENUM, NAME, FORMAT, CLASS) \
(((ENUM) == CONST_INT || (ENUM) == CONST_DOUBLE \
- || (ENUM) == CONST_FIXED) \
+ || (ENUM) == CONST_FIXED || (ENUM) == CONST_WIDE_INT) \
? RTX_HDR_SIZE + (sizeof FORMAT - 1) * sizeof (HOST_WIDE_INT) \
: RTX_HDR_SIZE + (sizeof FORMAT - 1) * sizeof (rtunion)),
@@ -183,18 +183,24 @@ shallow_copy_rtvec (rtvec vec)
unsigned int
rtx_size (const_rtx x)
{
+ if (CONST_WIDE_INT_P (x))
+ return (RTX_HDR_SIZE
+ + sizeof (struct hwivec_def)
+ + ((CONST_WIDE_INT_NUNITS (x) - 1)
+ * sizeof (HOST_WIDE_INT)));
if (GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_HAS_BLOCK_INFO_P (x))
return RTX_HDR_SIZE + sizeof (struct block_symbol);
return RTX_CODE_SIZE (GET_CODE (x));
}
-/* Allocate an rtx of code CODE. The CODE is stored in the rtx;
- all the rest is initialized to zero. */
+/* Allocate an rtx of code CODE with EXTRA bytes in it. The CODE is
+ stored in the rtx; all the rest is initialized to zero. */
rtx
-rtx_alloc_stat (RTX_CODE code MEM_STAT_DECL)
+rtx_alloc_stat_v (RTX_CODE code MEM_STAT_DECL, int extra)
{
- rtx rt = ggc_alloc_zone_rtx_def_stat (&rtl_zone, RTX_CODE_SIZE (code)
+ rtx rt = ggc_alloc_zone_rtx_def_stat (&rtl_zone,
+ RTX_CODE_SIZE (code) + extra
PASS_MEM_STAT);
/* We want to clear everything up to the FLD array. Normally, this
@@ -213,6 +219,29 @@ rtx_alloc_stat (RTX_CODE code MEM_STAT_DECL)
return rt;
}
+/* Allocate an rtx of code CODE. The CODE is stored in the rtx;
+ all the rest is initialized to zero. */
+
+rtx
+rtx_alloc_stat (RTX_CODE code MEM_STAT_DECL)
+{
+ return rtx_alloc_stat_v (code PASS_MEM_STAT, 0);
+}
+
+/* Write the wide constant OP0 to OUTFILE. */
+
+void
+hwivec_output_hex (FILE *outfile, const_hwivec op0)
+{
+ int i = HWI_GET_NUM_ELEM (op0);
+ gcc_assert (i > 0);
+ if (XHWIVEC_ELT (op0, i-1) == 0)
+ fprintf (outfile, "0x");
+ fprintf (outfile, HOST_WIDE_INT_PRINT_HEX, XHWIVEC_ELT (op0, --i));
+ while (--i >= 0)
+ fprintf (outfile, HOST_WIDE_INT_PRINT_PADDED_HEX, XHWIVEC_ELT (op0, i));
+}
+
/* Return true if ORIG is a sharable CONST. */
@@ -427,7 +456,6 @@ rtx_equal_p_cb (const_rtx x, const_rtx y, rtx_equal_p_callback_function cb)
if (XWINT (x, i) != XWINT (y, i))
return 0;
break;
-
case 'n':
case 'i':
if (XINT (x, i) != XINT (y, i))
@@ -645,6 +673,10 @@ iterative_hash_rtx (const_rtx x, hashval_t hash)
return iterative_hash_object (i, hash);
case CONST_INT:
return iterative_hash_object (INTVAL (x), hash);
+ case CONST_WIDE_INT:
+ for (i = 0; i < CONST_WIDE_INT_NUNITS (x); i++)
+ hash = iterative_hash_object (CONST_WIDE_INT_ELT (x, i), hash);
+ return hash;
case SYMBOL_REF:
if (XSTR (x, 0))
return iterative_hash (XSTR (x, 0), strlen (XSTR (x, 0)) + 1,
@@ -810,6 +842,16 @@ rtl_check_failed_block_symbol (const char *file, int line, const char *func)
/* XXX Maybe print the vector? */
void
+hwivec_check_failed_bounds (const_hwivec r, int n, const char *file, int line,
+ const char *func)
+{
+ internal_error
+ ("RTL check: access of hwi elt %d of vector with last elt %d in %s, at %s:%d",
+ n, GET_NUM_ELEM (r) - 1, func, trim_filename (file), line);
+}
+
+/* XXX Maybe print the vector? */
+void
rtvec_check_failed_bounds (const_rtvec r, int n, const char *file, int line,
const char *func)
{
@@ -319,6 +319,9 @@ DEF_RTL_EXPR(TRAP_IF, "trap_if", "ee", RTX_EXTRA)
/* numeric integer constant */
DEF_RTL_EXPR(CONST_INT, "const_int", "w", RTX_CONST_OBJ)
+/* numeric integer constant */
+DEF_RTL_EXPR(CONST_WIDE_INT, "const_wide_int", "", RTX_CONST_OBJ)
+
/* fixed-point constant */
DEF_RTL_EXPR(CONST_FIXED, "const_fixed", "www", RTX_CONST_OBJ)
@@ -30,6 +30,7 @@ along with GCC; see the file COPYING3. If not see
#include "fixed-value.h"
#include "alias.h"
#include "hashtab.h"
+#include "wide-int.h"
#include "flags.h"
/* Value used by some passes to "recognize" noop moves as valid
@@ -251,6 +252,14 @@ struct GTY(()) object_block {
vec<rtx, va_gc> *anchors;
};
+struct GTY((variable_size)) hwivec_def {
+ int num_elem; /* number of elements */
+ HOST_WIDE_INT elem[1];
+};
+
+#define HWI_GET_NUM_ELEM(HWIVEC) ((HWIVEC)->num_elem)
+#define HWI_PUT_NUM_ELEM(HWIVEC, NUM) ((HWIVEC)->num_elem = (NUM))
+
/* RTL expression ("rtx"). */
struct GTY((chain_next ("RTX_NEXT (&%h)"),
@@ -345,6 +354,7 @@ struct GTY((chain_next ("RTX_NEXT (&%h)"),
struct block_symbol block_sym;
struct real_value rv;
struct fixed_value fv;
+ struct hwivec_def hwiv;
} GTY ((special ("rtx_def"), desc ("GET_CODE (&%0)"))) u;
};
@@ -383,13 +393,13 @@ struct GTY((chain_next ("RTX_NEXT (&%h)"),
for a variable number of things. The principle use is inside
PARALLEL expressions. */
+#define NULL_RTVEC (rtvec) 0
+
struct GTY((variable_size)) rtvec_def {
int num_elem; /* number of elements */
rtx GTY ((length ("%h.num_elem"))) elem[1];
};
-#define NULL_RTVEC (rtvec) 0
-
#define GET_NUM_ELEM(RTVEC) ((RTVEC)->num_elem)
#define PUT_NUM_ELEM(RTVEC, NUM) ((RTVEC)->num_elem = (NUM))
@@ -399,12 +409,38 @@ struct GTY((variable_size)) rtvec_def {
/* Predicate yielding nonzero iff X is an rtx for a memory location. */
#define MEM_P(X) (GET_CODE (X) == MEM)
+#if TARGET_SUPPORTS_WIDE_INT
+
+/* Match CONST_*s that can represent compile-time constant integers. */
+#define CASE_CONST_SCALAR_INT \
+ case CONST_INT: \
+ case CONST_WIDE_INT
+
+/* Match CONST_*s for which pointer equality corresponds to value
+ equality. */
+#define CASE_CONST_UNIQUE \
+ case CONST_INT: \
+ case CONST_WIDE_INT: \
+ case CONST_DOUBLE: \
+ case CONST_FIXED
+
+/* Match all CONST_* rtxes. */
+#define CASE_CONST_ANY \
+ case CONST_INT: \
+ case CONST_WIDE_INT: \
+ case CONST_DOUBLE: \
+ case CONST_FIXED: \
+ case CONST_VECTOR
+
+#else
+
/* Match CONST_*s that can represent compile-time constant integers. */
#define CASE_CONST_SCALAR_INT \
case CONST_INT: \
case CONST_DOUBLE
-/* Match CONST_*s for which pointer equality corresponds to value equality. */
+/* Match CONST_*s for which pointer equality corresponds to value
+equality. */
#define CASE_CONST_UNIQUE \
case CONST_INT: \
case CONST_DOUBLE: \
@@ -416,10 +452,17 @@ struct GTY((variable_size)) rtvec_def {
case CONST_DOUBLE: \
case CONST_FIXED: \
case CONST_VECTOR
+#endif
+
+
+
/* Predicate yielding nonzero iff X is an rtx for a constant integer. */
#define CONST_INT_P(X) (GET_CODE (X) == CONST_INT)
+/* Predicate yielding nonzero iff X is an rtx for a constant integer. */
+#define CONST_WIDE_INT_P(X) (GET_CODE (X) == CONST_WIDE_INT)
+
/* Predicate yielding nonzero iff X is an rtx for a constant fixed-point. */
#define CONST_FIXED_P(X) (GET_CODE (X) == CONST_FIXED)
@@ -432,8 +475,13 @@ struct GTY((variable_size)) rtvec_def {
(GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == VOIDmode)
/* Predicate yielding true iff X is an rtx for a integer const. */
+#if TARGET_SUPPORTS_WIDE_INT
+#define CONST_SCALAR_INT_P(X) \
+ (CONST_INT_P (X) || CONST_WIDE_INT_P (X))
+#else
#define CONST_SCALAR_INT_P(X) \
(CONST_INT_P (X) || CONST_DOUBLE_AS_INT_P (X))
+#endif
/* Predicate yielding true iff X is an rtx for a double-int. */
#define CONST_DOUBLE_AS_FLOAT_P(X) \
@@ -596,6 +644,13 @@ struct GTY((variable_size)) rtvec_def {
__FUNCTION__); \
&_rtx->u.hwint[_n]; }))
+#define XHWIVEC_ELT(HWIVEC, I) __extension__ \
+(*({ __typeof (HWIVEC) const _hwivec = (HWIVEC); const int _i = (I); \
+ if (_i < 0 || _i >= HWI_GET_NUM_ELEM (_hwivec)) \
+ hwivec_check_failed_bounds (_hwivec, _i, __FILE__, __LINE__, \
+ __FUNCTION__); \
+ &_hwivec->elem[_i]; }))
+
#define XCWINT(RTX, N, C) __extension__ \
(*({ __typeof (RTX) const _rtx = (RTX); \
if (GET_CODE (_rtx) != (C)) \
@@ -632,6 +687,11 @@ struct GTY((variable_size)) rtvec_def {
__FUNCTION__); \
&_symbol->u.block_sym; })
+#define HWIVEC_CHECK(RTX,C) __extension__ \
+({ __typeof (RTX) const _symbol = (RTX); \
+ RTL_CHECKC1 (_symbol, 0, C); \
+ &_symbol->u.hwiv; })
+
extern void rtl_check_failed_bounds (const_rtx, int, const char *, int,
const char *)
ATTRIBUTE_NORETURN;
@@ -652,6 +712,9 @@ extern void rtl_check_failed_code_mode (const_rtx, enum rtx_code, enum machine_m
ATTRIBUTE_NORETURN;
extern void rtl_check_failed_block_symbol (const char *, int, const char *)
ATTRIBUTE_NORETURN;
+extern void hwivec_check_failed_bounds (const_rtvec, int, const char *, int,
+ const char *)
+ ATTRIBUTE_NORETURN;
extern void rtvec_check_failed_bounds (const_rtvec, int, const char *, int,
const char *)
ATTRIBUTE_NORETURN;
@@ -664,12 +727,14 @@ extern void rtvec_check_failed_bounds (const_rtvec, int, const char *, int,
#define RTL_CHECKC2(RTX, N, C1, C2) ((RTX)->u.fld[N])
#define RTVEC_ELT(RTVEC, I) ((RTVEC)->elem[I])
#define XWINT(RTX, N) ((RTX)->u.hwint[N])
+#define XHWIVEC_ELT(HWIVEC, I) ((HWIVEC)->elem[I])
#define XCWINT(RTX, N, C) ((RTX)->u.hwint[N])
#define XCMWINT(RTX, N, C, M) ((RTX)->u.hwint[N])
#define XCNMWINT(RTX, N, C, M) ((RTX)->u.hwint[N])
#define XCNMPRV(RTX, C, M) (&(RTX)->u.rv)
#define XCNMPFV(RTX, C, M) (&(RTX)->u.fv)
#define BLOCK_SYMBOL_CHECK(RTX) (&(RTX)->u.block_sym)
+#define HWIVEC_CHECK(RTX,C) (&(RTX)->u.hwiv)
#endif
@@ -812,8 +877,8 @@ extern void rtl_check_failed_flag (const char *, const_rtx, const char *,
#define XCCFI(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_cfi)
#define XCCSELIB(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_cselib)
-#define XCVECEXP(RTX, N, M, C) RTVEC_ELT (XCVEC (RTX, N, C), M)
-#define XCVECLEN(RTX, N, C) GET_NUM_ELEM (XCVEC (RTX, N, C))
+#define XCVECEXP(RTX, N, M, C) RTVEC_ELT (XCVEC (RTX, N, C), M)
+#define XCVECLEN(RTX, N, C) GET_NUM_ELEM (XCVEC (RTX, N, C))
#define XC2EXP(RTX, N, C1, C2) (RTL_CHECKC2 (RTX, N, C1, C2).rt_rtx)
@@ -1155,9 +1220,19 @@ rhs_regno (const_rtx x)
#define INTVAL(RTX) XCWINT(RTX, 0, CONST_INT)
#define UINTVAL(RTX) ((unsigned HOST_WIDE_INT) INTVAL (RTX))
+/* For a CONST_WIDE_INT, CONST_WIDE_INT_NUNITS is the number of
+ elements actually needed to represent the constant.
+ CONST_WIDE_INT_ELT gets one of the elements. 0 is the least
+ significant HOST_WIDE_INT. */
+#define CONST_WIDE_INT_VEC(RTX) HWIVEC_CHECK (RTX, CONST_WIDE_INT)
+#define CONST_WIDE_INT_NUNITS(RTX) HWI_GET_NUM_ELEM (CONST_WIDE_INT_VEC (RTX))
+#define CONST_WIDE_INT_ELT(RTX, N) XHWIVEC_ELT (CONST_WIDE_INT_VEC (RTX), N)
+
/* For a CONST_DOUBLE:
+#if TARGET_SUPPORTS_WIDE_INT == 0
For a VOIDmode, there are two integers CONST_DOUBLE_LOW is the
low-order word and ..._HIGH the high-order.
+#endif
For a float, there is a REAL_VALUE_TYPE structure, and
CONST_DOUBLE_REAL_VALUE(r) is a pointer to it. */
#define CONST_DOUBLE_LOW(r) XCMWINT (r, 0, CONST_DOUBLE, VOIDmode)
@@ -1762,6 +1837,12 @@ extern rtx plus_constant (enum machine_mode, rtx, HOST_WIDE_INT);
/* In rtl.c */
extern rtx rtx_alloc_stat (RTX_CODE MEM_STAT_DECL);
#define rtx_alloc(c) rtx_alloc_stat (c MEM_STAT_INFO)
+extern rtx rtx_alloc_stat_v (RTX_CODE MEM_STAT_DECL, int);
+#define rtx_alloc_v(c, SZ) rtx_alloc_stat_v (c MEM_STAT_INFO, SZ)
+#define const_wide_int_alloc(NWORDS) \
+ rtx_alloc_v (CONST_WIDE_INT, \
+ (sizeof (struct hwivec_def) \
+ + ((NWORDS)-1) * sizeof (HOST_WIDE_INT))) \
extern rtvec rtvec_alloc (int);
extern rtvec shallow_copy_rtvec (rtvec);
@@ -1818,10 +1899,17 @@ extern void start_sequence (void);
extern void push_to_sequence (rtx);
extern void push_to_sequence2 (rtx, rtx);
extern void end_sequence (void);
+#if TARGET_SUPPORTS_WIDE_INT == 0
extern double_int rtx_to_double_int (const_rtx);
-extern rtx immed_double_int_const (double_int, enum machine_mode);
+#endif
+extern void hwivec_output_hex (FILE *, const_hwivec);
+#ifndef GENERATOR_FILE
+extern rtx immed_wide_int_const (const wide_int &cst, enum machine_mode mode);
+#endif
+#if TARGET_SUPPORTS_WIDE_INT == 0
extern rtx immed_double_const (HOST_WIDE_INT, HOST_WIDE_INT,
enum machine_mode);
+#endif
/* In loop-iv.c */
@@ -3096,6 +3096,8 @@ commutative_operand_precedence (rtx op)
/* Constants always come the second operand. Prefer "nice" constants. */
if (code == CONST_INT)
return -8;
+ if (code == CONST_WIDE_INT)
+ return -8;
if (code == CONST_DOUBLE)
return -7;
if (code == CONST_FIXED)
@@ -3108,6 +3110,8 @@ commutative_operand_precedence (rtx op)
case RTX_CONST_OBJ:
if (code == CONST_INT)
return -6;
+ if (code == CONST_WIDE_INT)
+ return -6;
if (code == CONST_DOUBLE)
return -5;
if (code == CONST_FIXED)
@@ -5294,7 +5298,10 @@ get_address_mode (rtx mem)
/* Split up a CONST_DOUBLE or integer constant rtx
into two rtx's for single words,
storing in *FIRST the word that comes first in memory in the target
- and in *SECOND the other. */
+ and in *SECOND the other.
+
+ TODO: This function needs to be rewritten to work on any size
+ integer. */
void
split_double (rtx value, rtx *first, rtx *second)
@@ -5371,6 +5378,22 @@ split_double (rtx value, rtx *first, rtx *second)
}
}
}
+ else if (GET_CODE (value) == CONST_WIDE_INT)
+ {
+ /* All of this is scary code and needs to be converted to
+ properly work with any size integer. */
+ gcc_assert (CONST_WIDE_INT_NUNITS (value) == 2);
+ if (WORDS_BIG_ENDIAN)
+ {
+ *first = GEN_INT (CONST_WIDE_INT_ELT (value, 1));
+ *second = GEN_INT (CONST_WIDE_INT_ELT (value, 0));
+ }
+ else
+ {
+ *first = GEN_INT (CONST_WIDE_INT_ELT (value, 0));
+ *second = GEN_INT (CONST_WIDE_INT_ELT (value, 1));
+ }
+ }
else if (!CONST_DOUBLE_P (value))
{
if (WORDS_BIG_ENDIAN)
@@ -444,6 +444,23 @@ print_value (char *buf, const_rtx x, int verbose)
(unsigned HOST_WIDE_INT) INTVAL (x));
cur = safe_concat (buf, cur, t);
break;
+
+ case CONST_WIDE_INT:
+ {
+ const char *sep = "<";
+ int i;
+ for (i = CONST_WIDE_INT_NUNITS (x) - 1; i >= 0; i--)
+ {
+ cur = safe_concat (buf, cur, sep);
+ sep = ",";
+ sprintf (t, HOST_WIDE_INT_PRINT_HEX,
+ (unsigned HOST_WIDE_INT) CONST_WIDE_INT_ELT (x, i));
+ cur = safe_concat (buf, cur, t);
+ }
+ cur = safe_concat (buf, cur, ">");
+ }
+ break;
+
case CONST_DOUBLE:
if (FLOAT_MODE_P (GET_MODE (x)))
real_to_decimal (t, CONST_DOUBLE_REAL_VALUE (x), sizeof (t), 0, 1);
@@ -1139,10 +1139,10 @@ lhs_and_rhs_separable_p (rtx lhs, rtx rhs)
if (lhs == NULL || rhs == NULL)
return false;
- /* Do not schedule CONST, CONST_INT and CONST_DOUBLE etc as rhs: no point
- to use reg, if const can be used. Moreover, scheduling const as rhs may
- lead to mode mismatch cause consts don't have modes but they could be
- merged from branches where the same const used in different modes. */
+ /* Do not schedule constants as rhs: no point to use reg, if const
+ can be used. Moreover, scheduling const as rhs may lead to mode
+ mismatch cause consts don't have modes but they could be merged
+ from branches where the same const used in different modes. */
if (CONSTANT_P (rhs))
return false;
@@ -88,6 +88,22 @@ mode_signbit_p (enum machine_mode mode, const_rtx x)
if (width <= HOST_BITS_PER_WIDE_INT
&& CONST_INT_P (x))
val = INTVAL (x);
+#if TARGET_SUPPORTS_WIDE_INT
+ else if (CONST_WIDE_INT_P (x))
+ {
+ unsigned int i;
+ unsigned int elts = CONST_WIDE_INT_NUNITS (x);
+ if (elts != (width + HOST_BITS_PER_WIDE_INT - 1) / HOST_BITS_PER_WIDE_INT)
+ return false;
+ for (i = 0; i < elts - 1; i++)
+ if (CONST_WIDE_INT_ELT (x, i) != 0)
+ return false;
+ val = CONST_WIDE_INT_ELT (x, elts - 1);
+ width %= HOST_BITS_PER_WIDE_INT;
+ if (width == 0)
+ width = HOST_BITS_PER_WIDE_INT;
+ }
+#else
else if (width <= HOST_BITS_PER_DOUBLE_INT
&& CONST_DOUBLE_AS_INT_P (x)
&& CONST_DOUBLE_LOW (x) == 0)
@@ -95,8 +111,9 @@ mode_signbit_p (enum machine_mode mode, const_rtx x)
val = CONST_DOUBLE_HIGH (x);
width -= HOST_BITS_PER_WIDE_INT;
}
+#endif
else
- /* FIXME: We don't yet have a representation for wider modes. */
+ /* X is not an integer constant. */
return false;
if (width < HOST_BITS_PER_WIDE_INT)
@@ -1460,7 +1477,6 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
rtx op, enum machine_mode op_mode)
{
unsigned int width = GET_MODE_PRECISION (mode);
- unsigned int op_width = GET_MODE_PRECISION (op_mode);
if (code == VEC_DUPLICATE)
{
@@ -1534,8 +1550,19 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
if (CONST_INT_P (op))
lv = INTVAL (op), hv = HWI_SIGN_EXTEND (lv);
else
+#if TARGET_SUPPORTS_WIDE_INT
+ {
+ /* The conversion code to floats really want exactly 2 HWIs.
+ This needs to be fixed. For now, if the constant is
+ really big, just return 0 which is safe. */
+ if (CONST_WIDE_INT_NUNITS (op) > 2)
+ return 0;
+ lv = CONST_WIDE_INT_ELT (op, 0);
+ hv = CONST_WIDE_INT_ELT (op, 1);
+ }
+#else
lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
-
+#endif
REAL_VALUE_FROM_INT (d, lv, hv, mode);
d = real_value_truncate (mode, d);
return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
@@ -1548,8 +1575,19 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
if (CONST_INT_P (op))
lv = INTVAL (op), hv = HWI_SIGN_EXTEND (lv);
else
+#if TARGET_SUPPORTS_WIDE_INT
+ {
+ /* The conversion code to floats really want exactly 2 HWIs.
+ This needs to be fixed. For now, if the constant is
+ really big, just return 0 which is safe. */
+ if (CONST_WIDE_INT_NUNITS (op) > 2)
+ return 0;
+ lv = CONST_WIDE_INT_ELT (op, 0);
+ hv = CONST_WIDE_INT_ELT (op, 1);
+ }
+#else
lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
-
+#endif
if (op_mode == VOIDmode
|| GET_MODE_PRECISION (op_mode) > HOST_BITS_PER_DOUBLE_INT)
/* We should never get a negative number. */
@@ -1562,302 +1600,87 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
}
- if (CONST_INT_P (op)
- && width <= HOST_BITS_PER_WIDE_INT && width > 0)
+ if (CONST_SCALAR_INT_P (op) && width > 0)
{
- HOST_WIDE_INT arg0 = INTVAL (op);
- HOST_WIDE_INT val;
+ wide_int result;
+ enum machine_mode imode = op_mode == VOIDmode ? mode : op_mode;
+ wide_int op0 = wide_int::from_rtx (op, imode);
+
+#if TARGET_SUPPORTS_WIDE_INT == 0
+ /* This assert keeps the simplification from producing a result
+ that cannot be represented in a CONST_DOUBLE but a lot of
+ upstream callers expect that this function never fails to
+ simplify something and so you if you added this to the test
+ above the code would die later anyway. If this assert
+ happens, you just need to make the port support wide int. */
+ gcc_assert (width <= HOST_BITS_PER_DOUBLE_INT);
+#endif
switch (code)
{
case NOT:
- val = ~ arg0;
+ result = ~op0;
break;
case NEG:
- val = - arg0;
+ result = op0.neg ();
break;
case ABS:
- val = (arg0 >= 0 ? arg0 : - arg0);
+ result = op0.abs ();
break;
case FFS:
- arg0 &= GET_MODE_MASK (mode);
- val = ffs_hwi (arg0);
+ result = op0.ffs ();
break;
case CLZ:
- arg0 &= GET_MODE_MASK (mode);
- if (arg0 == 0 && CLZ_DEFINED_VALUE_AT_ZERO (mode, val))
- ;
- else
- val = GET_MODE_PRECISION (mode) - floor_log2 (arg0) - 1;
+ result = op0.clz (GET_MODE_BITSIZE (mode),
+ GET_MODE_PRECISION (mode));
break;
case CLRSB:
- arg0 &= GET_MODE_MASK (mode);
- if (arg0 == 0)
- val = GET_MODE_PRECISION (mode) - 1;
- else if (arg0 >= 0)
- val = GET_MODE_PRECISION (mode) - floor_log2 (arg0) - 2;
- else if (arg0 < 0)
- val = GET_MODE_PRECISION (mode) - floor_log2 (~arg0) - 2;
+ result = op0.clrsb (GET_MODE_BITSIZE (mode),
+ GET_MODE_PRECISION (mode));
break;
-
+
case CTZ:
- arg0 &= GET_MODE_MASK (mode);
- if (arg0 == 0)
- {
- /* Even if the value at zero is undefined, we have to come
- up with some replacement. Seems good enough. */
- if (! CTZ_DEFINED_VALUE_AT_ZERO (mode, val))
- val = GET_MODE_PRECISION (mode);
- }
- else
- val = ctz_hwi (arg0);
+ result = op0.ctz (GET_MODE_BITSIZE (mode),
+ GET_MODE_PRECISION (mode));
break;
case POPCOUNT:
- arg0 &= GET_MODE_MASK (mode);
- val = 0;
- while (arg0)
- val++, arg0 &= arg0 - 1;
+ result = op0.popcount (GET_MODE_BITSIZE (mode),
+ GET_MODE_PRECISION (mode));
break;
case PARITY:
- arg0 &= GET_MODE_MASK (mode);
- val = 0;
- while (arg0)
- val++, arg0 &= arg0 - 1;
- val &= 1;
+ result = op0.parity (GET_MODE_BITSIZE (mode),
+ GET_MODE_PRECISION (mode));
break;
case BSWAP:
- {
- unsigned int s;
-
- val = 0;
- for (s = 0; s < width; s += 8)
- {
- unsigned int d = width - s - 8;
- unsigned HOST_WIDE_INT byte;
- byte = (arg0 >> s) & 0xff;
- val |= byte << d;
- }
- }
+ result = op0.bswap ();
break;
case TRUNCATE:
- val = arg0;
+ result = op0.zforce_to_size (mode);
break;
case ZERO_EXTEND:
- /* When zero-extending a CONST_INT, we need to know its
- original mode. */
- gcc_assert (op_mode != VOIDmode);
- if (op_width == HOST_BITS_PER_WIDE_INT)
- {
- /* If we were really extending the mode,
- we would have to distinguish between zero-extension
- and sign-extension. */
- gcc_assert (width == op_width);
- val = arg0;
- }
- else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
- val = arg0 & GET_MODE_MASK (op_mode);
- else
- return 0;
+ result = op0.zforce_to_size (mode);
break;
case SIGN_EXTEND:
- if (op_mode == VOIDmode)
- op_mode = mode;
- op_width = GET_MODE_PRECISION (op_mode);
- if (op_width == HOST_BITS_PER_WIDE_INT)
- {
- /* If we were really extending the mode,
- we would have to distinguish between zero-extension
- and sign-extension. */
- gcc_assert (width == op_width);
- val = arg0;
- }
- else if (op_width < HOST_BITS_PER_WIDE_INT)
- {
- val = arg0 & GET_MODE_MASK (op_mode);
- if (val_signbit_known_set_p (op_mode, val))
- val |= ~GET_MODE_MASK (op_mode);
- }
- else
- return 0;
+ result = op0.sforce_to_size (mode);
break;
case SQRT:
- case FLOAT_EXTEND:
- case FLOAT_TRUNCATE:
- case SS_TRUNCATE:
- case US_TRUNCATE:
- case SS_NEG:
- case US_NEG:
- case SS_ABS:
- return 0;
-
- default:
- gcc_unreachable ();
- }
-
- return gen_int_mode (val, mode);
- }
-
- /* We can do some operations on integer CONST_DOUBLEs. Also allow
- for a DImode operation on a CONST_INT. */
- else if (width <= HOST_BITS_PER_DOUBLE_INT
- && (CONST_DOUBLE_AS_INT_P (op) || CONST_INT_P (op)))
- {
- double_int first, value;
-
- if (CONST_DOUBLE_AS_INT_P (op))
- first = double_int::from_pair (CONST_DOUBLE_HIGH (op),
- CONST_DOUBLE_LOW (op));
- else
- first = double_int::from_shwi (INTVAL (op));
-
- switch (code)
- {
- case NOT:
- value = ~first;
- break;
-
- case NEG:
- value = -first;
- break;
-
- case ABS:
- if (first.is_negative ())
- value = -first;
- else
- value = first;
- break;
-
- case FFS:
- value.high = 0;
- if (first.low != 0)
- value.low = ffs_hwi (first.low);
- else if (first.high != 0)
- value.low = HOST_BITS_PER_WIDE_INT + ffs_hwi (first.high);
- else
- value.low = 0;
- break;
-
- case CLZ:
- value.high = 0;
- if (first.high != 0)
- value.low = GET_MODE_PRECISION (mode) - floor_log2 (first.high) - 1
- - HOST_BITS_PER_WIDE_INT;
- else if (first.low != 0)
- value.low = GET_MODE_PRECISION (mode) - floor_log2 (first.low) - 1;
- else if (! CLZ_DEFINED_VALUE_AT_ZERO (mode, value.low))
- value.low = GET_MODE_PRECISION (mode);
- break;
-
- case CTZ:
- value.high = 0;
- if (first.low != 0)
- value.low = ctz_hwi (first.low);
- else if (first.high != 0)
- value.low = HOST_BITS_PER_WIDE_INT + ctz_hwi (first.high);
- else if (! CTZ_DEFINED_VALUE_AT_ZERO (mode, value.low))
- value.low = GET_MODE_PRECISION (mode);
- break;
-
- case POPCOUNT:
- value = double_int_zero;
- while (first.low)
- {
- value.low++;
- first.low &= first.low - 1;
- }
- while (first.high)
- {
- value.low++;
- first.high &= first.high - 1;
- }
- break;
-
- case PARITY:
- value = double_int_zero;
- while (first.low)
- {
- value.low++;
- first.low &= first.low - 1;
- }
- while (first.high)
- {
- value.low++;
- first.high &= first.high - 1;
- }
- value.low &= 1;
- break;
-
- case BSWAP:
- {
- unsigned int s;
-
- value = double_int_zero;
- for (s = 0; s < width; s += 8)
- {
- unsigned int d = width - s - 8;
- unsigned HOST_WIDE_INT byte;
-
- if (s < HOST_BITS_PER_WIDE_INT)
- byte = (first.low >> s) & 0xff;
- else
- byte = (first.high >> (s - HOST_BITS_PER_WIDE_INT)) & 0xff;
-
- if (d < HOST_BITS_PER_WIDE_INT)
- value.low |= byte << d;
- else
- value.high |= byte << (d - HOST_BITS_PER_WIDE_INT);
- }
- }
- break;
-
- case TRUNCATE:
- /* This is just a change-of-mode, so do nothing. */
- value = first;
- break;
-
- case ZERO_EXTEND:
- gcc_assert (op_mode != VOIDmode);
-
- if (op_width > HOST_BITS_PER_WIDE_INT)
- return 0;
-
- value = double_int::from_uhwi (first.low & GET_MODE_MASK (op_mode));
- break;
-
- case SIGN_EXTEND:
- if (op_mode == VOIDmode
- || op_width > HOST_BITS_PER_WIDE_INT)
- return 0;
- else
- {
- value.low = first.low & GET_MODE_MASK (op_mode);
- if (val_signbit_known_set_p (op_mode, value.low))
- value.low |= ~GET_MODE_MASK (op_mode);
-
- value.high = HWI_SIGN_EXTEND (value.low);
- }
- break;
-
- case SQRT:
- return 0;
-
default:
return 0;
}
- return immed_double_int_const (value, mode);
+ return immed_wide_int_const (result, mode);
}
else if (CONST_DOUBLE_AS_FLOAT_P (op)
@@ -1909,7 +1732,6 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
}
return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
}
-
else if (CONST_DOUBLE_AS_FLOAT_P (op)
&& SCALAR_FLOAT_MODE_P (GET_MODE (op))
&& GET_MODE_CLASS (mode) == MODE_INT
@@ -1922,9 +1744,12 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
/* This was formerly used only for non-IEEE float.
eggert@twinsun.com says it is safe for IEEE also. */
- HOST_WIDE_INT xh, xl, th, tl;
+ HOST_WIDE_INT th, tl;
REAL_VALUE_TYPE x, t;
+ wide_int wc;
REAL_VALUE_FROM_CONST_DOUBLE (x, op);
+ HOST_WIDE_INT tmp[2];
+
switch (code)
{
case FIX:
@@ -1946,8 +1771,8 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
real_from_integer (&t, VOIDmode, tl, th, 0);
if (REAL_VALUES_LESS (t, x))
{
- xh = th;
- xl = tl;
+ tmp[1] = th;
+ tmp[0] = tl;
break;
}
@@ -1966,11 +1791,11 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
real_from_integer (&t, VOIDmode, tl, th, 0);
if (REAL_VALUES_LESS (x, t))
{
- xh = th;
- xl = tl;
+ tmp[1] = th;
+ tmp[0] = tl;
break;
}
- REAL_VALUE_TO_INT (&xl, &xh, x);
+ REAL_VALUE_TO_INT (&tmp[0], &tmp[1], x);
break;
case UNSIGNED_FIX:
@@ -1997,18 +1822,19 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
real_from_integer (&t, VOIDmode, tl, th, 1);
if (REAL_VALUES_LESS (t, x))
{
- xh = th;
- xl = tl;
+ tmp[1] = th;
+ tmp[0] = tl;
break;
}
- REAL_VALUE_TO_INT (&xl, &xh, x);
+ REAL_VALUE_TO_INT (&tmp[0], &tmp[1], x);
break;
default:
gcc_unreachable ();
}
- return immed_double_const (xl, xh, mode);
+ wc = wide_int::from_array (tmp, 2, mode);
+ return immed_wide_int_const (wc, mode);
}
return NULL_RTX;
@@ -2168,49 +1994,50 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
if (SCALAR_INT_MODE_P (mode))
{
- double_int coeff0, coeff1;
+ wide_int coeff0;
+ wide_int coeff1;
rtx lhs = op0, rhs = op1;
- coeff0 = double_int_one;
- coeff1 = double_int_one;
+ coeff0 = wide_int::one (mode);
+ coeff1 = wide_int::one (mode);
if (GET_CODE (lhs) == NEG)
{
- coeff0 = double_int_minus_one;
+ coeff0 = wide_int::minus_one (mode);
lhs = XEXP (lhs, 0);
}
else if (GET_CODE (lhs) == MULT
- && CONST_INT_P (XEXP (lhs, 1)))
+ && CONST_SCALAR_INT_P (XEXP (lhs, 1)))
{
- coeff0 = double_int::from_shwi (INTVAL (XEXP (lhs, 1)));
+ coeff0 = wide_int::from_rtx (XEXP (lhs, 1), mode);
lhs = XEXP (lhs, 0);
}
else if (GET_CODE (lhs) == ASHIFT
&& CONST_INT_P (XEXP (lhs, 1))
&& INTVAL (XEXP (lhs, 1)) >= 0
- && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
+ && INTVAL (XEXP (lhs, 1)) < GET_MODE_PRECISION (mode))
{
- coeff0 = double_int_zero.set_bit (INTVAL (XEXP (lhs, 1)));
+ coeff0 = wide_int::set_bit_in_zero (INTVAL (XEXP (lhs, 1)), mode);
lhs = XEXP (lhs, 0);
}
if (GET_CODE (rhs) == NEG)
{
- coeff1 = double_int_minus_one;
+ coeff1 = wide_int::minus_one (mode);
rhs = XEXP (rhs, 0);
}
else if (GET_CODE (rhs) == MULT
&& CONST_INT_P (XEXP (rhs, 1)))
{
- coeff1 = double_int::from_shwi (INTVAL (XEXP (rhs, 1)));
+ coeff1 = wide_int::from_rtx (XEXP (rhs, 1), mode);
rhs = XEXP (rhs, 0);
}
else if (GET_CODE (rhs) == ASHIFT
&& CONST_INT_P (XEXP (rhs, 1))
&& INTVAL (XEXP (rhs, 1)) >= 0
- && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
+ && INTVAL (XEXP (rhs, 1)) < GET_MODE_PRECISION (mode))
{
- coeff1 = double_int_zero.set_bit (INTVAL (XEXP (rhs, 1)));
+ coeff1 = wide_int::set_bit_in_zero (INTVAL (XEXP (rhs, 1)), mode);
rhs = XEXP (rhs, 0);
}
@@ -2218,11 +2045,9 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
{
rtx orig = gen_rtx_PLUS (mode, op0, op1);
rtx coeff;
- double_int val;
bool speed = optimize_function_for_speed_p (cfun);
- val = coeff0 + coeff1;
- coeff = immed_double_int_const (val, mode);
+ coeff = immed_wide_int_const (coeff0 + coeff1, mode);
tem = simplify_gen_binary (MULT, mode, lhs, coeff);
return set_src_cost (tem, speed) <= set_src_cost (orig, speed)
@@ -2344,50 +2169,52 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
if (SCALAR_INT_MODE_P (mode))
{
- double_int coeff0, negcoeff1;
+ wide_int coeff0;
+ wide_int negcoeff1;
rtx lhs = op0, rhs = op1;
- coeff0 = double_int_one;
- negcoeff1 = double_int_minus_one;
+ coeff0 = wide_int::one (mode);
+ negcoeff1 = wide_int::minus_one (mode);
if (GET_CODE (lhs) == NEG)
{
- coeff0 = double_int_minus_one;
+ coeff0 = wide_int::minus_one (mode);
lhs = XEXP (lhs, 0);
}
else if (GET_CODE (lhs) == MULT
- && CONST_INT_P (XEXP (lhs, 1)))
+ && CONST_SCALAR_INT_P (XEXP (lhs, 1)))
{
- coeff0 = double_int::from_shwi (INTVAL (XEXP (lhs, 1)));
+ coeff0 = wide_int::from_rtx (XEXP (lhs, 1), mode);
lhs = XEXP (lhs, 0);
}
else if (GET_CODE (lhs) == ASHIFT
&& CONST_INT_P (XEXP (lhs, 1))
&& INTVAL (XEXP (lhs, 1)) >= 0
- && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
+ && INTVAL (XEXP (lhs, 1)) < GET_MODE_PRECISION (mode))
{
- coeff0 = double_int_zero.set_bit (INTVAL (XEXP (lhs, 1)));
+ coeff0 = wide_int::set_bit_in_zero (INTVAL (XEXP (lhs, 1)), mode);
lhs = XEXP (lhs, 0);
}
if (GET_CODE (rhs) == NEG)
{
- negcoeff1 = double_int_one;
+ negcoeff1 = wide_int::one (mode);
rhs = XEXP (rhs, 0);
}
else if (GET_CODE (rhs) == MULT
&& CONST_INT_P (XEXP (rhs, 1)))
{
- negcoeff1 = double_int::from_shwi (-INTVAL (XEXP (rhs, 1)));
+ negcoeff1 = wide_int::from_rtx (XEXP (rhs, 1), mode).neg ();
rhs = XEXP (rhs, 0);
}
else if (GET_CODE (rhs) == ASHIFT
&& CONST_INT_P (XEXP (rhs, 1))
&& INTVAL (XEXP (rhs, 1)) >= 0
- && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
+ && INTVAL (XEXP (rhs, 1)) < GET_MODE_PRECISION (mode))
{
- negcoeff1 = double_int_zero.set_bit (INTVAL (XEXP (rhs, 1)));
- negcoeff1 = -negcoeff1;
+ negcoeff1 = wide_int::set_bit_in_zero (INTVAL (XEXP (rhs, 1)),
+ mode);
+ negcoeff1 = negcoeff1.neg ();
rhs = XEXP (rhs, 0);
}
@@ -2395,11 +2222,9 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
{
rtx orig = gen_rtx_MINUS (mode, op0, op1);
rtx coeff;
- double_int val;
bool speed = optimize_function_for_speed_p (cfun);
- val = coeff0 + negcoeff1;
- coeff = immed_double_int_const (val, mode);
+ coeff = immed_wide_int_const (coeff0 + negcoeff1, mode);
tem = simplify_gen_binary (MULT, mode, lhs, coeff);
return set_src_cost (tem, speed) <= set_src_cost (orig, speed)
@@ -2551,26 +2376,13 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
&& trueop1 == CONST1_RTX (mode))
return op0;
- /* Convert multiply by constant power of two into shift unless
- we are still generating RTL. This test is a kludge. */
- if (CONST_INT_P (trueop1)
- && (val = exact_log2 (UINTVAL (trueop1))) >= 0
- /* If the mode is larger than the host word size, and the
- uppermost bit is set, then this isn't a power of two due
- to implicit sign extension. */
- && (width <= HOST_BITS_PER_WIDE_INT
- || val != HOST_BITS_PER_WIDE_INT - 1))
- return simplify_gen_binary (ASHIFT, mode, op0, GEN_INT (val));
-
- /* Likewise for multipliers wider than a word. */
- if (CONST_DOUBLE_AS_INT_P (trueop1)
- && GET_MODE (op0) == mode
- && CONST_DOUBLE_LOW (trueop1) == 0
- && (val = exact_log2 (CONST_DOUBLE_HIGH (trueop1))) >= 0
- && (val < HOST_BITS_PER_DOUBLE_INT - 1
- || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_DOUBLE_INT))
- return simplify_gen_binary (ASHIFT, mode, op0,
- GEN_INT (val + HOST_BITS_PER_WIDE_INT));
+ /* Convert multiply by constant power of two into shift. */
+ if (CONST_SCALAR_INT_P (trueop1))
+ {
+ val = wide_int::from_rtx (trueop1, mode).exact_log2 ();
+ if (val >= 0 && val < GET_MODE_BITSIZE (mode))
+ return simplify_gen_binary (ASHIFT, mode, op0, GEN_INT (val));
+ }
/* x*2 is x+x and x*(-1) is -x */
if (CONST_DOUBLE_AS_FLOAT_P (trueop1)
@@ -3609,9 +3421,9 @@ rtx
simplify_const_binary_operation (enum rtx_code code, enum machine_mode mode,
rtx op0, rtx op1)
{
- HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
- HOST_WIDE_INT val;
+#if TARGET_SUPPORTS_WIDE_INT == 0
unsigned int width = GET_MODE_PRECISION (mode);
+#endif
if (VECTOR_MODE_P (mode)
&& code != VEC_CONCAT
@@ -3804,299 +3616,128 @@ simplify_const_binary_operation (enum rtx_code code, enum machine_mode mode,
/* We can fold some multi-word operations. */
if (GET_MODE_CLASS (mode) == MODE_INT
- && width == HOST_BITS_PER_DOUBLE_INT
- && (CONST_DOUBLE_AS_INT_P (op0) || CONST_INT_P (op0))
- && (CONST_DOUBLE_AS_INT_P (op1) || CONST_INT_P (op1)))
+ && CONST_SCALAR_INT_P (op0)
+ && CONST_SCALAR_INT_P (op1))
{
- double_int o0, o1, res, tmp;
- bool overflow;
-
- o0 = rtx_to_double_int (op0);
- o1 = rtx_to_double_int (op1);
-
+ wide_int result;
+ wide_int wop0 = wide_int::from_rtx (op0, mode);
+ wide_int wop1 = wide_int::from_rtx (op1, mode);
+ bool overflow = false;
+
+#if TARGET_SUPPORTS_WIDE_INT == 0
+ /* This assert keeps the simplification from producing a result
+ that cannot be represented in a CONST_DOUBLE but a lot of
+ upstream callers expect that this function never fails to
+ simplify something and so you if you added this to the test
+ above the code would die later anyway. If this assert
+ happens, you just need to make the port support wide int. */
+ gcc_assert (width <= HOST_BITS_PER_DOUBLE_INT);
+#endif
switch (code)
{
case MINUS:
- /* A - B == A + (-B). */
- o1 = -o1;
-
- /* Fall through.... */
+ result = wop0 - wop1;
+ break;
case PLUS:
- res = o0 + o1;
+ result = wop0 + wop1;
break;
case MULT:
- res = o0 * o1;
+ result = wop0 * wop1;
break;
case DIV:
- res = o0.divmod_with_overflow (o1, false, TRUNC_DIV_EXPR,
- &tmp, &overflow);
+ result = wop0.div_trunc (wop1, wide_int::SIGNED, &overflow);
if (overflow)
- return 0;
+ return NULL_RTX;
break;
-
+
case MOD:
- tmp = o0.divmod_with_overflow (o1, false, TRUNC_DIV_EXPR,
- &res, &overflow);
+ result = wop0.mod_trunc (wop1, wide_int::SIGNED, &overflow);
if (overflow)
- return 0;
+ return NULL_RTX;
break;
case UDIV:
- res = o0.divmod_with_overflow (o1, true, TRUNC_DIV_EXPR,
- &tmp, &overflow);
+ result = wop0.div_trunc (wop1, wide_int::UNSIGNED, &overflow);
if (overflow)
- return 0;
+ return NULL_RTX;
break;
case UMOD:
- tmp = o0.divmod_with_overflow (o1, true, TRUNC_DIV_EXPR,
- &res, &overflow);
+ result = wop0.mod_trunc (wop1, wide_int::UNSIGNED, &overflow);
if (overflow)
- return 0;
+ return NULL_RTX;
break;
case AND:
- res = o0 & o1;
+ result = wop0 & wop1;
break;
case IOR:
- res = o0 | o1;
+ result = wop0 | wop1;
break;
case XOR:
- res = o0 ^ o1;
+ result = wop0 ^ wop1;
break;
case SMIN:
- res = o0.smin (o1);
+ result = wop0.smin (wop1);
break;
case SMAX:
- res = o0.smax (o1);
+ result = wop0.smax (wop1);
break;
case UMIN:
- res = o0.umin (o1);
+ result = wop0.umin (wop1);
break;
case UMAX:
- res = o0.umax (o1);
- break;
-
- case LSHIFTRT: case ASHIFTRT:
- case ASHIFT:
- case ROTATE: case ROTATERT:
- {
- unsigned HOST_WIDE_INT cnt;
-
- if (SHIFT_COUNT_TRUNCATED)
- {
- o1.high = 0;
- o1.low &= GET_MODE_PRECISION (mode) - 1;
- }
-
- if (!o1.fits_uhwi ()
- || o1.to_uhwi () >= GET_MODE_PRECISION (mode))
- return 0;
-
- cnt = o1.to_uhwi ();
- unsigned short prec = GET_MODE_PRECISION (mode);
-
- if (code == LSHIFTRT || code == ASHIFTRT)
- res = o0.rshift (cnt, prec, code == ASHIFTRT);
- else if (code == ASHIFT)
- res = o0.alshift (cnt, prec);
- else if (code == ROTATE)
- res = o0.lrotate (cnt, prec);
- else /* code == ROTATERT */
- res = o0.rrotate (cnt, prec);
- }
- break;
-
- default:
- return 0;
- }
-
- return immed_double_int_const (res, mode);
- }
-
- if (CONST_INT_P (op0) && CONST_INT_P (op1)
- && width <= HOST_BITS_PER_WIDE_INT && width != 0)
- {
- /* Get the integer argument values in two forms:
- zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
-
- arg0 = INTVAL (op0);
- arg1 = INTVAL (op1);
-
- if (width < HOST_BITS_PER_WIDE_INT)
- {
- arg0 &= GET_MODE_MASK (mode);
- arg1 &= GET_MODE_MASK (mode);
-
- arg0s = arg0;
- if (val_signbit_known_set_p (mode, arg0s))
- arg0s |= ~GET_MODE_MASK (mode);
-
- arg1s = arg1;
- if (val_signbit_known_set_p (mode, arg1s))
- arg1s |= ~GET_MODE_MASK (mode);
- }
- else
- {
- arg0s = arg0;
- arg1s = arg1;
- }
-
- /* Compute the value of the arithmetic. */
-
- switch (code)
- {
- case PLUS:
- val = arg0s + arg1s;
- break;
-
- case MINUS:
- val = arg0s - arg1s;
- break;
-
- case MULT:
- val = arg0s * arg1s;
- break;
-
- case DIV:
- if (arg1s == 0
- || ((unsigned HOST_WIDE_INT) arg0s
- == (unsigned HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
- && arg1s == -1))
- return 0;
- val = arg0s / arg1s;
- break;
-
- case MOD:
- if (arg1s == 0
- || ((unsigned HOST_WIDE_INT) arg0s
- == (unsigned HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
- && arg1s == -1))
- return 0;
- val = arg0s % arg1s;
+ result = wop0.umax (wop1);
break;
- case UDIV:
- if (arg1 == 0
- || ((unsigned HOST_WIDE_INT) arg0s
- == (unsigned HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
- && arg1s == -1))
- return 0;
- val = (unsigned HOST_WIDE_INT) arg0 / arg1;
- break;
-
- case UMOD:
- if (arg1 == 0
- || ((unsigned HOST_WIDE_INT) arg0s
- == (unsigned HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
- && arg1s == -1))
- return 0;
- val = (unsigned HOST_WIDE_INT) arg0 % arg1;
- break;
-
- case AND:
- val = arg0 & arg1;
- break;
-
- case IOR:
- val = arg0 | arg1;
- break;
+ case LSHIFTRT:
+ if (wop1.neg_p ())
+ return NULL_RTX;
- case XOR:
- val = arg0 ^ arg1;
+ result = wop0.rshiftu (wop1, wide_int::TRUNC);
break;
-
- case LSHIFTRT:
- case ASHIFT:
+
case ASHIFTRT:
- /* Truncate the shift if SHIFT_COUNT_TRUNCATED, otherwise make sure
- the value is in range. We can't return any old value for
- out-of-range arguments because either the middle-end (via
- shift_truncation_mask) or the back-end might be relying on
- target-specific knowledge. Nor can we rely on
- shift_truncation_mask, since the shift might not be part of an
- ashlM3, lshrM3 or ashrM3 instruction. */
- if (SHIFT_COUNT_TRUNCATED)
- arg1 = (unsigned HOST_WIDE_INT) arg1 % width;
- else if (arg1 < 0 || arg1 >= GET_MODE_BITSIZE (mode))
- return 0;
-
- val = (code == ASHIFT
- ? ((unsigned HOST_WIDE_INT) arg0) << arg1
- : ((unsigned HOST_WIDE_INT) arg0) >> arg1);
+ if (wop1.neg_p ())
+ return NULL_RTX;
- /* Sign-extend the result for arithmetic right shifts. */
- if (code == ASHIFTRT && arg0s < 0 && arg1 > 0)
- val |= ((unsigned HOST_WIDE_INT) (-1)) << (width - arg1);
+ result = wop0.rshifts (wop1, wide_int::TRUNC);
break;
+
+ case ASHIFT:
+ if (wop1.neg_p ())
+ return NULL_RTX;
- case ROTATERT:
- if (arg1 < 0)
- return 0;
-
- arg1 %= width;
- val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
- | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
+ result = wop0.lshift (wop1, wide_int::TRUNC);
break;
-
+
case ROTATE:
- if (arg1 < 0)
- return 0;
-
- arg1 %= width;
- val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
- | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
- break;
-
- case COMPARE:
- /* Do nothing here. */
- return 0;
-
- case SMIN:
- val = arg0s <= arg1s ? arg0s : arg1s;
- break;
-
- case UMIN:
- val = ((unsigned HOST_WIDE_INT) arg0
- <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
- break;
+ if (wop1.neg_p ())
+ return NULL_RTX;
- case SMAX:
- val = arg0s > arg1s ? arg0s : arg1s;
+ result = wop0.lrotate (wop1);
break;
+
+ case ROTATERT:
+ if (wop1.neg_p ())
+ return NULL_RTX;
- case UMAX:
- val = ((unsigned HOST_WIDE_INT) arg0
- > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
+ result = wop0.rrotate (wop1);
break;
- case SS_PLUS:
- case US_PLUS:
- case SS_MINUS:
- case US_MINUS:
- case SS_MULT:
- case US_MULT:
- case SS_DIV:
- case US_DIV:
- case SS_ASHIFT:
- case US_ASHIFT:
- /* ??? There are simplifications that can be done. */
- return 0;
-
default:
- gcc_unreachable ();
+ return NULL_RTX;
}
-
- return gen_int_mode (val, mode);
+ return immed_wide_int_const (result, mode);
}
return NULL_RTX;
@@ -4764,10 +4405,11 @@ comparison_result (enum rtx_code code, int known_results)
}
}
-/* Check if the given comparison (done in the given MODE) is actually a
- tautology or a contradiction.
- If no simplification is possible, this function returns zero.
- Otherwise, it returns either const_true_rtx or const0_rtx. */
+/* Check if the given comparison (done in the given MODE) is actually
+ a tautology or a contradiction. If the mode is VOID_mode, the
+ comparison is done in "infinite precision". If no simplification
+ is possible, this function returns zero. Otherwise, it returns
+ either const_true_rtx or const0_rtx. */
rtx
simplify_const_relational_operation (enum rtx_code code,
@@ -4891,59 +4533,25 @@ simplify_const_relational_operation (enum rtx_code code,
/* Otherwise, see if the operands are both integers. */
if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
- && (CONST_DOUBLE_AS_INT_P (trueop0) || CONST_INT_P (trueop0))
- && (CONST_DOUBLE_AS_INT_P (trueop1) || CONST_INT_P (trueop1)))
+ && CONST_SCALAR_INT_P (trueop0) && CONST_SCALAR_INT_P (trueop1))
{
- int width = GET_MODE_PRECISION (mode);
- HOST_WIDE_INT l0s, h0s, l1s, h1s;
- unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
-
- /* Get the two words comprising each integer constant. */
- if (CONST_DOUBLE_AS_INT_P (trueop0))
- {
- l0u = l0s = CONST_DOUBLE_LOW (trueop0);
- h0u = h0s = CONST_DOUBLE_HIGH (trueop0);
- }
- else
- {
- l0u = l0s = INTVAL (trueop0);
- h0u = h0s = HWI_SIGN_EXTEND (l0s);
- }
-
- if (CONST_DOUBLE_AS_INT_P (trueop1))
- {
- l1u = l1s = CONST_DOUBLE_LOW (trueop1);
- h1u = h1s = CONST_DOUBLE_HIGH (trueop1);
- }
- else
- {
- l1u = l1s = INTVAL (trueop1);
- h1u = h1s = HWI_SIGN_EXTEND (l1s);
- }
-
- /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
- we have to sign or zero-extend the values. */
- if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
- {
- l0u &= GET_MODE_MASK (mode);
- l1u &= GET_MODE_MASK (mode);
-
- if (val_signbit_known_set_p (mode, l0s))
- l0s |= ~GET_MODE_MASK (mode);
-
- if (val_signbit_known_set_p (mode, l1s))
- l1s |= ~GET_MODE_MASK (mode);
- }
- if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
- h0u = h1u = 0, h0s = HWI_SIGN_EXTEND (l0s), h1s = HWI_SIGN_EXTEND (l1s);
-
- if (h0u == h1u && l0u == l1u)
+ enum machine_mode cmode = mode;
+ wide_int wo0;
+ wide_int wo1;
+
+ /* It would be nice if we really had a mode here. However, the
+ largest int representable on the target is as good as
+ infinite. */
+ if (mode == VOIDmode)
+ cmode = MAX_MODE_INT;
+ wo0 = wide_int::from_rtx (trueop0, cmode);
+ wo1 = wide_int::from_rtx (trueop1, cmode);
+ if (wo0 == wo1)
return comparison_result (code, CMP_EQ);
else
{
- int cr;
- cr = (h0s < h1s || (h0s == h1s && l0u < l1u)) ? CMP_LT : CMP_GT;
- cr |= (h0u < h1u || (h0u == h1u && l0u < l1u)) ? CMP_LTU : CMP_GTU;
+ int cr = wo0.lts_p (wo1) ? CMP_LT : CMP_GT;
+ cr |= wo0.ltu_p (wo1) ? CMP_LTU : CMP_GTU;
return comparison_result (code, cr);
}
}
@@ -5358,9 +4966,9 @@ simplify_ternary_operation (enum rtx_code code, enum machine_mode mode,
return 0;
}
-/* Evaluate a SUBREG of a CONST_INT or CONST_DOUBLE or CONST_FIXED
- or CONST_VECTOR,
- returning another CONST_INT or CONST_DOUBLE or CONST_FIXED or CONST_VECTOR.
+/* Evaluate a SUBREG of a CONST_INT or CONST_WIDE_INT or CONST_DOUBLE
+ or CONST_FIXED or CONST_VECTOR, returning another CONST_INT or
+ CONST_WIDE_INT or CONST_DOUBLE or CONST_FIXED or CONST_VECTOR.
Works by unpacking OP into a collection of 8-bit values
represented as a little-endian array of 'unsigned char', selecting by BYTE,
@@ -5370,13 +4978,11 @@ static rtx
simplify_immed_subreg (enum machine_mode outermode, rtx op,
enum machine_mode innermode, unsigned int byte)
{
- /* We support up to 512-bit values (for V8DFmode). */
enum {
- max_bitsize = 512,
value_bit = 8,
value_mask = (1 << value_bit) - 1
};
- unsigned char value[max_bitsize / value_bit];
+ unsigned char value[MAX_BITSIZE_MODE_ANY_MODE/value_bit];
int value_start;
int i;
int elem;
@@ -5388,6 +4994,7 @@ simplify_immed_subreg (enum machine_mode outermode, rtx op,
rtvec result_v = NULL;
enum mode_class outer_class;
enum machine_mode outer_submode;
+ int max_bitsize;
/* Some ports misuse CCmode. */
if (GET_MODE_CLASS (outermode) == MODE_CC && CONST_INT_P (op))
@@ -5397,6 +5004,10 @@ simplify_immed_subreg (enum machine_mode outermode, rtx op,
if (COMPLEX_MODE_P (outermode))
return NULL_RTX;
+ /* We support any size mode. */
+ max_bitsize = MAX (GET_MODE_BITSIZE (outermode),
+ GET_MODE_BITSIZE (innermode));
+
/* Unpack the value. */
if (GET_CODE (op) == CONST_VECTOR)
@@ -5446,8 +5057,20 @@ simplify_immed_subreg (enum machine_mode outermode, rtx op,
*vp++ = INTVAL (el) < 0 ? -1 : 0;
break;
+ case CONST_WIDE_INT:
+ {
+ wide_int val = wide_int::from_rtx (el, innermode);
+ unsigned char extend = val.sign_mask ();
+
+ for (i = 0; i < elem_bitsize; i += value_bit)
+ *vp++ = val.extract_to_hwi (i, value_bit);
+ for (; i < elem_bitsize; i += value_bit)
+ *vp++ = extend;
+ }
+ break;
+
case CONST_DOUBLE:
- if (GET_MODE (el) == VOIDmode)
+ if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (el) == VOIDmode)
{
unsigned char extend = 0;
/* If this triggers, someone should have generated a
@@ -5470,7 +5093,8 @@ simplify_immed_subreg (enum machine_mode outermode, rtx op,
}
else
{
- long tmp[max_bitsize / 32];
+ /* This is big enough for anything on the platform. */
+ long tmp[MAX_BITSIZE_MODE_ANY_MODE / 32];
int bitsize = GET_MODE_BITSIZE (GET_MODE (el));
gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (el)));
@@ -5590,24 +5214,27 @@ simplify_immed_subreg (enum machine_mode outermode, rtx op,
case MODE_INT:
case MODE_PARTIAL_INT:
{
- unsigned HOST_WIDE_INT hi = 0, lo = 0;
-
- for (i = 0;
- i < HOST_BITS_PER_WIDE_INT && i < elem_bitsize;
- i += value_bit)
- lo |= (unsigned HOST_WIDE_INT)(*vp++ & value_mask) << i;
- for (; i < elem_bitsize; i += value_bit)
- hi |= (unsigned HOST_WIDE_INT)(*vp++ & value_mask)
- << (i - HOST_BITS_PER_WIDE_INT);
-
- /* immed_double_const doesn't call trunc_int_for_mode. I don't
- know why. */
- if (elem_bitsize <= HOST_BITS_PER_WIDE_INT)
- elems[elem] = gen_int_mode (lo, outer_submode);
- else if (elem_bitsize <= HOST_BITS_PER_DOUBLE_INT)
- elems[elem] = immed_double_const (lo, hi, outer_submode);
- else
- return NULL_RTX;
+ int u;
+ int base = 0;
+ int units
+ = (GET_MODE_BITSIZE (outer_submode) + HOST_BITS_PER_WIDE_INT - 1)
+ / HOST_BITS_PER_WIDE_INT;
+ HOST_WIDE_INT tmp[MAX_BITSIZE_MODE_ANY_INT / HOST_BITS_PER_WIDE_INT];
+ wide_int r;
+
+ for (u = 0; u < units; u++)
+ {
+ unsigned HOST_WIDE_INT buf = 0;
+ for (i = 0;
+ i < HOST_BITS_PER_WIDE_INT && base + i < elem_bitsize;
+ i += value_bit)
+ buf |= (unsigned HOST_WIDE_INT)(*vp++ & value_mask) << i;
+
+ tmp[u] = buf;
+ base += HOST_BITS_PER_WIDE_INT;
+ }
+ r = wide_int::from_array (tmp, units, outer_submode);
+ elems[elem] = immed_wide_int_const (r, outer_submode);
}
break;
@@ -5615,7 +5242,7 @@ simplify_immed_subreg (enum machine_mode outermode, rtx op,
case MODE_DECIMAL_FLOAT:
{
REAL_VALUE_TYPE r;
- long tmp[max_bitsize / 32];
+ long tmp[MAX_BITSIZE_MODE_ANY_INT / 32];
/* real_from_target wants its input in words affected by
FLOAT_WORDS_BIG_ENDIAN. However, we ignore this,
@@ -190,15 +190,18 @@ addr_for_mem_ref (struct mem_address *addr, addr_space_t as,
struct mem_addr_template *templ;
if (addr->step && !integer_onep (addr->step))
- st = immed_double_int_const (tree_to_double_int (addr->step), pointer_mode);
+ st = immed_wide_int_const (wide_int::from_tree (addr->step),
+ TYPE_MODE (TREE_TYPE (addr->step)));
else
st = NULL_RTX;
if (addr->offset && !integer_zerop (addr->offset))
- off = immed_double_int_const
- (tree_to_double_int (addr->offset)
- .sext (TYPE_PRECISION (TREE_TYPE (addr->offset))),
- pointer_mode);
+ {
+ wide_int dc = wide_int::from_tree (addr->offset);
+ dc = dc.sforce_to_size (TREE_TYPE (addr->offset));
+ off = immed_wide_int_const (dc,
+ TYPE_MODE (TREE_TYPE (addr->offset)));
+ }
else
off = NULL_RTX;
@@ -61,6 +61,7 @@ along with GCC; see the file COPYING3. If not see
#include "except.h"
#include "debug.h"
#include "intl.h"
+#include "wide-int.h"
/* Tree code classes. */
@@ -1068,6 +1069,23 @@ double_int_to_tree (tree type, double_int cst)
return build_int_cst_wide (type, cst.low, cst.high);
}
+/* Constructs tree in type TYPE from with value given by CST. Signedness
+ of CST is assumed to be the same as the signedness of TYPE. */
+
+tree
+wide_int_to_tree (tree type, const wide_int &cst)
+{
+ wide_int v;
+
+ gcc_assert (cst.get_len () <= 2);
+ if (TYPE_UNSIGNED (type))
+ v = cst.zext (TYPE_PRECISION (type));
+ else
+ v = cst.sext (TYPE_PRECISION (type));
+
+ return build_int_cst_wide (type, v.elt (0), v.elt (1));
+}
+
/* Returns true if CST fits into range of TYPE. Signedness of CST is assumed
to be the same as the signedness of TYPE. */
@@ -3381,6 +3381,23 @@ loc_cmp (rtx x, rtx y)
default:
gcc_unreachable ();
}
+ if (CONST_WIDE_INT_P (x))
+ {
+ /* Compare the vector length first. */
+ if (CONST_WIDE_INT_NUNITS (x) >= CONST_WIDE_INT_NUNITS (y))
+ return 1;
+ else if (CONST_WIDE_INT_NUNITS (x) < CONST_WIDE_INT_NUNITS (y))
+ return -1;
+
+ /* Compare the vectors elements. */;
+ for (j = CONST_WIDE_INT_NUNITS (x) - 1; j >= 0 ; j--)
+ {
+ if (CONST_WIDE_INT_ELT (x, j) < CONST_WIDE_INT_ELT (y, j))
+ return -1;
+ if (CONST_WIDE_INT_ELT (x, j) > CONST_WIDE_INT_ELT (y, j))
+ return 1;
+ }
+ }
return 0;
}
@@ -3376,6 +3376,7 @@ const_rtx_hash_1 (rtx *xp, void *data)
enum rtx_code code;
hashval_t h, *hp;
rtx x;
+ int i;
x = *xp;
code = GET_CODE (x);
@@ -3386,12 +3387,12 @@ const_rtx_hash_1 (rtx *xp, void *data)
{
case CONST_INT:
hwi = INTVAL (x);
+
fold_hwi:
{
int shift = sizeof (hashval_t) * CHAR_BIT;
const int n = sizeof (HOST_WIDE_INT) / sizeof (hashval_t);
- int i;
-
+
h ^= (hashval_t) hwi;
for (i = 1; i < n; ++i)
{
@@ -3401,8 +3402,16 @@ const_rtx_hash_1 (rtx *xp, void *data)
}
break;
+ case CONST_WIDE_INT:
+ hwi = GET_MODE_PRECISION (mode);
+ {
+ for (i = 0; i < CONST_WIDE_INT_NUNITS (x); i++)
+ hwi ^= CONST_WIDE_INT_ELT (x, i);
+ goto fold_hwi;
+ }
+
case CONST_DOUBLE:
- if (mode == VOIDmode)
+ if (TARGET_SUPPORTS_WIDE_INT == 0 && mode == VOIDmode)
{
hwi = CONST_DOUBLE_LOW (x) ^ CONST_DOUBLE_HIGH (x);
goto fold_hwi;