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[2/4] iommu/fsl: Add PAMU bypass enable register to ccsr_guts structure.

Message ID 1353419697-31269-3-git-send-email-Varun.Sethi@freescale.com (mailing list archive)
State Accepted, archived
Delegated to: Kumar Gala
Headers show

Commit Message

Varun Sethi Nov. 20, 2012, 1:54 p.m. UTC 
PAMU bypass enable register added to the ccsr_guts structure.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
---
 arch/powerpc/include/asm/fsl_guts.h |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

Comments

Kumar Gala Nov. 25, 2012, 1:21 p.m. UTC | #1 
On Nov 20, 2012, at 7:54 AM, Varun Sethi wrote:

> PAMU bypass enable register added to the ccsr_guts structure.
> 
> Signed-off-by: Timur Tabi <timur@freescale.com>
> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
> ---
> arch/powerpc/include/asm/fsl_guts.h |    4 +++-
> 1 files changed, 3 insertions(+), 1 deletions(-)

applied to next

- k
diff mbox

Patch

diff --git a/arch/powerpc/include/asm/fsl_guts.h b/arch/powerpc/include/asm/fsl_guts.h
index aa4c488..bb208eb 100644
--- a/arch/powerpc/include/asm/fsl_guts.h
+++ b/arch/powerpc/include/asm/fsl_guts.h
@@ -69,7 +69,9 @@  struct ccsr_guts {
 	u8	res0c4[0x224 - 0xc4];
 	__be32  iodelay1;	/* 0x.0224 - IO delay control register 1 */
 	__be32  iodelay2;	/* 0x.0228 - IO delay control register 2 */
-	u8	res22c[0x800 - 0x22c];
+	u8	res22c[0x604 - 0x22c];
+	__be32	pamubypenr; 	/* 0x.604 - PAMU bypass enable register */
+	u8	res608[0x800 - 0x608];
 	__be32	clkdvdr;	/* 0x.0800 - Clock Divide Register */
 	u8	res804[0x900 - 0x804];
 	__be32	ircr;		/* 0x.0900 - Infrared Control Register */