| Message ID | 1353464957-9872-2-git-send-email-koba@kmckk.co.jp |
|---|---|
| State | Accepted |
| Delegated to: | Albert ARIBAUD |
| Headers | show |
On Wed, Nov 21, 2012 at 11:29 AM, Tetsuyuki Kobayashi <koba@kmckk.co.jp> wrote: > After stress test, I found some of kzm9g board occures memory failure. > This patch adust SDRAM setting. > - Enlarge drivability on both SDRAM controller and SDRAM itself > - Raise core voltage > > Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> > --- > board/kmc/kzm9g/kzm9g.c | 17 ++++++++++++++--- > 1 file changed, 14 insertions(+), 3 deletions(-) > > diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c > index 54f25e0..1aeb5fe 100644 > --- a/board/kmc/kzm9g/kzm9g.c > +++ b/board/kmc/kzm9g/kzm9g.c > @@ -84,7 +84,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc) > writel(0x0017040a, &sbsc->sdwcr01); > writel(0x31020707, &sbsc->sdwcr10); > writel(0x0017040a, &sbsc->sdwcr11); > - writel(0x05555555, &sbsc->sddrvcr0); > + writel(0x055557ff, &sbsc->sddrvcr0); /* Enlarge drivability of LPDQS0-3, LPCLK */ > writel(0x30000000, &sbsc->sdwcr2); > > writel(readl(&sbsc->sdpcr) | 0x80, &sbsc->sdpcr); > @@ -112,7 +112,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc) > writel(0x0, SDMRA1A); > writel(0x00000402, &sbsc->sdmracr0); > writel(0x0, SDMRA1A); > - writel(0x00000403, &sbsc->sdmracr0); > + writel(0x00000203, &sbsc->sdmracr0); /* MR3 register DS=2 */ > writel(0x0, SDMRA1A); > writel(0x0, SDMRA2A); > } else { > @@ -120,7 +120,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc) > writel(0x0, SDMRA1B); > writel(0x00000402, &sbsc->sdmracr0); > writel(0x0, SDMRA1B); > - writel(0x00000403, &sbsc->sdmracr0); > + writel(0x00000203, &sbsc->sdmracr0); /* MR3 register DS=2 */ > writel(0x0, SDMRA1B); > writel(0x0, SDMRA2B); > } > @@ -301,8 +301,19 @@ int board_early_init_f(void) > return 0; > } > > +void adjust_core_voltage(void) > +{ > + u8 data; > + > + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); > + data = 0x35; > + i2c_set_bus_num(0); > + i2c_write(0x40, 3, 1, &data, 1); > +} > + > int board_init(void) > { > + adjust_core_voltage(); > sh73a0_pinmux_init(); > > /* SCIFA 4 */ > -- > 1.7.9.5 > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot
Hi, Albert. Could you pick-up this patch to your repository? Best regards, Nobuhiro On Thu, Nov 22, 2012 at 7:47 AM, Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> wrote: > On Wed, Nov 21, 2012 at 11:29 AM, Tetsuyuki Kobayashi <koba@kmckk.co.jp> wrote: >> After stress test, I found some of kzm9g board occures memory failure. >> This patch adust SDRAM setting. >> - Enlarge drivability on both SDRAM controller and SDRAM itself >> - Raise core voltage >> >> Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> > > Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> > >> --- >> board/kmc/kzm9g/kzm9g.c | 17 ++++++++++++++--- >> 1 file changed, 14 insertions(+), 3 deletions(-) >> >> diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c >> index 54f25e0..1aeb5fe 100644 >> --- a/board/kmc/kzm9g/kzm9g.c >> +++ b/board/kmc/kzm9g/kzm9g.c >> @@ -84,7 +84,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc) >> writel(0x0017040a, &sbsc->sdwcr01); >> writel(0x31020707, &sbsc->sdwcr10); >> writel(0x0017040a, &sbsc->sdwcr11); >> - writel(0x05555555, &sbsc->sddrvcr0); >> + writel(0x055557ff, &sbsc->sddrvcr0); /* Enlarge drivability of LPDQS0-3, LPCLK */ >> writel(0x30000000, &sbsc->sdwcr2); >> >> writel(readl(&sbsc->sdpcr) | 0x80, &sbsc->sdpcr); >> @@ -112,7 +112,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc) >> writel(0x0, SDMRA1A); >> writel(0x00000402, &sbsc->sdmracr0); >> writel(0x0, SDMRA1A); >> - writel(0x00000403, &sbsc->sdmracr0); >> + writel(0x00000203, &sbsc->sdmracr0); /* MR3 register DS=2 */ >> writel(0x0, SDMRA1A); >> writel(0x0, SDMRA2A); >> } else { >> @@ -120,7 +120,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc) >> writel(0x0, SDMRA1B); >> writel(0x00000402, &sbsc->sdmracr0); >> writel(0x0, SDMRA1B); >> - writel(0x00000403, &sbsc->sdmracr0); >> + writel(0x00000203, &sbsc->sdmracr0); /* MR3 register DS=2 */ >> writel(0x0, SDMRA1B); >> writel(0x0, SDMRA2B); >> } >> @@ -301,8 +301,19 @@ int board_early_init_f(void) >> return 0; >> } >> >> +void adjust_core_voltage(void) >> +{ >> + u8 data; >> + >> + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); >> + data = 0x35; >> + i2c_set_bus_num(0); >> + i2c_write(0x40, 3, 1, &data, 1); >> +} >> + >> int board_init(void) >> { >> + adjust_core_voltage(); >> sh73a0_pinmux_init(); >> >> /* SCIFA 4 */ >> -- >> 1.7.9.5 >> >> _______________________________________________ >> U-Boot mailing list >> U-Boot@lists.denx.de >> http://lists.denx.de/mailman/listinfo/u-boot > > > > -- > Nobuhiro Iwamatsu
diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c index 54f25e0..1aeb5fe 100644 --- a/board/kmc/kzm9g/kzm9g.c +++ b/board/kmc/kzm9g/kzm9g.c @@ -84,7 +84,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc) writel(0x0017040a, &sbsc->sdwcr01); writel(0x31020707, &sbsc->sdwcr10); writel(0x0017040a, &sbsc->sdwcr11); - writel(0x05555555, &sbsc->sddrvcr0); + writel(0x055557ff, &sbsc->sddrvcr0); /* Enlarge drivability of LPDQS0-3, LPCLK */ writel(0x30000000, &sbsc->sdwcr2); writel(readl(&sbsc->sdpcr) | 0x80, &sbsc->sdpcr); @@ -112,7 +112,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc) writel(0x0, SDMRA1A); writel(0x00000402, &sbsc->sdmracr0); writel(0x0, SDMRA1A); - writel(0x00000403, &sbsc->sdmracr0); + writel(0x00000203, &sbsc->sdmracr0); /* MR3 register DS=2 */ writel(0x0, SDMRA1A); writel(0x0, SDMRA2A); } else { @@ -120,7 +120,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc) writel(0x0, SDMRA1B); writel(0x00000402, &sbsc->sdmracr0); writel(0x0, SDMRA1B); - writel(0x00000403, &sbsc->sdmracr0); + writel(0x00000203, &sbsc->sdmracr0); /* MR3 register DS=2 */ writel(0x0, SDMRA1B); writel(0x0, SDMRA2B); } @@ -301,8 +301,19 @@ int board_early_init_f(void) return 0; } +void adjust_core_voltage(void) +{ + u8 data; + + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + data = 0x35; + i2c_set_bus_num(0); + i2c_write(0x40, 3, 1, &data, 1); +} + int board_init(void) { + adjust_core_voltage(); sh73a0_pinmux_init(); /* SCIFA 4 */
After stress test, I found some of kzm9g board occures memory failure. This patch adust SDRAM setting. - Enlarge drivability on both SDRAM controller and SDRAM itself - Raise core voltage Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> --- board/kmc/kzm9g/kzm9g.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-)