[ARM,2/2] ARMv8 aarch32 round to integral instructions

diff --git a/gcc/testsuite/gcc.target/arm/vrintaf32.c b/gcc/testsuite/gcc.target/arm/vrintaf32.c
new file mode 100644
index 0000000..b05ed9f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vrintaf32.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_vfp_ok } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_v8_vfp } */
+
+float
+foo (float x)
+{
+  return __builtin_roundf (x);
+}
+
+/* { dg-final { scan-assembler-times "vrinta.f32\ts\[0-9\]+" 1 } } */
diff --git a/gcc/testsuite/gcc.target/arm/vrintaf64.c b/gcc/testsuite/gcc.target/arm/vrintaf64.c
new file mode 100644
index 0000000..04a568e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vrintaf64.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_vfp_ok } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_v8_vfp } */
+
+double
+foo (double x)
+{
+  return __builtin_round (x);
+}
+
+/* { dg-final { scan-assembler-times "vrinta.f64\td\[0-9\]+" 1 } } */
diff --git a/gcc/testsuite/gcc.target/arm/vrintmf32.c b/gcc/testsuite/gcc.target/arm/vrintmf32.c
new file mode 100644
index 0000000..2e13ee3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vrintmf32.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_vfp_ok } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_v8_vfp } */
+
+float
+foo (float x)
+{
+  return __builtin_floorf (x);
+}
+
+/* { dg-final { scan-assembler-times "vrintm.f32\ts\[0-9\]+" 1 } } */
diff --git a/gcc/testsuite/gcc.target/arm/vrintmf64.c b/gcc/testsuite/gcc.target/arm/vrintmf64.c
new file mode 100644
index 0000000..4a29234
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vrintmf64.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_vfp_ok } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_v8_vfp } */
+
+double
+foo (double x)
+{
+  return __builtin_floor (x);
+}
+
+/* { dg-final { scan-assembler-times "vrintm.f64\td\[0-9\]+" 1 } } */
diff --git a/gcc/testsuite/gcc.target/arm/vrintpf32.c b/gcc/testsuite/gcc.target/arm/vrintpf32.c
new file mode 100644
index 0000000..f936a62
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vrintpf32.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_vfp_ok } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_v8_vfp } */
+
+float
+foo (float x)
+{
+  return __builtin_ceilf (x);
+}
+
+/* { dg-final { scan-assembler-times "vrintp.f32\ts\[0-9\]+" 1 } } */
diff --git a/gcc/testsuite/gcc.target/arm/vrintpf64.c b/gcc/testsuite/gcc.target/arm/vrintpf64.c
new file mode 100644
index 0000000..6d2a155
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vrintpf64.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_vfp_ok } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_v8_vfp } */
+
+double
+foo (double x)
+{
+  return __builtin_ceil (x);
+}
+
+/* { dg-final { scan-assembler-times "vrintp.f64\td\[0-9\]+" 1 } } */
diff --git a/gcc/testsuite/gcc.target/arm/vrintrf32.c b/gcc/testsuite/gcc.target/arm/vrintrf32.c
new file mode 100644
index 0000000..e6ed0ac
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vrintrf32.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_vfp_ok } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_v8_vfp } */
+
+float
+foo (float x)
+{
+  return __builtin_nearbyintf (x);
+}
+
+/* { dg-final { scan-assembler-times "vrintr.f32\ts\[0-9\]+" 1 } } */
diff --git a/gcc/testsuite/gcc.target/arm/vrintrf64.c b/gcc/testsuite/gcc.target/arm/vrintrf64.c
new file mode 100644
index 0000000..43613ff
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vrintrf64.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_vfp_ok } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_v8_vfp } */
+
+double
+foo (double x)
+{
+  return __builtin_nearbyint (x);
+}
+
+/* { dg-final { scan-assembler-times "vrintr.f64\td\[0-9\]+" 1 } } */
diff --git a/gcc/testsuite/gcc.target/arm/vrintxf32.c b/gcc/testsuite/gcc.target/arm/vrintxf32.c
new file mode 100644
index 0000000..47a76ae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vrintxf32.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_vfp_ok } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_v8_vfp } */
+
+float
+foo (float x)
+{
+  return __builtin_rintf (x);
+}
+
+/* { dg-final { scan-assembler-times "vrintx.f32\ts\[0-9\]+" 1 } } */
diff --git a/gcc/testsuite/gcc.target/arm/vrintxf64.c b/gcc/testsuite/gcc.target/arm/vrintxf64.c
new file mode 100644
index 0000000..34f7c6d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vrintxf64.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_vfp_ok } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_v8_vfp } */
+
+double
+foo (double x)
+{
+  return __builtin_rint (x);
+}
+
+/* { dg-final { scan-assembler-times "vrintx.f64\td\[0-9\]+" 1 } } */
diff --git a/gcc/testsuite/gcc.target/arm/vrintzf32.c b/gcc/testsuite/gcc.target/arm/vrintzf32.c
new file mode 100644
index 0000000..7eda916
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vrintzf32.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_vfp_ok } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_v8_vfp } */
+
+float
+foo (float x)
+{
+  return __builtin_truncf (x);
+}
+
+/* { dg-final { scan-assembler-times "vrintz.f32\ts\[0-9\]+" 1 } } */
diff --git a/gcc/testsuite/gcc.target/arm/vrintzf64.c b/gcc/testsuite/gcc.target/arm/vrintzf64.c
new file mode 100644
index 0000000..93b0b4f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vrintzf64.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_vfp_ok } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_v8_vfp } */
+
+double
+foo (double x)
+{
+  return __builtin_trunc (x);
+}
+
+/* { dg-final { scan-assembler-times "vrintz.f64\td\[0-9\]+" 1 } } */
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index ee1b26a..db6817a 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2031,6 +2031,22 @@  proc check_effective_target_arm_vfp_ok { } {
     }
 }
 
+# Return 1 if this is an ARM target supporting -mfpu=fp-armv8
+# -mfloat-abi=softfp.
+proc check_effective_target_arm_v8_vfp_ok {} {
+    if { [check_effective_target_arm32] } {
+	return [check_no_compiler_messages arm_v8_vfp_ok object {
+	  int foo (void)
+	  {
+	     __asm__ volatile ("vrinta.f32.f32 s0, s0");
+	     return 0;
+	  }
+	} "-mfpu=fp-armv8 -mfloat-abi=softfp"]
+    } else {
+	return 0
+    }
+}
+
 # Return 1 if this is an ARM target supporting -mfpu=vfp
 # -mfloat-abi=hard.  Some multilibs may be incompatible with these
 # options.
@@ -2082,6 +2098,13 @@  proc add_options_for_arm_neon { flags } {
     return "$flags $et_arm_neon_flags"
 }
 
+proc add_options_for_arm_v8_vfp { flags } {
+    if { ! [check_effective_target_arm_v8_vfp_ok] } {
+        return "$flags"
+    }
+    return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
+}
+
 # Add the options needed for NEON.  We need either -mfloat-abi=softfp
 # or -mfloat-abi=hard, but if one is already specified by the
 # multilib, use it.  Similarly, if a -mfpu option already enables