diff mbox

[v3] Add support for sparc compare-and-branch

Message ID 1967849.TQiz8OpHdv@polaris
State New
Headers show

Commit Message

Eric Botcazou Nov. 13, 2012, 7:32 p.m. UTC 
> We really need to start using the newer names, as Sun is not going to
> provide single letter indicators for sparc4 or future xarch values.
> 
> In fact, that's exactly what needed to be worked on from the beginning
> for the solaris side of this cbcond patch.  We're talking in circles.

OK, sorry for the fiasco...  I can propose the attached patch (for sparc.h and 
sol2.h only).

Working on this, I discovered an oddity in GNU as: -xarch=sparc4 -64 yields a 
64-bit object file whereas -64 -xarch=sparc4 yields a 32-bit object file.  My 
understanding is that Sun as will generate a 64-bit object file in both cases.


	* config/sparc/sparc.h (ASM_CPU64_DEFAULT_SPEC): Adjust for Niagara4.
	(ASM_CPU_SPEC): Likewise.
	(AS_NIAGARA4_FLAG): Define.
	* config/sparc/sol2.h (AS_SPARC32_FLAG): Define.
	(AS_SPARC64_FLAG): Drop -TSO and adjust.
	(AS_NIAGARA4_FLAG): Redefine if !HAVE_AS_SPARC4.
	(ASM_CPU32_DEFAULT_SPEC): Use AS_SPARC32_FLAG for Niagara4 only.
	(ASM_CPU64_DEFAULT_SPEC): Likewise with AS_NIAGARA4_FLAG.
	(ASM_CPU_SPEC): Adjust similarly.
	(ASM_SPEC): Add " %(asm_arch)" if HAVE_AS_SPARC4 and adjust.
	(ASM_ARCH32_SPEC): Redefine if USE_GAS.
	(ASM_ARCH64_SPEC): Likewise.

Comments

David Miller Nov. 13, 2012, 7:40 p.m. UTC | #1 
From: Eric Botcazou <ebotcazou@adacore.com>
Date: Tue, 13 Nov 2012 20:32:40 +0100

> Working on this, I discovered an oddity in GNU as: -xarch=sparc4 -64 yields a 
> 64-bit object file whereas -64 -xarch=sparc4 yields a 32-bit object file.  My 
> understanding is that Sun as will generate a 64-bit object file in both cases.

Thanks for finding this, that's definitely incorrect behavior.  I bet there
is some unintended override triggered by sparc4 selection, and I'll go and
fix that soon.
diff mbox

Patch

Index: config/sparc/sparc.h
===================================================================
--- config/sparc/sparc.h	(revision 193416)
+++ config/sparc/sparc.h	(working copy)
@@ -195,7 +195,7 @@  extern enum cmodel sparc_cmodel;
 #endif
 #if TARGET_CPU_DEFAULT == TARGET_CPU_niagara4
 #define CPP_CPU64_DEFAULT_SPEC "-D__sparc_v9__"
-#define ASM_CPU64_DEFAULT_SPEC "-Av9" AS_NIAGARA3_FLAG
+#define ASM_CPU64_DEFAULT_SPEC AS_NIAGARA4_FLAG
 #endif
 
 #else
@@ -337,7 +337,7 @@  extern enum cmodel sparc_cmodel;
 %{mcpu=niagara:%{!mv8plus:-Av9b}} \
 %{mcpu=niagara2:%{!mv8plus:-Av9b}} \
 %{mcpu=niagara3:%{!mv8plus:-Av9" AS_NIAGARA3_FLAG "}} \
-%{mcpu=niagara4:%{!mv8plus:-Av9" AS_NIAGARA3_FLAG "}} \
+%{mcpu=niagara4:%{!mv8plus:" AS_NIAGARA4_FLAG "}} \
 %{!mcpu*:%(asm_cpu_default)} \
 "
 
@@ -1746,6 +1747,12 @@  extern int sparc_indent_opcode;
 #define AS_NIAGARA3_FLAG "b"
 #endif
 
+#ifdef HAVE_AS_SPARC4
+#define AS_NIAGARA4_FLAG "-xarch=sparc4"
+#else
+#define AS_NIAGARA4_FLAG "-Av9" AS_NIAGARA3_FLAG
+#endif
+
 /* We use gcc _mcount for profiling.  */
 #define NO_PROFILE_COUNTERS 0
 
Index: config/sparc/sol2.h
===================================================================
--- config/sparc/sol2.h	(revision 193416)
+++ config/sparc/sol2.h	(working copy)
@@ -54,13 +54,14 @@  along with GCC; see the file COPYING3.
 
 /* Supposedly the same as vanilla sparc svr4, except for the stuff below: */
 
-/* This is here rather than in sparc.h because it's not known what
-   other assemblers will accept.  */
-
-#ifndef USE_GAS
-#define AS_SPARC64_FLAG	"-xarch=v9"
+#ifdef HAVE_AS_SPARC4
+#define AS_SPARC32_FLAG	""
+#define AS_SPARC64_FLAG	""
 #else
-#define AS_SPARC64_FLAG	"-TSO -64 -Av9"
+#define AS_SPARC32_FLAG	"-xarch=v8plus"
+#define AS_SPARC64_FLAG	"-xarch=v9"
+#undef AS_NIAGARA4_FLAG
+#define AS_NIAGARA4_FLAG	AS_NIAGARA3_FLAG
 #endif
 
 #undef ASM_CPU32_DEFAULT_SPEC
@@ -83,7 +84,7 @@  along with GCC; see the file COPYING3.
 #undef ASM_CPU32_DEFAULT_SPEC
 #define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusa"
 #undef ASM_CPU64_DEFAULT_SPEC
-#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG "a"
+#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9a"
 #undef ASM_CPU_DEFAULT_SPEC
 #define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
 #endif
@@ -94,7 +95,7 @@  along with GCC; see the file COPYING3.
 #undef ASM_CPU32_DEFAULT_SPEC
 #define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
 #undef ASM_CPU64_DEFAULT_SPEC
-#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG "b"
+#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
 #undef ASM_CPU_DEFAULT_SPEC
 #define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
 #endif
@@ -105,7 +106,7 @@  along with GCC; see the file COPYING3.
 #undef ASM_CPU32_DEFAULT_SPEC
 #define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
 #undef ASM_CPU64_DEFAULT_SPEC
-#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG "b"
+#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
 #undef ASM_CPU_DEFAULT_SPEC
 #define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
 #endif
@@ -116,7 +117,7 @@  along with GCC; see the file COPYING3.
 #undef ASM_CPU32_DEFAULT_SPEC
 #define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
 #undef ASM_CPU64_DEFAULT_SPEC
-#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG "b"
+#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
 #undef ASM_CPU_DEFAULT_SPEC
 #define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
 #endif
@@ -127,7 +128,7 @@  along with GCC; see the file COPYING3.
 #undef ASM_CPU32_DEFAULT_SPEC
 #define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus" AS_NIAGARA3_FLAG
 #undef ASM_CPU64_DEFAULT_SPEC
-#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG AS_NIAGARA3_FLAG
+#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9" AS_NIAGARA3_FLAG
 #undef ASM_CPU_DEFAULT_SPEC
 #define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
 #endif
@@ -136,17 +137,13 @@  along with GCC; see the file COPYING3.
 #undef CPP_CPU64_DEFAULT_SPEC
 #define CPP_CPU64_DEFAULT_SPEC ""
 #undef ASM_CPU32_DEFAULT_SPEC
-#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus" AS_NIAGARA3_FLAG
+#define ASM_CPU32_DEFAULT_SPEC AS_SPARC32_FLAG AS_NIAGARA4_FLAG
 #undef ASM_CPU64_DEFAULT_SPEC
-#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG AS_NIAGARA3_FLAG
+#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG AS_NIAGARA4_FLAG
 #undef ASM_CPU_DEFAULT_SPEC
 #define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
 #endif
 
-/* Both Sun as and GNU as understand -K PIC.  */
-#undef ASM_SPEC
-#define ASM_SPEC ASM_SPEC_BASE ASM_PIC_SPEC
-
 #undef CPP_CPU_SPEC
 #define CPP_CPU_SPEC "\
 %{mcpu=sparclet|mcpu=tsc701:-D__sparclet__} \
@@ -235,16 +232,33 @@  extern const char *host_detect_local_cpu
 
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC "\
-%{mcpu=v9:" DEF_ARCH32_SPEC("-xarch=v8plus") DEF_ARCH64_SPEC(AS_SPARC64_FLAG) "} \
-%{mcpu=ultrasparc:" DEF_ARCH32_SPEC("-xarch=v8plusa") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "a") "} \
-%{mcpu=ultrasparc3:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "b") "} \
-%{mcpu=niagara:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "b") "} \
-%{mcpu=niagara2:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "b") "} \
-%{mcpu=niagara3:" DEF_ARCH32_SPEC("-xarch=v8plus" AS_NIAGARA3_FLAG) DEF_ARCH64_SPEC(AS_SPARC64_FLAG AS_NIAGARA3_FLAG) "} \
-%{mcpu=niagara4:" DEF_ARCH32_SPEC("-xarch=v8plus" AS_NIAGARA3_FLAG) DEF_ARCH64_SPEC(AS_SPARC64_FLAG AS_NIAGARA3_FLAG) "} \
-%{!mcpu=niagara4:%{!mcpu=niagara3:%{!mcpu=niagara2:%{!mcpu=niagara:%{!mcpu=ultrasparc3:%{!mcpu=ultrasparc:%{!mcpu=v9:%{mcpu*:" DEF_ARCH32_SPEC("-xarch=v8") DEF_ARCH64_SPEC(AS_SPARC64_FLAG) "}}}}}}}} \
+%{mcpu=v9:" DEF_ARCH32_SPEC("-xarch=v8plus") DEF_ARCH64_SPEC("-xarch=v9") "} \
+%{mcpu=ultrasparc:" DEF_ARCH32_SPEC("-xarch=v8plusa") DEF_ARCH64_SPEC("-xarch=v9a") "} \
+%{mcpu=ultrasparc3:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
+%{mcpu=niagara:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
+%{mcpu=niagara2:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
+%{mcpu=niagara3:" DEF_ARCH32_SPEC("-xarch=v8plus" AS_NIAGARA3_FLAG) DEF_ARCH64_SPEC("-xarch=v9" AS_NIAGARA3_FLAG) "} \
+%{mcpu=niagara4:" DEF_ARCH32_SPEC(AS_SPARC32_FLAG AS_NIAGARA4_FLAG) DEF_ARCH64_SPEC(AS_SPARC64_FLAG AS_NIAGARA4_FLAG) "} \
+%{!mcpu=niagara4:%{!mcpu=niagara3:%{!mcpu=niagara2:%{!mcpu=niagara:%{!mcpu=ultrasparc3:%{!mcpu=ultrasparc:%{!mcpu=v9:%{mcpu*:" DEF_ARCH32_SPEC("-xarch=v8") DEF_ARCH64_SPEC("-xarch=v9") "}}}}}}}} \
 %{!mcpu*:%(asm_cpu_default)} \
 "
+ASM_ARCH64_SPEC
+/* If the assembler supports -xarch=sparc4, we switch to the explicit
+   word size selection mechanism available both in GNU's and Sun's.  */
+#ifdef HAVE_AS_SPARC4
+
+#ifndef USE_GAS
+#undef ASM_ARCH32_SPEC
+#define ASM_ARCH32_SPEC "-m32"
+#undef ASM_ARCH64_SPEC
+#define ASM_ARCH64_SPEC "-m64"
+#endif
+
+/* Both Sun as and GNU as understand -K PIC.  */
+#undef ASM_SPEC
+#define ASM_SPEC ASM_SPEC_BASE " %(asm_arch)" ASM_PIC_SPEC
+
+#else /* HAVE_AS_SPARC4 */
 
 #undef ASM_ARCH32_SPEC
 #define ASM_ARCH32_SPEC ""
@@ -258,6 +272,11 @@  extern const char *host_detect_local_cpu
 #undef ASM_ARCH_SPEC
 #define ASM_ARCH_SPEC ""
 
+#undef ASM_SPEC
+#define ASM_SPEC ASM_SPEC_BASE ASM_PIC_SPEC
+
+#endif /* HAVE_AS_SPARC4 */
+
 #ifdef USE_GLD
 /* Since binutils 2.21, GNU ld supports new *_sol2 emulations to strictly
    follow the Solaris 2 ABI.  Prefer them if present.  */