@@ -1310,6 +1310,17 @@
(set_attr "mode" "<MODE>")]
)
+(define_insn "*compare_neg<mode>"
+ [(set (reg:CC CC_REGNUM)
+ (compare:CC
+ (match_operand:GPI 0 "register_operand" "r")
+ (neg:GPI (match_operand:GPI 1 "register_operand" "r"))))]
+ ""
+ "cmn\\t%<w>0, %<w>1"
+ [(set_attr "v8type" "alus")
+ (set_attr "mode" "<MODE>")]
+)
+
(define_insn "*add_<shift>_<mode>"
[(set (match_operand:GPI 0 "register_operand" "=rk")
(plus:GPI (ASHIFT:GPI (match_operand:GPI 1 "register_operand" "r")
b/gcc/testsuite/gcc.target/aarch64/adds.c
new file mode 100644
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int z;
+int
+foo (int x, int y)
+{
+ int l = x + y;
+ if (l == 0)
+ return 5;
+
+ /* { dg-final { scan-assembler "adds\tw\[0-9\]" } } */
+ z = l ;
+ return 25;
+}
+
+typedef long long s64;
+
+s64 zz;
+s64
+foo2 (s64 x, s64 y)
+{
+ s64 l = x + y;
+ if (l < 0)
+ return 5;
+
+ /* { dg-final { scan-assembler "adds\tx\[0-9\]" } } */
+ zz = l ;
+ return 25;
+}
b/gcc/testsuite/gcc.target/aarch64/cmn.c
new file mode 100644
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int
+foo (int a, int b)
+{
+ if (a + b)
+ return 5;
+ else
+ return 2;
+ /* { dg-final { scan-assembler "cmn\tw\[0-9\]" } } */
+}
+
+typedef long long s64;
+
+s64
+foo2 (s64 a, s64 b)
+{
+ if (a + b)
+ return 5;
+ else
+ return 2;
+ /* { dg-final { scan-assembler "cmn\tx\[0-9\]" } } */
+}
b/gcc/testsuite/gcc.target/aarch64/subs.c
new file mode 100644
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int z;
+int
+foo (int x, int y)
+{
+ int l = x - y;
+ if (l == 0)
+ return 5;
+
+ /* { dg-final { scan-assembler "subs\tw\[0-9\]" } } */
+ z = l ;
+ return 25;
+}
+
+typedef long long s64;
+
+s64 zz;
+s64
+foo2 (s64 x, s64 y)
+{
+ s64 l = x - y;
+ if (l < 0)
+ return 5;
+
+ /* { dg-final { scan-assembler "subs\tx\[0-9\]" } } */
+ zz = l ;
+ return 25;
+}