| Message ID | 1351679539-30651-1-git-send-email-robin@protonic.nl |
|---|---|
| State | New, archived |
| Headers | show |
Hi Robin, On 10/31/2012 03:32 AM, Robin van der Gracht wrote: > When using a Samsung nandflash with 2 level cells, the wrong page size, > erase size and oobsize is calculated. > > I'm using a Samsung K9K8G08U0B nandflash (ID: 0xECD3519558). When booting the kernel i get: > NAND device: Manufacturer ID: 0xec, Chip ID: 0xd3 (Samsung NAND 1GiB 3,3V 8-bit), page size: 4096, OOB size: 128 > > This is wrong. My nand flash has a pagesize of 2048 and oobsize 64. > > This patch should work for all Samsung 6 byte ID chips, found on: > http://www.linux-mtd.infradead.org/nand-data/nanddata.html > > Signed-off-by: Robin van der Gracht <robin@protonic.nl> I believe this regression has already been fixed and accepted by David Woodhouse and is awaiting upstream submission - hopefully for the 3.7-rc cycle. This should be its ID, in linux-mtd.git (and linux-next): commit bc86cf7af2ebda88056538e8edff852ee627f76a mtd: nand: fix Samsung SLC NAND identification regression http://lists.infradead.org/pipermail/linux-mtd/2012-October/044458.html Please test this fix to see if it fixes your problem, if possible. BTW, I would prefer not to use your solution, as the new Samsung ID decode table actually applies to some 2-level (i.e., SLC) Samsung NAND, particularly K9FAG08U0M. Brian
On Wed, 2012-10-31 at 09:17 -0700, Brian Norris wrote: > I believe this regression has already been fixed and accepted by David > Woodhouse and is awaiting upstream submission - hopefully for the 3.7-rc > cycle. This should be its ID, in linux-mtd.git (and linux-next): Hm, did I not push that to Linus yet? I'll do so shortly. Anything else we need to get in to 3.7 while I'm at it?
On Wed, Oct 31, 2012 at 9:30 AM, David Woodhouse <dwmw2@infradead.org> wrote: > On Wed, 2012-10-31 at 09:17 -0700, Brian Norris wrote: >> I believe this regression has already been fixed and accepted by David >> Woodhouse and is awaiting upstream submission - hopefully for the 3.7-rc >> cycle. This should be its ID, in linux-mtd.git (and linux-next): > > Hm, did I not push that to Linus yet? I'll do so shortly. Anything else > we need to get in to 3.7 while I'm at it? I don't know of much, but this commit is actually relevant to the same patch series, since I increased the max OOB size. In l2-mtd-2.6.git: commit acc6ceeb2ee2f1c7dae1e25914b40f0c294f6b42 mtd: nand: Increase the ecc placement locations to 640 I'll leave it to the author (Vipin), Artem, and you to decide if it needs to be pushed ahead to 3.7. Brian
On Wed, 2012-10-31 at 16:30 +0000, David Woodhouse wrote: > On Wed, 2012-10-31 at 09:17 -0700, Brian Norris wrote: > > I believe this regression has already been fixed and accepted by David > > Woodhouse and is awaiting upstream submission - hopefully for the 3.7-rc > > cycle. This should be its ID, in linux-mtd.git (and linux-next): > > Hm, did I not push that to Linus yet? I'll do so shortly. Anything else > we need to get in to 3.7 while I'm at it? The 'for-3.7' branch in the l2-mtd.git tree.
On Wed, Oct 31, 2012 at 9:30 AM, David Woodhouse <dwmw2@infradead.org> wrote: > On Wed, 2012-10-31 at 09:17 -0700, Brian Norris wrote: >> I believe this regression has already been fixed and accepted by David >> Woodhouse and is awaiting upstream submission - hopefully for the 3.7-rc >> cycle. This should be its ID, in linux-mtd.git (and linux-next): > > Hm, did I not push that to Linus yet? I'll do so shortly. Anything else > we need to get in to 3.7 while I'm at it? I haven't seen any pull requests to Linus. Bump? Regards, Brian
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index ec6841d..e292074 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -2989,7 +2989,8 @@ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip, * Check for ID length, cell type, and Hynix/Samsung ID to decide what * to do. */ - if (id_len == 6 && id_data[0] == NAND_MFR_SAMSUNG) { + if (id_len == 6 && id_data[0] == NAND_MFR_SAMSUNG && + (chip->cellinfo & NAND_CI_CELLTYPE_4LVL)) { /* Calc pagesize */ mtd->writesize = 2048 << (extid & 0x03); extid >>= 2; diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 24e9159..3e3860e 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -227,6 +227,10 @@ typedef enum { /* Cell info constants */ #define NAND_CI_CHIPNR_MSK 0x03 #define NAND_CI_CELLTYPE_MSK 0x0C +#define NAND_CI_CELLTYPE_2LVL 0x00 +#define NAND_CI_CELLTYPE_4LVL 0x04 +#define NAND_CI_CELLTYPE_8LVL 0x08 +#define NAND_CI_CELLTYPE_16LVL 0x0C /* Keep gcc happy */ struct nand_chip;
When using a Samsung nandflash with 2 level cells, the wrong page size, erase size and oobsize is calculated. I'm using a Samsung K9K8G08U0B nandflash (ID: 0xECD3519558). When booting the kernel i get: NAND device: Manufacturer ID: 0xec, Chip ID: 0xd3 (Samsung NAND 1GiB 3,3V 8-bit), page size: 4096, OOB size: 128 This is wrong. My nand flash has a pagesize of 2048 and oobsize 64. This patch should work for all Samsung 6 byte ID chips, found on: http://www.linux-mtd.infradead.org/nand-data/nanddata.html Signed-off-by: Robin van der Gracht <robin@protonic.nl> --- drivers/mtd/nand/nand_base.c | 3 ++- include/linux/mtd/nand.h | 4 ++++ 2 files changed, 6 insertions(+), 1 deletions(-)