diff mbox

Use define_memory_constraint on sparc when necessary.

Message ID 20121024.015903.328487756166092400.davem@davemloft.net
State New
Headers show

Commit Message

David Miller Oct. 24, 2012, 5:59 a.m. UTC
While playing around with LRA on sparc I noticed that we had some
poorly formed target memory constraints on sparc.

In particular, they were not using define_memory_constraint, so we
would not get a true return from EXTRA_MEMORY_CONSTRAINT for them.

Also, these were matching 'reg' objects for special pseudo treatment.
But the EXTRA_MEMORY_CONSTRAINT logic in reload (and LRA) take care of
that stuff for us.

As a result memory_ok_for_ldd also no longer needs to handle non-MEM
cases.

Committed to master.

	* config/sparc/constraints.md ("T", "W"): Change
	definitions to use define_memory_constraint.  Do not match
	'reg'.
	* config/sparc/sparc.c (memory_ok_for_ldd): Remove all non-MEM
	handling code, update comment.
---
 gcc/ChangeLog                   |  8 ++++++++
 gcc/config/sparc/constraints.md |  8 ++++----
 gcc/config/sparc/sparc.c        | 25 +++++++------------------
 3 files changed, 19 insertions(+), 22 deletions(-)

Comments

Eric Botcazou Oct. 26, 2012, 7:40 a.m. UTC | #1
> While playing around with LRA on sparc I noticed that we had some
> poorly formed target memory constraints on sparc.
> 
> In particular, they were not using define_memory_constraint, so we
> would not get a true return from EXTRA_MEMORY_CONSTRAINT for them.
> 
> Also, these were matching 'reg' objects for special pseudo treatment.
> But the EXTRA_MEMORY_CONSTRAINT logic in reload (and LRA) take care of
> that stuff for us.

Indeed.  But you need to remove the associated comment:

;; Extra constraints
;; Our memory extra constraints have to emulate the behavior of 'm' and 'o',
;; i.e. accept pseudo-registers during reload.

While you're at it, you could also move the (define_memory_constraint "w") out 
of the "register contraints" part and put it into a "memory constraints" part 
with the other memory constraints.
David Miller Oct. 26, 2012, 7:48 a.m. UTC | #2
From: Eric Botcazou <ebotcazou@adacore.com>
Date: Fri, 26 Oct 2012 09:40:08 +0200

>> While playing around with LRA on sparc I noticed that we had some
>> poorly formed target memory constraints on sparc.
>> 
>> In particular, they were not using define_memory_constraint, so we
>> would not get a true return from EXTRA_MEMORY_CONSTRAINT for them.
>> 
>> Also, these were matching 'reg' objects for special pseudo treatment.
>> But the EXTRA_MEMORY_CONSTRAINT logic in reload (and LRA) take care of
>> that stuff for us.
> 
> Indeed.  But you need to remove the associated comment:
> 
> ;; Extra constraints
> ;; Our memory extra constraints have to emulate the behavior of 'm' and 'o',
> ;; i.e. accept pseudo-registers during reload.
> 
> While you're at it, you could also move the (define_memory_constraint "w") out 
> of the "register contraints" part and put it into a "memory constraints" part 
> with the other memory constraints.

Thanks for catching this.  Also the comment at the top can now mention
the now-available constraint letter as well.

I'll fix this up.
Eric Botcazou Oct. 26, 2012, 8:52 a.m. UTC | #3
> Thanks for catching this.  Also the comment at the top can now mention
> the now-available constraint letter as well.

Ah, yes.  And doc/md.texi be adjusted accordingly.
diff mbox

Patch

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9b780ee..e5714c5 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@ 
+2012-10-23  David S. Miller  <davem@davemloft.net>
+
+	* config/sparc/constraints.md ("T", "W"): Change
+	definitions to use define_memory_constraint.  Do not match
+	'reg'.
+	* config/sparc/sparc.c (memory_ok_for_ldd): Remove all non-MEM
+	handling code, update comment.
+
 2012-10-23  Ian Lance Taylor  <iant@google.com>
 
 	* doc/extend.texi (Extended Asm): The '+' constraint does not
diff --git a/gcc/config/sparc/constraints.md b/gcc/config/sparc/constraints.md
index 472490f..ffe5304 100644
--- a/gcc/config/sparc/constraints.md
+++ b/gcc/config/sparc/constraints.md
@@ -132,10 +132,10 @@ 
       (match_test "fp_high_losum_p (op)")))
 
 ;; Not needed in 64-bit mode
-(define_constraint "T"
+(define_memory_constraint "T"
  "Memory reference whose address is aligned to 8-byte boundary"
  (and (match_test "TARGET_ARCH32")
-      (match_code "mem,reg")
+      (match_code "mem")
       (match_test "memory_ok_for_ldd (op)")))
 
 ;; Not needed in 64-bit mode
@@ -148,9 +148,9 @@ 
       (match_test "register_ok_for_ldd (op)")))
 
 ;; Equivalent to 'T' but available in 64-bit mode
-(define_constraint "W"
+(define_memory_constraint "W"
  "Memory reference for 'e' constraint floating-point register"
- (and (match_code "mem,reg")
+ (and (match_code "mem")
       (match_test "memory_ok_for_ldd (op)")))
 
 (define_constraint "Y"
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 8849c03..272632e 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -8065,29 +8065,18 @@  register_ok_for_ldd (rtx reg)
   return 1;
 }
 
-/* Return 1 if OP is a memory whose address is known to be
-   aligned to 8-byte boundary, or a pseudo during reload.
-   This makes it suitable for use in ldd and std insns.  */
+/* Return 1 if OP, a MEM, has an address which is known to be
+   aligned to an 8-byte boundary.  */
 
 int
 memory_ok_for_ldd (rtx op)
 {
-  if (MEM_P (op))
-    {
-      /* In 64-bit mode, we assume that the address is word-aligned.  */
-      if (TARGET_ARCH32 && !mem_min_alignment (op, 8))
-	return 0;
+  /* In 64-bit mode, we assume that the address is word-aligned.  */
+  if (TARGET_ARCH32 && !mem_min_alignment (op, 8))
+    return 0;
 
-      if (! can_create_pseudo_p ()
-	  && !strict_memory_address_p (Pmode, XEXP (op, 0)))
-	return 0;
-    }
-  else if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER)
-    {
-      if (!(reload_in_progress && reg_renumber [REGNO (op)] < 0))
-	return 0;
-    }
-  else
+  if (! can_create_pseudo_p ()
+      && !strict_memory_address_p (Pmode, XEXP (op, 0)))
     return 0;
 
   return 1;