Message ID | 1349910781-32088-10-git-send-email-sjg@chromium.org |
---|---|
State | Superseded, archived |
Delegated to: | Simon Glass |
Headers | show |
Dear Graeme Russ, > Hi Simon, > > On Thu, Oct 11, 2012 at 10:13 AM, Simon Glass <sjg@chromium.org> wrote: > > Coreboot boards have an LPC TPM connected, so enable this. We also need > > to skip the reset code. > > > > Signed-off-by: Simon Glass <sjg@chromium.org> > > --- > > > > include/configs/coreboot.h | 6 +++++- > > 1 files changed, 5 insertions(+), 1 deletions(-) > > > > diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h > > index 2c65d74..75db176 100644 > > --- a/include/configs/coreboot.h > > +++ b/include/configs/coreboot.h > > @@ -37,7 +37,7 @@ > > > > #define CONFIG_SYS_COREBOOT > > #undef CONFIG_SHOW_BOOT_PROGRESS > > #define CONFIG_LAST_STAGE_INIT > > > > - > > +#define CONFIG_NO_RESET_CODE > > > > /*---------------------------------------------------------------------- > > - > > > > * Watchdog Configuration > > > > @@ -45,6 +45,10 @@ > > > > #undef CONFIG_WATCHDOG > > #undef CONFIG_HW_WATCHDOG > > > > +/* Generic TPM interfaced through LPC bus */ > > +#define CONFIG_GENERIC_LPC_TPM > > +#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 > > + > > > > /*---------------------------------------------------------------------- > > - > > > > * Real Time Clock Configuration > > */ > > > > -- > > 1.7.7.3 > > Acked-by: Graeme Russ <graeme.russ@gmail.com> Well, spliting it into two patches -- since each hunk does something else -- won't hurt. But I think it doesn't matter. Best regards, Marek Vasut
diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 2c65d74..75db176 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -37,7 +37,7 @@ #define CONFIG_SYS_COREBOOT #undef CONFIG_SHOW_BOOT_PROGRESS #define CONFIG_LAST_STAGE_INIT - +#define CONFIG_NO_RESET_CODE /*----------------------------------------------------------------------- * Watchdog Configuration @@ -45,6 +45,10 @@ #undef CONFIG_WATCHDOG #undef CONFIG_HW_WATCHDOG +/* Generic TPM interfaced through LPC bus */ +#define CONFIG_GENERIC_LPC_TPM +#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 + /*----------------------------------------------------------------------- * Real Time Clock Configuration */
Coreboot boards have an LPC TPM connected, so enable this. We also need to skip the reset code. Signed-off-by: Simon Glass <sjg@chromium.org> --- include/configs/coreboot.h | 6 +++++- 1 files changed, 5 insertions(+), 1 deletions(-)