RFA: Simplifying truncation and integer lowpart subregs

[cc:ing sh, spu and tilegx maintainers]

Richard Sandiford <rdsandiford@googlemail.com> writes:
> Andrew Pinski <andrew.pinski@caviumnetworks.com> writes:
>> On Thu, Sep 27, 2012 at 11:13 AM, Uros Bizjak <ubizjak@gmail.com> wrote:
>>> 2012-09-27  Uros Bizjak  <ubizjak@gmail.com>
>>>
>>>         PR rtl-optimization/54457
>>>         * simplify-rtx.c (simplify_subreg):
>>>         Simplify (subreg:M (op:N ((x:N) (y:N)), 0)
>>>         to (op:M (subreg:M (x:N) 0) (subreg:M (x:N) 0)), where
>>>         the outer subreg is effectively a truncation to the original mode M.
>>
>>
>> When I was doing something similar on our internal toolchain at
>> Cavium.  I found doing this caused a regression on MIPS64 n32 in
>> gcc.c-torture/execute/20040709-1.c Where:
>>
>>
>> (insn 15 14 16 2 (set (reg/v:DI 200 [ y ])
>>         (reg:DI 2 $2)) t.c:16 301 {*movdi_64bit}
>>      (expr_list:REG_DEAD (reg:DI 2 $2)
>>         (nil)))
>>
>> (insn 16 15 17 2 (set (reg:DI 210)
>>         (zero_extract:DI (reg/v:DI 200 [ y ])
>>             (const_int 29 [0x1d])
>>             (const_int 0 [0]))) t.c:16 249 {extzvdi}
>>      (expr_list:REG_DEAD (reg/v:DI 200 [ y ])
>>         (nil)))
>>
>> (insn 17 16 23 2 (set (reg:SI 211)
>>         (truncate:SI (reg:DI 210))) t.c:16 175 {truncdisi2}
>>      (expr_list:REG_DEAD (reg:DI 210)
>>         (nil)))
>>
>> Gets converted to:
>> (insn 23 17 26 2 (set (reg/i:SI 2 $2)
>>         (and:SI (reg:SI 2 $2 [+4 ])
>>             (const_int 536870911 [0x1fffffff]))) t.c:18 156 {*andsi3}
>>      (nil))
>>
>> Which is considered an ext instruction
>>
>> And with the Octeon simulator which causes undefined arguments to
>> 32bit word operations to come out as 0xDEADBEEF which showed the
>> regression.  I fixed it by changing it to produce TRUNCATE instead of
>> the subreg.
>>
>> I did the simplification on ior/and rather than plus/minus/mult so the
>> issue is only when expanding to this to and/ior.
>
> Hmm, hadn't thought of that.  I think some of the existing subreg
> optimisations suffer the same problem.  I.e. we can't assume that
> subreg truncations of nested operands are OK just because the outer
> subreg is OK.
>
> I've got a patch I'm testing.

The idea is to split most of the lowpart subreg handling out of
simplify_subreg and apply it to TRUNCATE too.  There are three reasons:

- I wanted to make the !TRULY_NOOP_TRUNCATION truncation simplifications
  as similar to subreg truncation simplifications as possible.

- Some of the current lowpart subreg simplifications are also correct
  for vector truncations.

- Ideally, using simplify_gen_unary (TRUNCATE, ...) instead of
  simplify_gen_subreg shouldn't penalise TRULY_NOOP_TRUNCATION targets.
  There is already code to use gen_lowpart_no_emit for truncations that
  reduce to subregs, but as things stand, gen_lowpart_no_emit only
  passes objects like SUBREG, REG, MEM, etc., to simplify_gen_subreg;
  others go through gen_lowpart_SUBREG and get no recursive simplification.

We inherited this code from a 1996 patch (r13058):

      if ((TRULY_NOOP_TRUNCATION_MODES_P (mode, GET_MODE (op))
	   ? (num_sign_bit_copies (op, GET_MODE (op))
	      > (unsigned int) (GET_MODE_PRECISION (GET_MODE (op))
				- GET_MODE_PRECISION (mode)))
        ...
 	return rtl_hooks.gen_lowpart_no_emit (mode, op);

I don't see any reason for the sign-bit check.  If truncations are noops,
we should be able to use a subreg regardless.

Other than removing that check, the patch just moves simplifications around.
I've not tried to match new patterns.

The other !TRULY_NOOP_TRUNCATION targets are sh64, spu and tilegx.
I don't think sh64 has any patterns that would be adversely affected,
although the patch ought to make these patterns redundant:

(define_insn_and_split "*logical_sidisi3"
  [(set (match_operand:SI 0 "arith_reg_dest" "=r,r")
	(truncate:SI (sign_extend:DI
			(match_operator:SI 3 "logical_operator"
			  [(match_operand:SI 1 "arith_reg_operand" "%r,r")
			   (match_operand:SI 2 "logical_operand" "r,I10")]))))]
  "TARGET_SHMEDIA"
  "#"
  "&& 1"
  [(set (match_dup 0) (match_dup 3))])

(define_insn_and_split "*logical_sidi3_2"
  [(set (match_operand:DI 0 "arith_reg_dest" "=r,r")
	(sign_extend:DI (truncate:SI (sign_extend:DI
			(match_operator:SI 3 "logical_operator"
			  [(match_operand:SI 1 "arith_reg_operand" "%r,r")
			   (match_operand:SI 2 "logical_operand" "r,I10")])))))]
  "TARGET_SHMEDIA"
  "#"
  "&& 1"
  [(set (match_dup 0) (sign_extend:DI (match_dup 3)))])

combine should now simplify the first to the normal SI logical op
and the second to *logical_sidisi3.  I don't think any spu or tilegx
patterns are affected either way.

Tested on x86_64-linux-gnu, mipsisa32-elf and mipsisa64-elf.  Also tested
by making sure that there were no code differences for a set of gcc .ii
files on gcc20 (-O2 -march=native).  OK to install?

Richard

gcc/
	* machmode.h (GET_MODE_UNIT_PRECISION): New macro.
	* simplify-rtx.c (simplify_truncation): New function.
	(simplify_unary_operation_1): Use it.  Remove sign bit test
	for !TRULY_NOOP_TRUNCATION_MODES_P.
	(simplify_subreg): Use simplify_int_lowpart for TRUNCATE.
	* config/mips/mips.c (mips_truncated_op_cost): New function.
	(mips_rtx_costs): Adjust test for BADDU.
	* config/mips/mips.md (*baddu_di<mode>): Push truncates to operands.

RFA: Simplifying truncation and integer lowpart subregs

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