diff mbox

[U-Boot,RFC,08/17] spl/powerpc: introduce CONFIG_SPL_INIT_MINIMAL

Message ID 1348272087-29608-9-git-send-email-scottwood@freescale.com
State RFC
Headers show

Commit Message

Scott Wood Sept. 22, 2012, 12:01 a.m. UTC 
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 README                            |    3 +++
 arch/powerpc/cpu/mpc85xx/Makefile |   39 ++++++++++++++++++++++++++++---------
 arch/powerpc/cpu/mpc85xx/start.S  |   37 +++++++++++++++++++++--------------
 arch/powerpc/cpu/mpc8xxx/Makefile |   16 +++++++++++++++
 arch/powerpc/lib/Makefile         |   17 +++++++++++++++-
 5 files changed, 87 insertions(+), 25 deletions(-)

Comments

Tom Rini Sept. 24, 2012, 11:48 p.m. UTC | #1 
On Fri, Sep 21, 2012 at 07:01:18PM -0500, Scott Wood wrote:

> Signed-off-by: Scott Wood <scottwood@freescale.com>
[snip]
> diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
> index 33e93c8..c51a774 100644
> --- a/arch/powerpc/cpu/mpc85xx/Makefile
> +++ b/arch/powerpc/cpu/mpc85xx/Makefile
> @@ -28,7 +28,25 @@ include $(TOPDIR)/config.mk
>  
>  LIB	= $(obj)lib$(CPU).o
>  
> +MINIMAL=
> +
> +ifdef CONFIG_SPL_BUILD
> +ifdef CONFIG_SPL_INIT_MINIMAL
> +MINIMAL=y
> +endif
> +endif
> +
> +ifdef MINIMAL
> +
> +START = start.o resetvec.o
> +
> +COBJS-y	+= cpu_init_early.o tlb.o
> +COBJS-$(CONFIG_SPL_NAND_MINIMAL) += cpu_init_nand.o
> +
> +else

So, maybe it's just personal preference by why not:
START = start.o resetvec.o
ifdef CONFIG_SPL_BUILD
COBJS-$(CONFIG_SPL_INIT_MINIMAL) += cpu_init_early.o tlb.o
COBJS-$(CONFIG_SPL_NAND_MINIMAL) += cpu_init_nand.o
else
....

And break out the rest of the COBJS -> COBJS-y changes into their own
cleanup patch before of course.
Scott Wood Sept. 24, 2012, 11:52 p.m. UTC | #2 
On 09/24/2012 06:48:28 PM, Tom Rini wrote:
> On Fri, Sep 21, 2012 at 07:01:18PM -0500, Scott Wood wrote:
> 
> > Signed-off-by: Scott Wood <scottwood@freescale.com>
> [snip]
> > diff --git a/arch/powerpc/cpu/mpc85xx/Makefile  
> b/arch/powerpc/cpu/mpc85xx/Makefile
> > index 33e93c8..c51a774 100644
> > --- a/arch/powerpc/cpu/mpc85xx/Makefile
> > +++ b/arch/powerpc/cpu/mpc85xx/Makefile
> > @@ -28,7 +28,25 @@ include $(TOPDIR)/config.mk
> >
> >  LIB	= $(obj)lib$(CPU).o
> >
> > +MINIMAL=
> > +
> > +ifdef CONFIG_SPL_BUILD
> > +ifdef CONFIG_SPL_INIT_MINIMAL
> > +MINIMAL=y
> > +endif
> > +endif
> > +
> > +ifdef MINIMAL
> > +
> > +START = start.o resetvec.o
> > +
> > +COBJS-y	+= cpu_init_early.o tlb.o
> > +COBJS-$(CONFIG_SPL_NAND_MINIMAL) += cpu_init_nand.o
> > +
> > +else
> 
> So, maybe it's just personal preference by why not:
> START = start.o resetvec.o
> ifdef CONFIG_SPL_BUILD
> COBJS-$(CONFIG_SPL_INIT_MINIMAL) += cpu_init_early.o tlb.o
> COBJS-$(CONFIG_SPL_NAND_MINIMAL) += cpu_init_nand.o
> else
> ....

The START line could be factored out, but I don't think the rest works  
-- where would non-minimal SPL pull in its files?

-Scott
Tom Rini Sept. 25, 2012, 12:03 a.m. UTC | #3 
On Mon, Sep 24, 2012 at 06:52:40PM -0500, Scott Wood wrote:
> On 09/24/2012 06:48:28 PM, Tom Rini wrote:
> >On Fri, Sep 21, 2012 at 07:01:18PM -0500, Scott Wood wrote:
> >
> >> Signed-off-by: Scott Wood <scottwood@freescale.com>
> >[snip]
> >> diff --git a/arch/powerpc/cpu/mpc85xx/Makefile
> >b/arch/powerpc/cpu/mpc85xx/Makefile
> >> index 33e93c8..c51a774 100644
> >> --- a/arch/powerpc/cpu/mpc85xx/Makefile
> >> +++ b/arch/powerpc/cpu/mpc85xx/Makefile
> >> @@ -28,7 +28,25 @@ include $(TOPDIR)/config.mk
> >>
> >>  LIB	= $(obj)lib$(CPU).o
> >>
> >> +MINIMAL=
> >> +
> >> +ifdef CONFIG_SPL_BUILD
> >> +ifdef CONFIG_SPL_INIT_MINIMAL
> >> +MINIMAL=y
> >> +endif
> >> +endif
> >> +
> >> +ifdef MINIMAL
> >> +
> >> +START = start.o resetvec.o
> >> +
> >> +COBJS-y	+= cpu_init_early.o tlb.o
> >> +COBJS-$(CONFIG_SPL_NAND_MINIMAL) += cpu_init_nand.o
> >> +
> >> +else
> >
> >So, maybe it's just personal preference by why not:
> >START = start.o resetvec.o
> >ifdef CONFIG_SPL_BUILD
> >COBJS-$(CONFIG_SPL_INIT_MINIMAL) += cpu_init_early.o tlb.o
> >COBJS-$(CONFIG_SPL_NAND_MINIMAL) += cpu_init_nand.o
> >else
> >....
> 
> The START line could be factored out, but I don't think the rest
> works -- where would non-minimal SPL pull in its files?

COBJS-$(CONFIG_WHATEVER_IT_USES) ?  MINIMAL means CONFIG_SPL_BUILD (true
of all SPLs) and CONFIG_SPL_INIT_MINIMAL.  So setting
CONFIG_SPL_NAND_MINIMAL and not being compatible with it could be a
problem.  But is that a likely problem to run into?  And probably a
problem that would best be solved by making cpu_init_nand.o more
re-usable?  Or did you mean something else?
diff mbox

Patch

diff --git a/README b/README
index 13af86b..5c6a467 100644
--- a/README
+++ b/README
@@ -2667,6 +2667,9 @@  FIT uImage format:
 		CONFIG_SPL_LIBGENERIC_SUPPORT
 		Support for lib/libgeneric.o in SPL binary
 
+		CONFIG_SPL_INIT_MINIMAL
+		Arch init code should be built for a very small image
+
 Modem Support:
 --------------
 
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index 33e93c8..c51a774 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -28,7 +28,25 @@  include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(CPU).o
 
+MINIMAL=
+
+ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_SPL_INIT_MINIMAL
+MINIMAL=y
+endif
+endif
+
+ifdef MINIMAL
+
+START = start.o resetvec.o
+
+COBJS-y	+= cpu_init_early.o tlb.o
+COBJS-$(CONFIG_SPL_NAND_MINIMAL) += cpu_init_nand.o
+
+else
+
 START	= start.o resetvec.o
+
 SOBJS-$(CONFIG_MP)	+= release.o
 SOBJS	= $(SOBJS-y)
 
@@ -111,17 +129,20 @@  COBJS-$(CONFIG_PPC_P3041) += p3041_serdes.o
 COBJS-$(CONFIG_PPC_P4080) += p4080_serdes.o
 COBJS-$(CONFIG_PPC_P5020) += p5020_serdes.o
 
-COBJS	= $(COBJS-y)
-COBJS	+= cpu.o
-COBJS	+= cpu_init.o
-COBJS	+= cpu_init_early.o
-COBJS	+= interrupts.o
-COBJS	+= speed.o
-COBJS	+= tlb.o
-COBJS	+= traps.o
+COBJS-y	+= cpu.o
+COBJS-y	+= cpu_init.o
+COBJS-y	+= cpu_init_early.o
+COBJS-y	+= interrupts.o
+COBJS-y	+= speed.o
+COBJS-y	+= tlb.o
+COBJS-y	+= traps.o
 
 # Stub implementations of cache management functions for USB
-COBJS += cache.o
+COBJS-y += cache.o
+
+endif # not minimal
+
+COBJS	= $(COBJS-y)
 
 SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 958ed6f..cbccec3 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -44,6 +44,15 @@ 
 #undef	MSR_KERNEL
 #define MSR_KERNEL ( MSR_ME )	/* Machine Check */
 
+#if defined(CONFIG_NAND_SPL) || \
+	(defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL))
+#define MINIMAL_SPL
+#endif
+
+#if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SECURE_BOOT)
+#define NOR_BOOT
+#endif
+
 /*
  * Set up GOT: Global Offset Table
  *
@@ -53,7 +62,7 @@ 
 	GOT_ENTRY(_GOT2_TABLE_)
 	GOT_ENTRY(_FIXUP_TABLE_)
 
-#ifndef CONFIG_NAND_SPL
+#ifndef MINIMAL_SPL
 	GOT_ENTRY(_start)
 	GOT_ENTRY(_start_of_vectors)
 	GOT_ENTRY(_end_of_vectors)
@@ -211,7 +220,7 @@  l2_disabled:
 	andi.	r1,r3,L1CSR0_DCE@l
 	beq	2b
 
-#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && !defined(CONFIG_NAND_SPL)
+#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && !defined(MINIMAL_SPL)
 /*
  * TLB entry for debuggging in AS1
  * Create temporary TLB entry in AS0 to handle debug exception
@@ -225,7 +234,7 @@  l2_disabled:
 	ori     r6,r6,FSL_BOOKE_MAS0(1,
 			CONFIG_SYS_PPC_E500_DEBUG_TLB, 0)@l
 
-#if !defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SECURE_BOOT)
+#ifdef NOR_BOOT
 /*
  * TLB entry is created for IVPR + IVOR15 to map on valid OP code address
  * bacause flash's virtual address maps to 0xff800000 - 0xffffffff.
@@ -278,11 +287,8 @@  l2_disabled:
 	isync
 #endif
 
-/*
- * Ne need to setup interrupt vector for NAND SPL
- * because NAND SPL never compiles it.
- */
-#if !defined(CONFIG_NAND_SPL)
+/* Interrupt vectors do not fit in minimal SPL. */
+#if !defined(MINIMAL_SPL)
 	/* Setup interrupt vectors */
 	lis	r1,CONFIG_SYS_MONITOR_BASE@h
 	mtspr	IVPR,r1
@@ -506,7 +512,7 @@  nexti:	mflr	r1		/* R1 = our PC */
 	li	r3, 0
 	mtspr	MAS1, r3
 1:	cmpw	r3, r14
-#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && !defined(CONFIG_NAND_SPL)
+#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && !defined(MINIMAL_SPL)
 	cmpwi	cr1, r3, CONFIG_SYS_PPC_E500_DEBUG_TLB
 	cror	cr0*4+eq, cr0*4+eq, cr1*4+eq
 #endif
@@ -1018,7 +1024,7 @@  create_init_ram_area:
 	lis     r6,FSL_BOOKE_MAS0(1, 15, 0)@h
 	ori     r6,r6,FSL_BOOKE_MAS0(1, 15, 0)@l
 
-#if !defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SECURE_BOOT)
+#ifdef NOR_BOOT
 	/* create a temp mapping in AS=1 to the 4M boot window */
 	lis     r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_4M)@h
 	ori     r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_4M)@l
@@ -1130,7 +1136,8 @@  switch_as:
 	bdnz	1b
 
 	/* Jump out the last 4K page and continue to 'normal' start */
-#ifdef CONFIG_SYS_RAMBOOT
+#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)
+	/* We assume that we're already running at the address we're linked at */
 	b	_start_cont
 #else
 	/* Calculate absolute address in FLASH and jump there		*/
@@ -1176,7 +1183,7 @@  _start_cont:
 
 	/* NOTREACHED - board_init_f() does not return */
 
-#ifndef CONFIG_NAND_SPL
+#ifndef MINIMAL_SPL
 	. = EXC_OFF_SYS_RESET
 	.globl	_start_of_vectors
 _start_of_vectors:
@@ -1620,7 +1627,7 @@  in32:
 in32r:
 	lwbrx	r3,r0,r3
 	blr
-#endif  /* !CONFIG_NAND_SPL */
+#endif  /* !MINIMAL_SPL */
 
 /*------------------------------------------------------------------------------*/
 
@@ -1817,7 +1824,7 @@  clear_bss:
 	mr	r4,r10		/* Destination Address		*/
 	bl	board_init_r
 
-#ifndef CONFIG_NAND_SPL
+#ifndef MINIMAL_SPL
 	/*
 	 * Copy exception vector code to low memory
 	 *
@@ -1990,4 +1997,4 @@  setup_ivors:
 
 #include "fixed_ivor.S"
 	blr
-#endif /* !CONFIG_NAND_SPL */
+#endif /* !MINIMAL_SPL */
diff --git a/arch/powerpc/cpu/mpc8xxx/Makefile b/arch/powerpc/cpu/mpc8xxx/Makefile
index 86344a7..3dc8e05 100644
--- a/arch/powerpc/cpu/mpc8xxx/Makefile
+++ b/arch/powerpc/cpu/mpc8xxx/Makefile
@@ -10,6 +10,20 @@  include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib8xxx.o
 
+MINIMAL=
+
+ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_SPL_INIT_MINIMAL
+MINIMAL=y
+endif
+endif
+
+ifdef MINIMAL
+
+COBJS-$(CONFIG_FSL_LAW) += law.o
+
+else
+
 ifneq ($(CPU),mpc83xx)
 COBJS-y	+= cpu.o
 endif
@@ -20,6 +34,8 @@  COBJS-$(CONFIG_FSL_LBC) += fsl_lbc.o
 COBJS-$(CONFIG_SYS_SRIO) += srio.o
 COBJS-$(CONFIG_FSL_LAW) += law.o
 
+endif
+
 SRCS	:= $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
 
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 6e92005..419ce14 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -38,8 +38,21 @@  endif
 
 LIB	= $(obj)lib$(ARCH).o
 
-SOBJS-y	+= ppccache.o
+MINIMAL=
+
+ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_SPL_INIT_MINIMAL
+MINIMAL=y
+endif
+endif
+
+ifdef MINIMAL
+COBJS-y += cache.o
+else
+
 SOBJS-y	+= ppcstring.o
+
+SOBJS-y	+= ppccache.o
 SOBJS-y	+= ticks.o
 SOBJS-y	+= reloc.o
 
@@ -64,6 +77,8 @@  $(obj)ppcstring.o: AFLAGS += -Dmemcpy=__memcpy
 COBJS-y += memcpy_mpc5200.o
 endif
 
+endif # not minimal
+
 COBJS	+= $(sort $(COBJS-y))
 
 SRCS	:= $(GLSOBJS:.o=.S) $(GLCOBJS:.o=.c) \