[v2] rs6000: Add 2 built-ins to read the Time Base Register on PowerPC

Message ID	1347639215-8388-1-git-send-email-tuliom@linux.vnet.ibm.com
State	New
Headers	show Return-Path: <gcc-patches-return-326687-incoming=patchwork.ozlabs.org@gcc.gnu.org> Comment: DKIM? See http://www.dkim.org Comment: DomainKeys? See http://antispam.yahoo.com/domainkeys DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=gcc.gnu.org; h=Received:Received:X-SWARE-Spam-Status:X-Spam-Check-By:Received:Received:Received:Received:Received:Received:Received:Received:From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:X-Content-Scanned:x-cbid:X-IsSubscribed:Mailing-List:Precedence:List-Id:List-Unsubscribe:List-Archive:List-Post:List-Help:Sender:Delivered-To; b=k0loFYL1nyMEMVRKqrW52QrrljPq/Sf+dWT8JArnz15sMcTXDNXUsnEMDmHEHX oE9Cc0L28ZGxj/uIKXCO8ZMj9Nd6JwjSPFeWiOUzxDf+WLeCmvSChJYa5m9/Qz9e YX5qMWmzqofb8OiVDSMZvpBi3vjUJrhVs3OQCnhUm0yGE=; Gateway: Authorized Use Only! Violators will be prosecuted for <gcc-patches@gcc.gnu.org> from <tuliom@linux.vnet.ibm.com>; Fri, 14 Sep 2012 13:13:41 -0300 Gateway: Authorized Use Only! Violators will be prosecuted; Fri, 14 Sep 2012 13:13:38 -0300 From: "Tulio Magno Quites Machado Filho" <tuliom@linux.vnet.ibm.com> To: gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org, dje.gcc@gmail.com, meissner@gcc.gnu.org Subject: [PATCH v2] rs6000: Add 2 built-ins to read the Time Base Register on PowerPC Date: Fri, 14 Sep 2012 13:13:35 -0300 Message-Id: <1347639215-8388-1-git-send-email-tuliom@linux.vnet.ibm.com> In-Reply-To: <CFC49BC1-847E-42AE-8E6B-33997FBD7A6C@kernel.crashing.org> References: <CFC49BC1-847E-42AE-8E6B-33997FBD7A6C@kernel.crashing.org> Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk Sender: gcc-patches-owner@gcc.gnu.org

diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def index c8f8f86..9fa3a0f 100644 --- a/gcc/config/rs6000/rs6000-builtin.def +++ b/gcc/config/rs6000/rs6000-builtin.def @@ -1429,6 +1429,12 @@ BU_SPECIAL_X (RS6000_BUILTIN_RSQRT, "__builtin_rsqrt", RS6000_BTM_FRSQRTE, BU_SPECIAL_X (RS6000_BUILTIN_RSQRTF, "__builtin_rsqrtf", RS6000_BTM_FRSQRTES, RS6000_BTC_FP) +BU_SPECIAL_X (RS6000_BUILTIN_GET_TB, "__builtin_ppc_get_timebase", + RS6000_BTM_ALWAYS, RS6000_BTC_MISC) + +BU_SPECIAL_X (RS6000_BUILTIN_MFTB, "__builtin_ppc_mftb", + RS6000_BTM_ALWAYS, RS6000_BTC_MISC) + /* Darwin CfString builtin. */ BU_SPECIAL_X (RS6000_BUILTIN_CFSTRING, "__builtin_cfstring", RS6000_BTM_ALWAYS, RS6000_BTC_MISC) diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index a5a3848..c3bece1 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -9748,6 +9748,30 @@ rs6000_overloaded_builtin_p (enum rs6000_builtins fncode) return (rs6000_builtin_info[(int)fncode].attr & RS6000_BTC_OVERLOADED) != 0; } +/* Expand an expression EXP that calls a builtin without arguments. */ +static rtx +rs6000_expand_zeroop_builtin (enum insn_code icode, rtx target) +{ + rtx pat; + enum machine_mode tmode = insn_data[icode].operand[0].mode; + + if (icode == CODE_FOR_nothing) + /* Builtin not supported on this processor. */ + return 0; + + if (target == 0 + || GET_MODE (target) != tmode + || ! (*insn_data[icode].operand[0].predicate) (target, tmode)) + target = gen_reg_rtx (tmode); + + pat = GEN_FCN (icode) (target); + if (! pat) + return 0; + emit_insn (pat); + + return target; +} + static rtx rs6000_expand_unop_builtin (enum insn_code icode, tree exp, rtx target) @@ -11337,6 +11361,16 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, ? CODE_FOR_bpermd_di : CODE_FOR_bpermd_si), exp, target); + case RS6000_BUILTIN_GET_TB: + return rs6000_expand_zeroop_builtin (CODE_FOR_rs6000_get_timebase, + target); + + case RS6000_BUILTIN_MFTB: + return rs6000_expand_zeroop_builtin (((TARGET_64BIT) + ? CODE_FOR_rs6000_mftb_di + : CODE_FOR_rs6000_mftb_si), + target); + case ALTIVEC_BUILTIN_MASK_FOR_LOAD: case ALTIVEC_BUILTIN_MASK_FOR_STORE: { @@ -11621,6 +11655,18 @@ rs6000_init_builtins (void) POWER7_BUILTIN_BPERMD, "__builtin_bpermd"); def_builtin ("__builtin_bpermd", ftype, POWER7_BUILTIN_BPERMD); + ftype = build_function_type_list (unsigned_intDI_type_node, + NULL_TREE); + def_builtin ("__builtin_ppc_get_timebase", ftype, RS6000_BUILTIN_GET_TB); + + if (TARGET_64BIT) + ftype = build_function_type_list (unsigned_intDI_type_node, + NULL_TREE); + else + ftype = build_function_type_list (unsigned_intSI_type_node, + NULL_TREE); + def_builtin ("__builtin_ppc_mftb", ftype, RS6000_BUILTIN_MFTB); + #if TARGET_XCOFF /* AIX libm provides clog as __clog. */ if ((tdecl = builtin_decl_explicit (BUILT_IN_CLOG)) != NULL_TREE) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index f2bc15f..41304c4 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -136,6 +136,8 @@ UNSPECV_PROBE_STACK_RANGE ; probe range of stack addresses UNSPECV_EH_RR ; eh_reg_restore UNSPECV_ISYNC ; isync instruction + UNSPECV_GETTB ; get time base built-in + UNSPECV_MFTB ; move from time base built-in ]) @@ -14103,6 +14105,84 @@ "" "") +(define_expand "rs6000_get_timebase" + [(use (match_operand:DI 0 "gpc_reg_operand" ""))] + "" + " +{ + if (TARGET_POWERPC64) + emit_insn (gen_rs6000_get_timebase_ppc64 (operands[0])); + else + emit_insn (gen_rs6000_get_timebase_ppc32 (operands[0])); + DONE; +}") + +(define_insn "rs6000_get_timebase_ppc32" + [(set (match_operand:DI 0 "gpc_reg_operand" "=r") + (unspec_volatile:DI [(const_int 0)] UNSPECV_GETTB)) + (clobber (match_scratch:SI 1 "=r")) + (clobber (match_scratch:CC 2 "=x"))] + "!TARGET_POWERPC64" +{ + if (WORDS_BIG_ENDIAN) + if (TARGET_MFCRF) + { + return "mfspr %0, 269\;" + "mfspr %L0, 268\;" + "mfspr %1, 269\;" + "cmpw %0,%1\;" + "bne- $-16"; + } + else + { + return "mftbu %0\;" + "mftb %L0\;" + "mftbu %1\;" + "cmpw %0,%1\;" + "bne- $-16"; + } + else + if (TARGET_MFCRF) + { + return "mfspr %L0, 269\;" + "mfspr %0, 268\;" + "mfspr %1, 269\;" + "cmpw %L0,%1\;" + "bne- $-16"; + } + else + { + return "mftbu %L0\;" + "mftb %0\;" + "mftbu %1\;" + "cmpw %L0,%1\;" + "bne- $-16"; + } +}) + +(define_insn "rs6000_get_timebase_ppc64" + [(set (match_operand:DI 0 "gpc_reg_operand" "=r") + (unspec_volatile:DI [(const_int 0)] UNSPECV_GETTB))] + "TARGET_POWERPC64" +{ + if (TARGET_MFCRF) + return "mfspr %0, 268"; + else + return "mftb %0"; +}) + +(define_insn "rs6000_mftb_<mode>" + [(set (match_operand:P 0 "gpc_reg_operand" "=r") + (unspec_volatile:P [(const_int 0)] UNSPECV_MFTB))] + "" + { + if (TARGET_MFCRF) + return "mfspr %0, 268"; + else + return "mftb %0"; + }) + + (include "sync.md") diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index e850266..b3fc236 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -13660,6 +13660,8 @@ float __builtin_rsqrtf (float); double __builtin_recipdiv (double, double); double __builtin_rsqrt (double); long __builtin_bpermd (long, long); +uint64_t __builtin_ppc_get_timebase (); +unsigned long __builtin_ppc_mftb (); @end smallexample The @code{vec_rsqrt}, @code{__builtin_rsqrt}, and @@ -13671,6 +13673,14 @@ The @code{__builtin_recipdiv}, and @code{__builtin_recipdivf} functions generate multiple instructions to implement division using the reciprocal estimate instructions. +The @code{__builtin_ppc_get_timebase} and @code{__builtin_ppc_mftb} +functions generate instructions to read the Time Base Register. The +@code{__builtin_ppc_get_timebase} function may generate multiple +instructions and always return the 64 bits of the Time Base Register. The +@code{__builtin_ppc_mftb} function always generate one instruction and +returns the Time Base Register value as an unsigned long, throwing away +the most significant word on 32-bit environments. + @node RX Built-in Functions @subsection RX Built-in Functions GCC supports some of the RX instructions which cannot be expressed in diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-get-timebase.c b/gcc/testsuite/gcc.target/powerpc/ppc-get-timebase.c new file mode 100644 index 0000000..71de679 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/ppc-get-timebase.c @@ -0,0 +1,20 @@ +/* { dg-do run { target { powerpc*-*-* } } } */ + +/* Test if __builtin_ppc_get_timebase() is compatible with the current + processor and if it's changing between reads. A read failure might indicate + a Power ISA or binutils change. */ + +#include <inttypes.h> + +int +main(void) +{ + uint64_t t = __builtin_ppc_get_timebase (); + int j; + + for (j = 0; j < 1000000; j++) + if (t != __builtin_ppc_get_timebase ()) + return 0; + + return 1; +} diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-mftb.c b/gcc/testsuite/gcc.target/powerpc/ppc-mftb.c new file mode 100644 index 0000000..8eadaaa --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/ppc-mftb.c @@ -0,0 +1,18 @@ +/* { dg-do run { target { powerpc*-*-* } } } */ + +/* Test if __builtin_ppc_mftb() is compatible with the current processor and + if it's changing between reads. A read failure might indicate a Power + ISA or binutils change. */ + +int +main(void) +{ + unsigned long t = __builtin_ppc_mftb (); + int j; + + for (j = 0; j < 1000000; j++) + if (t != __builtin_ppc_mftb ()) + return 0; + + return 1; +}

[v2] rs6000: Add 2 built-ins to read the Time Base Register on PowerPC

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