===================================================================
@@ -0,0 +1,16 @@
+
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+
+#define N 16
+
+#include "vect-mull.x"
+
+DEF_MULL2 (DEF_MULLB)
+DEF_MULL2 (DEF_MULLH)
+DEF_MULL2 (DEF_MULLS)
+
+/* { dg-final { scan-assembler-times "smull v" 3 } } */
+/* { dg-final { scan-assembler-times "smull2 v" 3 } } */
+/* { dg-final { scan-assembler-times "umull v" 3 } } */
+/* { dg-final { scan-assembler-times "umull2 v" 3 } } */
===================================================================
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+long long r;
+
+void test_signed (int a, int b)
+{
+ /* { dg-final { scan-assembler "smnegl\tx\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */
+ r = (-((long long) a)) * ((long long) b);
+}
+
+void test_unsigned (unsigned int a, unsigned int b)
+{
+ /* { dg-final { scan-assembler "umnegl\tx\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */
+ r = (-((long long) a)) * ((long long) b);
+}
===================================================================
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#define GPF double
+#define SUFFIX(x) x
+#define GPI unsigned long
+
+#include "fcvt.x"
+
+/* { dg-final { scan-assembler-times "fcvtzu\tx\[0-9\]+, *d\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *d\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtpu\tx\[0-9\]+, *d\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *d\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtmu\tx\[0-9\]+, *d\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtau\tx\[0-9\]+, *d\[0-9\]" 2 } } */
===================================================================
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+long long r;
+
+void test_signed (int a, int b)
+{
+ /* { dg-final { scan-assembler "smnegl\tx\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */
+ r = ((long long) a) * (-((long long) b));
+}
+
+void test_unsigned (unsigned int a, unsigned int b)
+{
+ /* { dg-final { scan-assembler "umnegl\tx\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */
+ r = ((long long) a) * (-((long long) b));
+}
===================================================================
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#define GPF float
+#define SUFFIX(x) x##f
+#define GPI int
+
+#include "fcvt.x"
+
+/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\]+, *s\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *s\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtps\tw\[0-9\]+, *s\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *s\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtms\tw\[0-9\]+, *s\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtas\tw\[0-9\]+, *s\[0-9\]" 2 } } */
===================================================================
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#define GPF float
+#define SUFFIX(x) x##f
+#define GPI long
+
+#include "fcvt.x"
+
+/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, *s\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *s\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *s\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "fcvtas\tx\[0-9\]+, *s\[0-9\]" 2 } } */
===================================================================
@@ -0,0 +1,32 @@
+
+typedef float *__restrict__ pRF32;
+typedef double *__restrict__ pRF64;
+
+
+void max_F32 (pRF32 a, pRF32 b, pRF32 c)
+{
+ int i;
+ for (i=0;i<16;i++)
+ c[i] = (a[i] > b[i] ? a[i] : b[i]);
+}
+
+void min_F32 (pRF32 a, pRF32 b, pRF32 c)
+{
+ int i;
+ for (i=0;i<16;i++)
+ c[i] = (a[i] < b[i] ? a[i] : b[i]);
+}
+
+void max_F64 (pRF64 a, pRF64 b, pRF64 c)
+{
+ int i;
+ for (i=0;i<16;i++)
+ c[i] = (a[i] > b[i] ? a[i] : b[i]);
+}
+
+void min_F64 (pRF64 a, pRF64 b, pRF64 c)
+{
+ int i;
+ for (i=0;i<16;i++)
+ c[i] = (a[i] < b[i] ? a[i] : b[i]);
+}
===================================================================
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -ffast-math" } */
+
+#include "vect-fmax-fmin.x"
+
+/* { dg-final { scan-assembler "fmaxnm\\tv" } } */
+/* { dg-final { scan-assembler "fminnm\\tv" } } */
===================================================================
@@ -0,0 +1,111 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-not "\[us\]xtw\t" } } */
+/* { dg-final { scan-assembler-not "\[us\]bfiz\t" } } */
+/* { dg-final { scan-assembler-not "lsl\t" } } */
+
+int
+load_scaled_sxtw (int *arr, int i)
+{
+ return arr[arr[i]];
+}
+
+unsigned int
+load_scaled_uxtw (unsigned int *arr, unsigned int i)
+{
+ return arr[arr[i]];
+}
+
+void
+store_scaled_sxtw (int *arr, int i)
+{
+ arr[arr[i]] = 0;
+}
+
+void
+store_scaled_uxtw (unsigned int *arr, unsigned int i)
+{
+ arr[arr[i]] = 0;
+}
+
+int
+load_unscaled_sxtw (signed char *arr, int i)
+{
+ return arr[arr[i]];
+}
+
+unsigned int
+load_unscaled_uxtw (unsigned char *arr, unsigned int i)
+{
+ return arr[arr[i]];
+}
+
+void
+store_unscaled_sxtw (signed char *arr, int i)
+{
+ arr[arr[i]] = 0;
+}
+
+void
+store_unscaled_uxtw (unsigned char *arr, unsigned int i)
+{
+ arr[arr[i]] = 0;
+}
+
+
+
+int
+load_scaled_tmp_sxtw (int *arr, int i)
+{
+ int j = arr[i];
+ return arr[j];
+}
+
+unsigned int
+load_scaled_tmp_uxtw (unsigned int *arr, unsigned int i)
+{
+ unsigned int j = arr[i];
+ return arr[j];
+}
+
+void
+store_scaled_tmp_sxtw (int *arr, int i)
+{
+ int j = arr[i];
+ arr[j] = 0;
+}
+
+void
+store_scaled_tmp_uxtw (unsigned int *arr, unsigned int i)
+{
+ unsigned int j = arr[i];
+ arr[j] = 0;
+}
+
+int
+load_unscaled_tmp_sxtw (signed char *arr, int i)
+{
+ signed char j = arr[i];
+ return arr[j];
+}
+
+unsigned int
+load_unscaled_tmp_uxtw (unsigned char *arr, unsigned int i)
+{
+ unsigned char j = arr[i];
+ return arr[j];
+}
+
+void
+store_unscaled_tmp_sxtw (signed char *arr, int i)
+{
+ signed char j = arr[i];
+ arr[j] = 0;
+}
+
+void
+store_unscaled_tmp_uxtw (unsigned char *arr, unsigned int i)
+{
+ unsigned char j = arr[i];
+ arr[j] = 0;
+}
===================================================================
@@ -0,0 +1,66 @@
+extern GPF SUFFIX(trunc) (GPF);
+extern GPF SUFFIX(ceil) (GPF);
+extern GPF SUFFIX(floor) (GPF);
+extern GPF SUFFIX(nearbyint) (GPF);
+extern GPF SUFFIX(rint) (GPF);
+extern GPF SUFFIX(round) (GPF);
+
+GPF test1a (GPF x)
+{
+ return SUFFIX(__builtin_trunc)(x);
+}
+
+GPF test1b (GPF x)
+{
+ return SUFFIX(trunc)(x);
+}
+
+GPF test2a (GPF x)
+{
+ return SUFFIX(__builtin_ceil)(x);
+}
+
+GPF test2b (GPF x)
+{
+ return SUFFIX(ceil)(x);
+}
+
+GPF test3a (GPF x)
+{
+ return SUFFIX(__builtin_floor)(x);
+}
+
+GPF test3b (GPF x)
+{
+ return SUFFIX(floor)(x);
+}
+
+GPF test4a (GPF x)
+{
+ return SUFFIX(__builtin_nearbyint)(x);
+}
+
+GPF test4b (GPF x)
+{
+ return SUFFIX(nearbyint)(x);
+}
+
+GPF test5a (GPF x)
+{
+ return SUFFIX(__builtin_rint)(x);
+}
+
+GPF test5b (GPF x)
+{
+ return SUFFIX(rint)(x);
+}
+
+GPF test6a (GPF x)
+{
+ return SUFFIX(__builtin_round)(x);
+}
+
+GPF test6b (GPF x)
+{
+ return SUFFIX(round)(x);
+}
===================================================================
@@ -0,0 +1,49 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+volatile unsigned int w0, w1;
+volatile int result;
+
+void test_si() {
+ /* { dg-final { scan-assembler "tst\tw\[0-9\]*, w\[0-9\]*\n" } } */
+ result = !(w0 & w1);
+ /* { dg-final { scan-assembler "tst\tw\[0-9\]*, \(0x\[0-9a-fA-F\]+\)|\(\[0-9\]+\)" } } */
+ result = !(w0 & 0x00f0);
+ /* { dg-final { scan-assembler "tst\tw\[0-9\]*.*lsl 4" } } */
+ result = !(w0 & (w1 << 4));
+}
+
+void test_si_tbnz() {
+ /* { dg-final { scan-assembler "tbnz\t\[wx\]\[0-9\]*" } } */
+jumpto:
+ if (w0 & 0x08) goto jumpto;
+}
+
+void test_si_tbz() {
+ /* { dg-final { scan-assembler "tbz\t\[wx\]\[0-9\]*" } } */
+jumpto:
+ if (!(w1 & 0x08)) goto jumpto;
+}
+
+volatile unsigned long long x0, x1;
+
+void test_di() {
+ /* { dg-final { scan-assembler "tst\tx\[0-9\]*, x\[0-9\]*\n" } } */
+ result = !(x0 & x1);
+ /* { dg-final { scan-assembler "tst\tx\[0-9\]*, \(0x\[0-9a-fA-F\]+\)|\(\[0-9\]+\)" } } */
+ result = !(x0 & 0x00f0);
+ /* { dg-final { scan-assembler "tst\tx\[0-9\]*.*lsl 4" } } */
+ result = !(x0 & (x1 << 4));
+}
+
+void test_di_tbnz() {
+ /* { dg-final { scan-assembler "tbnz\tx\[0-9\]*" } } */
+jumpto:
+ if (x0 & 0x08) goto jumpto;
+}
+
+void test_di_tbz() {
+ /* { dg-final { scan-assembler "tbz\tx\[0-9\]*" } } */
+jumpto:
+ if (!(x1 & 0x08)) goto jumpto;
+}
===================================================================
@@ -0,0 +1,1181 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#include "../../../config/aarch64/arm_neon.h"
+
+/* { dg-final { scan-assembler-times "\\tadd\\tx\[0-9\]+" 2 } } */
+
+uint64x1_t
+test_vaddd_u64 (uint64x1_t a, uint64x1_t b)
+{
+ return vaddd_u64 (a, b);
+}
+
+int64x1_t
+test_vaddd_s64 (int64x1_t a, int64x1_t b)
+{
+ return vaddd_s64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tadd\\td\[0-9\]+" 1 } } */
+
+int64x1_t
+test_vaddd_s64_2 (int64x1_t a, int64x1_t b, int64x1_t c, int64x1_t d)
+{
+ return vqaddd_s64 (vaddd_s64 (vqaddd_s64 (a, b), vqaddd_s64 (c, d)),
+ vqaddd_s64 (a, d));
+}
+
+/* { dg-final { scan-assembler-times "\\tcmeq\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */
+
+uint64x1_t
+test_vceqd_s64 (int64x1_t a, int64x1_t b)
+{
+ return vceqd_s64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tcmeq\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */
+
+uint64x1_t
+test_vceqzd_s64 (int64x1_t a)
+{
+ return vceqzd_s64 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tcmge\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */
+
+uint64x1_t
+test_vcged_s64 (int64x1_t a, int64x1_t b)
+{
+ return vcged_s64 (a, b);
+}
+
+uint64x1_t
+test_vcled_s64 (int64x1_t a, int64x1_t b)
+{
+ return vcled_s64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tcmge\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */
+
+uint64x1_t
+test_vcgezd_s64 (int64x1_t a)
+{
+ return vcgezd_s64 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tcmhs\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */
+
+uint64x1_t
+test_vcged_u64 (uint64x1_t a, uint64x1_t b)
+{
+ return vcged_u64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */
+
+uint64x1_t
+test_vcgtd_s64 (int64x1_t a, int64x1_t b)
+{
+ return vcgtd_s64 (a, b);
+}
+
+uint64x1_t
+test_vcltd_s64 (int64x1_t a, int64x1_t b)
+{
+ return vcltd_s64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */
+
+uint64x1_t
+test_vcgtzd_s64 (int64x1_t a)
+{
+ return vcgtzd_s64 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tcmhi\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */
+
+uint64x1_t
+test_vcgtd_u64 (uint64x1_t a, uint64x1_t b)
+{
+ return vcgtd_u64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tcmle\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */
+
+uint64x1_t
+test_vclezd_s64 (int64x1_t a)
+{
+ return vclezd_s64 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tcmlt\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */
+
+uint64x1_t
+test_vcltzd_s64 (int64x1_t a)
+{
+ return vcltzd_s64 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tdup\\tb\[0-9\]+, v\[0-9\]+\.b" 2 } } */
+
+int8x1_t
+test_vdupb_lane_s8 (int8x16_t a)
+{
+ return vdupb_lane_s8 (a, 2);
+}
+
+uint8x1_t
+test_vdupb_lane_u8 (uint8x16_t a)
+{
+ return vdupb_lane_u8 (a, 2);
+}
+
+/* { dg-final { scan-assembler-times "\\tdup\\th\[0-9\]+, v\[0-9\]+\.h" 2 } } */
+
+int16x1_t
+test_vduph_lane_s16 (int16x8_t a)
+{
+ return vduph_lane_s16 (a, 2);
+}
+
+uint16x1_t
+test_vduph_lane_u16 (uint16x8_t a)
+{
+ return vduph_lane_u16 (a, 2);
+}
+
+/* { dg-final { scan-assembler-times "\\tdup\\ts\[0-9\]+, v\[0-9\]+\.s" 2 } } */
+
+int32x1_t
+test_vdups_lane_s32 (int32x4_t a)
+{
+ return vdups_lane_s32 (a, 2);
+}
+
+uint32x1_t
+test_vdups_lane_u32 (uint32x4_t a)
+{
+ return vdups_lane_u32 (a, 2);
+}
+
+/* { dg-final { scan-assembler-times "\\tdup\\td\[0-9\]+, v\[0-9\]+\.d" 2 } } */
+
+int64x1_t
+test_vdupd_lane_s64 (int64x2_t a)
+{
+ return vdupd_lane_s64 (a, 2);
+}
+
+uint64x1_t
+test_vdupd_lane_u64 (uint64x2_t a)
+{
+ return vdupd_lane_u64 (a, 2);
+}
+
+/* { dg-final { scan-assembler-times "\\tcmtst\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */
+
+int64x1_t
+test_vtst_s64 (int64x1_t a, int64x1_t b)
+{
+ return vtstd_s64 (a, b);
+}
+
+uint64x1_t
+test_vtst_u64 (uint64x1_t a, uint64x1_t b)
+{
+ return vtstd_u64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\taddp\\td\[0-9\]+, v\[0-9\]+\.2d" 1 } } */
+
+test_vpaddd_s64 (int64x2_t a)
+{
+ return vpaddd_s64 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqadd\\td\[0-9\]+" 1 } } */
+
+uint64x1_t
+test_vqaddd_u64 (uint64x1_t a, uint64x1_t b)
+{
+ return vqaddd_u64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqadd\\ts\[0-9\]+" 1 } } */
+
+uint32x1_t
+test_vqadds_u32 (uint32x1_t a, uint32x1_t b)
+{
+ return vqadds_u32 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqadd\\th\[0-9\]+" 1 } } */
+
+uint16x1_t
+test_vqaddh_u16 (uint16x1_t a, uint16x1_t b)
+{
+ return vqaddh_u16 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqadd\\tb\[0-9\]+" 1 } } */
+
+uint8x1_t
+test_vqaddb_u8 (uint8x1_t a, uint8x1_t b)
+{
+ return vqaddb_u8 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqadd\\td\[0-9\]+" 5 } } */
+
+int64x1_t
+test_vqaddd_s64 (int64x1_t a, int64x1_t b)
+{
+ return vqaddd_s64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqadd\\ts\[0-9\]+, s\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vqadds_s32 (int32x1_t a, int32x1_t b)
+{
+ return vqadds_s32 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqadd\\th\[0-9\]+, h\[0-9\]+" 1 } } */
+
+int16x1_t
+test_vqaddh_s16 (int16x1_t a, int16x1_t b)
+{
+ return vqaddh_s16 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqadd\\tb\[0-9\]+, b\[0-9\]+" 1 } } */
+
+int8x1_t
+test_vqaddb_s8 (int8x1_t a, int8x1_t b)
+{
+ return vqaddb_s8 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlal\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vqdmlalh_s16 (int32x1_t a, int16x1_t b, int16x1_t c)
+{
+ return vqdmlalh_s16 (a, b, c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlal\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */
+
+int32x1_t
+test_vqdmlalh_lane_s16 (int32x1_t a, int16x1_t b, int16x8_t c)
+{
+ return vqdmlalh_lane_s16 (a, b, c, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlal\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
+
+int64x1_t
+test_vqdmlals_s32 (int64x1_t a, int32x1_t b, int32x1_t c)
+{
+ return vqdmlals_s32 (a, b, c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlal\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */
+
+int64x1_t
+test_vqdmlals_lane_s32 (int64x1_t a, int32x1_t b, int32x4_t c)
+{
+ return vqdmlals_lane_s32 (a, b, c, 1);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlsl\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vqdmlslh_s16 (int32x1_t a, int16x1_t b, int16x1_t c)
+{
+ return vqdmlslh_s16 (a, b, c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlsl\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */
+
+int32x1_t
+test_vqdmlslh_lane_s16 (int32x1_t a, int16x1_t b, int16x8_t c)
+{
+ return vqdmlslh_lane_s16 (a, b, c, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlsl\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
+
+int64x1_t
+test_vqdmlsls_s32 (int64x1_t a, int32x1_t b, int32x1_t c)
+{
+ return vqdmlsls_s32 (a, b, c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlsl\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */
+
+int64x1_t
+test_vqdmlsls_lane_s32 (int64x1_t a, int32x1_t b, int32x4_t c)
+{
+ return vqdmlsls_lane_s32 (a, b, c, 1);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmulh\\th\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
+
+int16x1_t
+test_vqdmulhh_s16 (int16x1_t a, int16x1_t b)
+{
+ return vqdmulhh_s16 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmulh\\th\[0-9\]+, h\[0-9\]+, v" 1 } } */
+
+int16x1_t
+test_vqdmulhh_lane_s16 (int16x1_t a, int16x8_t b)
+{
+ return vqdmulhh_lane_s16 (a, b, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmulh\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vqdmulhs_s32 (int32x1_t a, int32x1_t b)
+{
+ return vqdmulhs_s32 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmulh\\ts\[0-9\]+, s\[0-9\]+, v" 1 } } */
+
+int32x1_t
+test_vqdmulhs_lane_s32 (int32x1_t a, int32x4_t b)
+{
+ return vqdmulhs_lane_s32 (a, b, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmull\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vqdmullh_s16 (int16x1_t a, int16x1_t b)
+{
+ return vqdmullh_s16 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmull\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */
+
+int32x1_t
+test_vqdmullh_lane_s16 (int16x1_t a, int16x8_t b)
+{
+ return vqdmullh_lane_s16 (a, b, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmull\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
+
+int64x1_t
+test_vqdmulls_s32 (int32x1_t a, int32x1_t b)
+{
+ return vqdmulls_s32 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmull\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */
+
+int64x1_t
+test_vqdmulls_lane_s32 (int32x1_t a, int32x4_t b)
+{
+ return vqdmulls_lane_s32 (a, b, 1);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqrdmulh\\th\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
+
+int16x1_t
+test_vqrdmulhh_s16 (int16x1_t a, int16x1_t b)
+{
+ return vqrdmulhh_s16 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqrdmulh\\th\[0-9\]+, h\[0-9\]+, v" 1 } } */
+
+int16x1_t
+test_vqrdmulhh_lane_s16 (int16x1_t a, int16x8_t b)
+{
+ return vqrdmulhh_lane_s16 (a, b, 6);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqrdmulh\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vqrdmulhs_s32 (int32x1_t a, int32x1_t b)
+{
+ return vqrdmulhs_s32 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqrdmulh\\ts\[0-9\]+, s\[0-9\]+, v" 1 } } */
+
+int32x1_t
+test_vqrdmulhs_lane_s32 (int32x1_t a, int32x4_t b)
+{
+ return vqrdmulhs_lane_s32 (a, b, 2);
+}
+
+/* { dg-final { scan-assembler-times "\\tsuqadd\\tb\[0-9\]+" 1 } } */
+
+int8x1_t
+test_vuqaddb_s8 (int8x1_t a, int8x1_t b)
+{
+ return vuqaddb_s8 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsuqadd\\th\[0-9\]+" 1 } } */
+
+int16x1_t
+test_vuqaddh_s16 (int16x1_t a, int8x1_t b)
+{
+ return vuqaddh_s16 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsuqadd\\ts\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vuqadds_s32 (int32x1_t a, int8x1_t b)
+{
+ return vuqadds_s32 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsuqadd\\td\[0-9\]+" 1 } } */
+
+int64x1_t
+test_vuqaddd_s64 (int64x1_t a, int8x1_t b)
+{
+ return vuqaddd_s64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tusqadd\\tb\[0-9\]+" 1 } } */
+
+uint8x1_t
+test_vsqaddb_u8 (uint8x1_t a, int8x1_t b)
+{
+ return vsqaddb_u8 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tusqadd\\th\[0-9\]+" 1 } } */
+
+uint16x1_t
+test_vsqaddh_u16 (uint16x1_t a, int8x1_t b)
+{
+ return vsqaddh_u16 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tusqadd\\ts\[0-9\]+" 1 } } */
+
+uint32x1_t
+test_vsqadds_u32 (uint32x1_t a, int8x1_t b)
+{
+ return vsqadds_u32 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tusqadd\\td\[0-9\]+" 1 } } */
+
+uint64x1_t
+test_vsqaddd_u64 (uint64x1_t a, int8x1_t b)
+{
+ return vsqaddd_u64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqabs\\tb\[0-9\]+" 1 } } */
+
+int8x1_t
+test_vqabsb_s8 (int8x1_t a)
+{
+ return vqabsb_s8 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqabs\\th\[0-9\]+" 1 } } */
+
+int16x1_t
+test_vqabsh_s16 (int16x1_t a)
+{
+ return vqabsh_s16 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqabs\\ts\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vqabss_s32 (int32x1_t a)
+{
+ return vqabss_s32 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqneg\\tb\[0-9\]+" 1 } } */
+
+int8x1_t
+test_vqnegb_s8 (int8x1_t a)
+{
+ return vqnegb_s8 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqneg\\th\[0-9\]+" 1 } } */
+
+int16x1_t
+test_vqnegh_s16 (int16x1_t a)
+{
+ return vqnegh_s16 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqneg\\ts\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vqnegs_s32 (int32x1_t a)
+{
+ return vqnegs_s32 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqxtun\\tb\[0-9\]+" 1 } } */
+
+int8x1_t
+test_vqmovunh_s16 (int16x1_t a)
+{
+ return vqmovunh_s16 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqxtun\\th\[0-9\]+" 1 } } */
+
+int16x1_t
+test_vqmovuns_s32 (int32x1_t a)
+{
+ return vqmovuns_s32 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqxtun\\ts\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vqmovund_s64 (int64x1_t a)
+{
+ return vqmovund_s64 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqxtn\\tb\[0-9\]+" 1 } } */
+
+int8x1_t
+test_vqmovnh_s16 (int16x1_t a)
+{
+ return vqmovnh_s16 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqxtn\\th\[0-9\]+" 1 } } */
+
+int16x1_t
+test_vqmovns_s32 (int32x1_t a)
+{
+ return vqmovns_s32 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqxtn\\ts\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vqmovnd_s64 (int64x1_t a)
+{
+ return vqmovnd_s64 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqxtn\\tb\[0-9\]+" 1 } } */
+
+uint8x1_t
+test_vqmovnh_u16 (uint16x1_t a)
+{
+ return vqmovnh_u16 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqxtn\\th\[0-9\]+" 1 } } */
+
+uint16x1_t
+test_vqmovns_u32 (uint32x1_t a)
+{
+ return vqmovns_u32 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqxtn\\ts\[0-9\]+" 1 } } */
+
+uint32x1_t
+test_vqmovnd_u64 (uint64x1_t a)
+{
+ return vqmovnd_u64 (a);
+}
+
+/* { dg-final { scan-assembler-times "\\tsub\\tx\[0-9\]+" 2 } } */
+
+uint64x1_t
+test_vsubd_u64 (uint64x1_t a, uint64x1_t b)
+{
+ return vsubd_u64 (a, b);
+}
+
+int64x1_t
+test_vsubd_s64 (int64x1_t a, int64x1_t b)
+{
+ return vsubd_s64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsub\\td\[0-9\]+" 1 } } */
+
+int64x1_t
+test_vsubd_s64_2 (int64x1_t a, int64x1_t b, int64x1_t c, int64x1_t d)
+{
+ return vqsubd_s64 (vsubd_s64 (vqsubd_s64 (a, b), vqsubd_s64 (c, d)),
+ vqsubd_s64 (a, d));
+}
+
+/* { dg-final { scan-assembler-times "\\tuqsub\\td\[0-9\]+" 1 } } */
+
+uint64x1_t
+test_vqsubd_u64 (uint64x1_t a, uint64x1_t b)
+{
+ return vqsubd_u64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqsub\\ts\[0-9\]+" 1 } } */
+
+uint32x1_t
+test_vqsubs_u32 (uint32x1_t a, uint32x1_t b)
+{
+ return vqsubs_u32 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqsub\\th\[0-9\]+" 1 } } */
+
+uint16x1_t
+test_vqsubh_u16 (uint16x1_t a, uint16x1_t b)
+{
+ return vqsubh_u16 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqsub\\tb\[0-9\]+" 1 } } */
+
+uint8x1_t
+test_vqsubb_u8 (uint8x1_t a, uint8x1_t b)
+{
+ return vqsubb_u8 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqsub\\td\[0-9\]+" 5 } } */
+
+int64x1_t
+test_vqsubd_s64 (int64x1_t a, int64x1_t b)
+{
+ return vqsubd_s64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqsub\\ts\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vqsubs_s32 (int32x1_t a, int32x1_t b)
+{
+ return vqsubs_s32 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqsub\\th\[0-9\]+" 1 } } */
+
+int16x1_t
+test_vqsubh_s16 (int16x1_t a, int16x1_t b)
+{
+ return vqsubh_s16 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqsub\\tb\[0-9\]+" 1 } } */
+
+int8x1_t
+test_vqsubb_s8 (int8x1_t a, int8x1_t b)
+{
+ return vqsubb_s8 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsshl\\td\[0-9\]+" 1 } } */
+
+int64x1_t
+test_vshld_s64 (int64x1_t a, int64x1_t b)
+{
+ return vshld_s64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tushl\\td\[0-9\]+" 1 } } */
+
+uint64x1_t
+test_vshld_u64 (uint64x1_t a, uint64x1_t b)
+{
+ return vshld_u64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsrshl\\td\[0-9\]+" 1 } } */
+
+int64x1_t
+test_vrshld_s64 (int64x1_t a, int64x1_t b)
+{
+ return vrshld_s64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\turshl\\td\[0-9\]+" 1 } } */
+
+uint64x1_t
+test_vrshld_u64 (uint64x1_t a, uint64x1_t b)
+{
+ return vrshld_u64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tasr\\tx\[0-9\]+" 1 } } */
+
+int64x1_t
+test_vshrd_n_s64 (int64x1_t a)
+{
+ return vshrd_n_s64 (a, 5);
+}
+
+/* { dg-final { scan-assembler-times "\\tlsr\\tx\[0-9\]+" 1 } } */
+
+uint64x1_t
+test_vshrd_n_u64 (uint64x1_t a)
+{
+ return vshrd_n_u64 (a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tssra\\td\[0-9\]+" 1 } } */
+
+int64x1_t
+test_vsrad_n_s64 (int64x1_t a, int64x1_t b)
+{
+ return vsrad_n_s64 (a, b, 2);
+}
+
+/* { dg-final { scan-assembler-times "\\tusra\\td\[0-9\]+" 1 } } */
+
+uint64x1_t
+test_vsrad_n_u64 (uint64x1_t a, uint64x1_t b)
+{
+ return vsrad_n_u64 (a, b, 5);
+}
+
+/* { dg-final { scan-assembler-times "\\tsrshr\\td\[0-9\]+" 1 } } */
+
+int64x1_t
+test_vrshrd_n_s64 (int64x1_t a)
+{
+ return vrshrd_n_s64 (a, 5);
+}
+
+/* { dg-final { scan-assembler-times "\\turshr\\td\[0-9\]+" 1 } } */
+
+uint64x1_t
+test_vrshrd_n_u64 (uint64x1_t a)
+{
+ return vrshrd_n_u64 (a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tsrsra\\td\[0-9\]+" 1 } } */
+
+int64x1_t
+test_vrsrad_n_s64 (int64x1_t a, int64x1_t b)
+{
+ return vrsrad_n_s64 (a, b, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tsrsra\\td\[0-9\]+" 1 } } */
+
+uint64x1_t
+test_vrsrad_n_u64 (uint64x1_t a, uint64x1_t b)
+{
+ return vrsrad_n_u64 (a, b, 4);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqrshl\\tb\[0-9\]+" 1 } } */
+
+int8x1_t
+test_vqrshlb_s8 (int8x1_t a, int8x1_t b)
+{
+ return vqrshlb_s8 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqrshl\\th\[0-9\]+" 1 } } */
+
+int16x1_t
+test_vqrshlh_s16 (int16x1_t a, int16x1_t b)
+{
+ return vqrshlh_s16 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqrshl\\ts\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vqrshls_s32 (int32x1_t a, int32x1_t b)
+{
+ return vqrshls_s32 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqrshl\\td\[0-9\]+" 1 } } */
+
+int64x1_t
+test_vqrshld_s64 (int64x1_t a, int64x1_t b)
+{
+ return vqrshld_s64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqrshl\\tb\[0-9\]+" 1 } } */
+
+uint8x1_t
+test_vqrshlb_u8 (uint8x1_t a, uint8x1_t b)
+{
+ return vqrshlb_u8 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqrshl\\th\[0-9\]+" 1 } } */
+
+uint16x1_t
+test_vqrshlh_u16 (uint16x1_t a, uint16x1_t b)
+{
+ return vqrshlh_u16 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqrshl\\ts\[0-9\]+" 1 } } */
+
+uint32x1_t
+test_vqrshls_u32 (uint32x1_t a, uint32x1_t b)
+{
+ return vqrshls_u32 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqrshl\\td\[0-9\]+" 1 } } */
+
+uint64x1_t
+test_vqrshld_u64 (uint64x1_t a, uint64x1_t b)
+{
+ return vqrshld_u64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqshlu\\tb\[0-9\]+" 1 } } */
+
+int8x1_t
+test_vqshlub_n_s8 (int8x1_t a)
+{
+ return vqshlub_n_s8 (a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqshlu\\th\[0-9\]+" 1 } } */
+
+int16x1_t
+test_vqshluh_n_s16 (int16x1_t a)
+{
+ return vqshluh_n_s16 (a, 4);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqshlu\\ts\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vqshlus_n_s32 (int32x1_t a)
+{
+ return vqshlus_n_s32 (a, 5);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqshlu\\td\[0-9\]+" 1 } } */
+
+int64x1_t
+test_vqshlud_n_s64 (int64x1_t a)
+{
+ return vqshlud_n_s64 (a, 6);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqshl\\tb\[0-9\]+" 2 } } */
+
+int8x1_t
+test_vqshlb_s8 (int8x1_t a, int8x1_t b)
+{
+ return vqshlb_s8 (a, b);
+}
+
+int8x1_t
+test_vqshlb_n_s8 (int8x1_t a)
+{
+ return vqshlb_n_s8 (a, 2);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqshl\\th\[0-9\]+" 2 } } */
+
+int16x1_t
+test_vqshlh_s16 (int16x1_t a, int16x1_t b)
+{
+ return vqshlh_s16 (a, b);
+}
+
+int16x1_t
+test_vqshlh_n_s16 (int16x1_t a)
+{
+ return vqshlh_n_s16 (a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqshl\\ts\[0-9\]+" 2 } } */
+
+int32x1_t
+test_vqshls_s32 (int32x1_t a, int32x1_t b)
+{
+ return vqshls_s32 (a, b);
+}
+
+int32x1_t
+test_vqshls_n_s32 (int32x1_t a)
+{
+ return vqshls_n_s32 (a, 4);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqshl\\td\[0-9\]+" 2 } } */
+
+int64x1_t
+test_vqshld_s64 (int64x1_t a, int64x1_t b)
+{
+ return vqshld_s64 (a, b);
+}
+
+int64x1_t
+test_vqshld_n_s64 (int64x1_t a)
+{
+ return vqshld_n_s64 (a, 5);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqshl\\tb\[0-9\]+" 2 } } */
+
+uint8x1_t
+test_vqshlb_u8 (uint8x1_t a, uint8x1_t b)
+{
+ return vqshlb_u8 (a, b);
+}
+
+uint8x1_t
+test_vqshlb_n_u8 (uint8x1_t a)
+{
+ return vqshlb_n_u8 (a, 2);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqshl\\th\[0-9\]+" 2 } } */
+
+uint16x1_t
+test_vqshlh_u16 (uint16x1_t a, uint16x1_t b)
+{
+ return vqshlh_u16 (a, b);
+}
+
+uint16x1_t
+test_vqshlh_n_u16 (uint16x1_t a)
+{
+ return vqshlh_n_u16 (a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqshl\\ts\[0-9\]+" 2 } } */
+
+uint32x1_t
+test_vqshls_u32 (uint32x1_t a, uint32x1_t b)
+{
+ return vqshls_u32 (a, b);
+}
+
+uint32x1_t
+test_vqshls_n_u32 (uint32x1_t a)
+{
+ return vqshls_n_u32 (a, 4);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqshl\\td\[0-9\]+" 2 } } */
+
+uint64x1_t
+test_vqshld_u64 (uint64x1_t a, uint64x1_t b)
+{
+ return vqshld_u64 (a, b);
+}
+
+uint64x1_t
+test_vqshld_n_u64 (uint64x1_t a)
+{
+ return vqshld_n_u64 (a, 5);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqshrun\\tb\[0-9\]+" 1 } } */
+
+int8x1_t
+test_vqshrunh_n_s16 (int16x1_t a)
+{
+ return vqshrunh_n_s16 (a, 2);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqshrun\\th\[0-9\]+" 1 } } */
+
+int16x1_t
+test_vqshruns_n_s32 (int32x1_t a)
+{
+ return vqshruns_n_s32 (a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqshrun\\ts\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vqshrund_n_s64 (int64x1_t a)
+{
+ return vqshrund_n_s64 (a, 4);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqrshrun\\tb\[0-9\]+" 1 } } */
+
+int8x1_t
+test_vqrshrunh_n_s16 (int16x1_t a)
+{
+ return vqrshrunh_n_s16 (a, 2);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqrshrun\\th\[0-9\]+" 1 } } */
+
+int16x1_t
+test_vqrshruns_n_s32 (int32x1_t a)
+{
+ return vqrshruns_n_s32 (a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqrshrun\\ts\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vqrshrund_n_s64 (int64x1_t a)
+{
+ return vqrshrund_n_s64 (a, 4);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqshrn\\tb\[0-9\]+" 1 } } */
+
+int8x1_t
+test_vqshrnh_n_s16 (int16x1_t a)
+{
+ return vqshrnh_n_s16 (a, 2);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqshrn\\th\[0-9\]+" 1 } } */
+
+int16x1_t
+test_vqshrns_n_s32 (int32x1_t a)
+{
+ return vqshrns_n_s32 (a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqshrn\\ts\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vqshrnd_n_s64 (int64x1_t a)
+{
+ return vqshrnd_n_s64 (a, 4);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqshrn\\tb\[0-9\]+" 1 } } */
+
+uint8x1_t
+test_vqshrnh_n_u16 (uint16x1_t a)
+{
+ return vqshrnh_n_u16 (a, 2);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqshrn\\th\[0-9\]+" 1 } } */
+
+uint16x1_t
+test_vqshrns_n_u32 (uint32x1_t a)
+{
+ return vqshrns_n_u32 (a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqshrn\\ts\[0-9\]+" 1 } } */
+
+uint32x1_t
+test_vqshrnd_n_u64 (uint64x1_t a)
+{
+ return vqshrnd_n_u64 (a, 4);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqrshrn\\tb\[0-9\]+" 1 } } */
+
+int8x1_t
+test_vqrshrnh_n_s16 (int16x1_t a)
+{
+ return vqrshrnh_n_s16 (a, 2);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqrshrn\\th\[0-9\]+" 1 } } */
+
+int16x1_t
+test_vqrshrns_n_s32 (int32x1_t a)
+{
+ return vqrshrns_n_s32 (a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqrshrn\\ts\[0-9\]+" 1 } } */
+
+int32x1_t
+test_vqrshrnd_n_s64 (int64x1_t a)
+{
+ return vqrshrnd_n_s64 (a, 4);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqrshrn\\tb\[0-9\]+" 1 } } */
+
+uint8x1_t
+test_vqrshrnh_n_u16 (uint16x1_t a)
+{
+ return vqrshrnh_n_u16 (a, 2);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqrshrn\\th\[0-9\]+" 1 } } */
+
+uint16x1_t
+test_vqrshrns_n_u32 (uint32x1_t a)
+{
+ return vqrshrns_n_u32 (a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tuqrshrn\\ts\[0-9\]+" 1 } } */
+
+uint32x1_t
+test_vqrshrnd_n_u64 (uint64x1_t a)
+{
+ return vqrshrnd_n_u64 (a, 4);
+}
+
+/* { dg-final { scan-assembler-times "\\tlsl\\tx\[0-9\]+" 2 } } */
+
+int64x1_t
+test_vshl_n_s64 (int64x1_t a)
+{
+ return vshld_n_s64 (a, 9);
+}
+
+uint64x1_t
+test_vshl_n_u64 (uint64x1_t a)
+{
+ return vshld_n_u64 (a, 9);
+}
+
+/* { dg-final { scan-assembler-times "\\tsli\\td\[0-9\]+" 2 } } */
+
+int64x1_t
+test_vsli_n_s64 (int64x1_t a, int64x1_t b)
+{
+ return vslid_n_s64 (a, b, 9);
+}
+
+uint64x1_t
+test_vsli_n_u64 (uint64x1_t a, uint64x1_t b)
+{
+ return vslid_n_u64 (a, b, 9);
+}
+
+/* { dg-final { scan-assembler-times "\\tsri\\td\[0-9\]+" 2 } } */
+
+int64x1_t
+test_vsri_n_s64 (int64x1_t a, int64x1_t b)
+{
+ return vsrid_n_s64 (a, b, 9);
+}
+
+uint64x1_t
+test_vsri_n_u64 (uint64x1_t a, uint64x1_t b)
+{
+ return vsrid_n_u64 (a, b, 9);
+}
===================================================================
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#define GPF double
+#define SUFFIX(x) x
+#define GPI long
+
+#include "fcvt.x"
+
+/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, *d\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *d\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *d\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "fcvtas\tx\[0-9\]+, *d\[0-9\]" 2 } } */
===================================================================
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#define GPF double
+#define SUFFIX(x) x
+
+#include "frint.x"
+
+/* { dg-final { scan-assembler-times "frintz\td\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "frintp\td\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "frintm\td\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "frinti\td\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "frintx\td\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "frinta\td\[0-9\]" 2 } } */
===================================================================
@@ -0,0 +1,30 @@
+/* { dg-options "-O2 -mcmodel=small -fPIC" } */
+/* { dg-do compile } */
+
+extern int __finite (double __value) __attribute__ ((__nothrow__)) __attribute__ ((__const__));
+int
+__ecvt_r (value, ndigit, decpt, sign, buf, len)
+ double value;
+ int ndigit, *decpt, *sign;
+ char *buf;
+{
+ if ((sizeof (value) == sizeof (float) ? __finitef (value) : __finite (value)) && value != 0.0)
+ {
+ double d;
+ double f = 1.0;
+ d = -value;
+ if (d < 1.0e-307)
+ {
+ do
+ {
+ f *= 10.0;
+ }
+ while (d * f < 1.0);
+ }
+ }
+ if (ndigit <= 0 && len > 0)
+ {
+ buf[0] = '\0';
+ *sign = (sizeof (value) == sizeof (float) ? __finitef (value) : __finite (value)) ? (sizeof (value) == sizeof (float) ? __signbitf (value) : __signbit (value)) != 0 : 0;
+ }
+}
===================================================================
@@ -0,0 +1,50 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+unsigned int
+test_csinv32_condasn1(unsigned int w0,
+ unsigned int w1,
+ unsigned int w2,
+ unsigned int w3) {
+ unsigned int w4;
+
+ /* { dg-final { scan-assembler "csinv\tw\[0-9\]*.*ne" } } */
+ w4 = (w0 == w1) ? ~w3 : w2;
+ return w4;
+}
+
+unsigned int
+test_csinv32_condasn2(unsigned int w0,
+ unsigned int w1,
+ unsigned int w2,
+ unsigned int w3) {
+ unsigned int w4;
+
+ /* { dg-final { scan-assembler "csinv\tw\[0-9\]*.*eq" } } */
+ w4 = (w0 == w1) ? w3 : ~w2;
+ return w4;
+}
+
+unsigned long long
+test_csinv64_condasn1(unsigned long long x0,
+ unsigned long long x1,
+ unsigned long long x2,
+ unsigned long long x3) {
+ unsigned long long x4;
+
+ /* { dg-final { scan-assembler "csinv\tx\[0-9\]*.*ne" } } */
+ x4 = (x0 == x1) ? ~x3 : x2;
+ return x4;
+}
+
+unsigned long long
+test_csinv64_condasn2(unsigned long long x0,
+ unsigned long long x1,
+ unsigned long long x2,
+ unsigned long long x3) {
+ unsigned long long x4;
+
+ /* { dg-final { scan-assembler "csinv\tx\[0-9\]*.*eq" } } */
+ x4 = (x0 == x1) ? x3 : ~x2;
+ return x4;
+}
===================================================================
@@ -0,0 +1,43 @@
+
+typedef float *__restrict__ pRF32;
+typedef double *__restrict__ pRF64;
+
+float maxv_f32 (pRF32 a)
+{
+ int i;
+ float s = a[0];
+ for (i=1;i<8;i++)
+ s = (s > a[i] ? s : a[i]);
+
+ return s;
+}
+
+float minv_f32 (pRF32 a)
+{
+ int i;
+ float s = a[0];
+ for (i=1;i<16;i++)
+ s = (s < a[i] ? s : a[i]);
+
+ return s;
+}
+
+double maxv_f64 (pRF64 a)
+{
+ int i;
+ double s = a[0];
+ for (i=1;i<8;i++)
+ s = (s > a[i] ? s : a[i]);
+
+ return s;
+}
+
+double minv_f64 (pRF64 a)
+{
+ int i;
+ double s = a[0];
+ for (i=1;i<16;i++)
+ s = (s < a[i] ? s : a[i]);
+
+ return s;
+}
===================================================================
@@ -0,0 +1,31 @@
+
+/* { dg-do run } */
+/* { dg-options "-O3 -ffast-math" } */
+
+extern void abort (void);
+
+#include "vect-faddv.x"
+
+int main (void)
+{
+ float addv_f32_value = -120.0f;
+ double addv_f64_value = 120.0;
+ float af32[16];
+ double af64[16];
+ int i;
+
+ /* Set up input vectors. */
+ for (i=0; i<16; i++)
+ {
+ af32[i] = (float)-i;
+ af64[i] = (double)i;
+ }
+
+ if (addv_f32 (af32) != addv_f32_value)
+ abort ();
+
+ if (addv_f64 (af64) != addv_f64_value)
+ abort ();
+
+ return 0;
+}
===================================================================
@@ -0,0 +1,10 @@
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -ffast-math" } */
+
+#include "vect-fmaxv-fminv.x"
+
+/* { dg-final { scan-assembler "fminnmv" } } */
+/* { dg-final { scan-assembler "fmaxnmv" } } */
+/* { dg-final { scan-assembler "fminnmp" } } */
+/* { dg-final { scan-assembler "fmaxnmp" } } */
===================================================================
@@ -0,0 +1,55 @@
+extern GPF SUFFIX(trunc) (GPF);
+extern GPF SUFFIX(ceil) (GPF);
+extern GPF SUFFIX(floor) (GPF);
+extern GPF SUFFIX(round) (GPF);
+
+GPI test1a (GPF x) {
+ return SUFFIX(__builtin_trunc)(x);
+}
+
+GPI test1b (GPF x)
+{
+ return SUFFIX(trunc)(x);
+}
+
+GPI test2a (GPF x)
+{
+ return SUFFIX(__builtin_lceil)(x);
+}
+
+GPI test2b (GPF x)
+{
+ return SUFFIX(ceil)(x);
+}
+
+GPI test2c (GPF x)
+{
+ return SUFFIX(__builtin_ceil)(x);
+}
+
+GPI test3a (GPF x)
+{
+ return SUFFIX(__builtin_lfloor)(x);
+}
+
+GPI test3b (GPF x)
+{
+ return SUFFIX(floor)(x);
+}
+
+GPI test3c (GPF x)
+{
+ return SUFFIX(__builtin_floor)(x);
+}
+
+GPI test4a (GPF x)
+{
+ return SUFFIX(__builtin_round)(x);
+}
+
+GPI test4b (GPF x)
+{
+ return SUFFIX(round)(x);
+}
+
+
===================================================================
@@ -0,0 +1,109 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+extern float fabsf (float);
+extern float sqrtf (float);
+extern double fabs (double);
+extern double sqrt (double);
+
+volatile float f1, f2, f3;
+volatile int cond1, cond2;
+
+void test_sf() {
+ /* abssf2 */
+ /* { dg-final { scan-assembler "fabs\ts\[0-9\]*" } } */
+ f1 = fabsf (f1);
+ /* negsf2 */
+ /* { dg-final { scan-assembler "fneg\ts\[0-9\]*" } } */
+ f1 = -f1;
+ /* addsf3 */
+ /* { dg-final { scan-assembler "fadd\ts\[0-9\]*" } } */
+ f1 = f2 + f3;
+ /* subsf3 */
+ /* { dg-final { scan-assembler "fsub\ts\[0-9\]*" } } */
+ f1 = f2 - f3;
+ /* divsf3 */
+ /* { dg-final { scan-assembler "fdiv\ts\[0-9\]*" } } */
+ f1 = f2 / f3;
+ /* mulsf3 */
+ /* { dg-final { scan-assembler "fmul\ts\[0-9\]*" } } */
+ f1 = f2 * f3;
+ /* sqrtsf2 */
+ /* { dg-final { scan-assembler "fsqrt\ts\[0-9\]*" } } */
+ f1 = sqrtf (f1);
+ /* cmpsf */
+ /* { dg-final { scan-assembler "fcmp\ts\[0-9\]*" } } */
+ if (f1 < f2)
+ cond1 = 1;
+ else
+ cond2 = 1;
+}
+
+volatile double d1, d2, d3;
+
+void test_df() {
+ /* absdf2 */
+ /* { dg-final { scan-assembler "fabs\td\[0-9\]*" } } */
+ d1 = fabs (d1);
+ /* negdf2 */
+ /* { dg-final { scan-assembler "fneg\td\[0-9\]*" } } */
+ d1 = -d1;
+ /* adddf3 */
+ /* { dg-final { scan-assembler "fadd\td\[0-9\]*" } } */
+ d1 = d2 + d3;
+ /* subdf3 */
+ /* { dg-final { scan-assembler "fsub\td\[0-9\]*" } } */
+ d1 = d2 - d3;
+ /* divdf3 */
+ /* { dg-final { scan-assembler "fdiv\td\[0-9\]*" } } */
+ d1 = d2 / d3;
+ /* muldf3 */
+ /* { dg-final { scan-assembler "fmul\td\[0-9\]*" } } */
+ d1 = d2 * d3;
+ /* sqrtdf2 */
+ /* { dg-final { scan-assembler "fsqrt\td\[0-9\]*" } } */
+ d1 = sqrt (d1);
+ /* cmpdf */
+ /* { dg-final { scan-assembler "fcmp\td\[0-9\]*" } } */
+ if (d1 < d2)
+ cond1 = 1;
+ else
+ cond2 = 1;
+}
+
+volatile int i1;
+volatile unsigned int u1;
+
+void test_convert () {
+ /* extendsfdf2 */
+ /* { dg-final { scan-assembler "fcvt\td\[0-9\]*" } } */
+ d1 = f1;
+ /* truncdfsf2 */
+ /* { dg-final { scan-assembler "fcvt\ts\[0-9\]*" } } */
+ f1 = d1;
+ /* fixsfsi2 */
+ /* { dg-final { scan-assembler "fcvtzs\tw\[0-9\], s\[0-9\]*" } } */
+ i1 = f1;
+ /* fixdfsi2 */
+ /* { dg-final { scan-assembler "fcvtzs\tw\[0-9\], d\[0-9\]*" } } */
+ i1 = d1;
+ /* fixunsfsi2 */
+ /* { dg-final { scan-assembler "fcvtzu\tw\[0-9\], s\[0-9\]*" } } */
+ u1 = f1;
+ /* fixunsdfsi2 */
+ /* { dg-final { scan-assembler "fcvtzu\tw\[0-9\], d\[0-9\]*" } } */
+ u1 = d1;
+ /* floatsisf2 */
+ /* { dg-final { scan-assembler "scvtf\ts\[0-9\]*" } } */
+ f1 = i1;
+ /* floatsidf2 */
+ /* { dg-final { scan-assembler "scvtf\td\[0-9\]*" } } */
+ d1 = i1;
+ /* floatunssisf2 */
+ /* { dg-final { scan-assembler "ucvtf\ts\[0-9\]*" } } */
+ f1 = u1;
+ /* floatunssidf2 */
+ /* { dg-final { scan-assembler "ucvtf\td\[0-9\]*" } } */
+ d1 = u1;
+}
+
===================================================================
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#define GPF float
+#define SUFFIX(x) x##f
+#define GPI unsigned long
+
+#include "fcvt.x"
+
+/* { dg-final { scan-assembler-times "fcvtzu\tx\[0-9\]+, *s\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *s\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtpu\tx\[0-9\]+, *s\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *s\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtmu\tx\[0-9\]+, *s\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtau\tx\[0-9\]+, *s\[0-9\]" 2 } } */
===================================================================
@@ -0,0 +1,50 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int
+test_csneg32_condasn1(int w0,
+ int w1,
+ int w2,
+ int w3) {
+ int w4;
+
+ /* { dg-final { scan-assembler "csneg\tw\[0-9\]*.*ne" } } */
+ w4 = (w0 == w1) ? -w3 : w2;
+ return w4;
+}
+
+int
+test_csneg32_condasn2(int w0,
+ int w1,
+ int w2,
+ int w3) {
+ int w4;
+
+ /* { dg-final { scan-assembler "csneg\tw\[0-9\]*.*eq" } } */
+ w4 = (w0 == w1) ? w3 : -w2;
+ return w4;
+}
+
+long long
+test_csneg64_condasn1(long long x0,
+ long long x1,
+ long long x2,
+ long long x3) {
+ long long x4;
+
+ /* { dg-final { scan-assembler "csneg\tx\[0-9\]*.*ne" } } */
+ x4 = (x0 == x1) ? -x3 : x2;
+ return x4;
+}
+
+long long
+test_csneg64_condasn2(long long x0,
+ long long x1,
+ long long x2,
+ long long x3) {
+ long long x4;
+
+ /* { dg-final { scan-assembler "csneg\tx\[0-9\]*.*eq" } } */
+ x4 = (x0 == x1) ? x3 : -x2;
+ return x4;
+}
===================================================================
@@ -0,0 +1,93 @@
+
+/* { dg-do run } */
+/* { dg-options "-O3" } */
+
+#include "vect.x"
+
+extern void abort (void);
+
+void set_vector (int *a, int n)
+{
+ int i;
+ for (i=0; i<16; i++)
+ a[i] = n;
+}
+
+void check_vector (pRINT c, pRINT result, char *str)
+{
+ int i;
+ for (i=0; i<16 ; i++)
+ if (c[i] != result[i])
+ abort ();
+}
+
+#define TEST(func, sign) set_vector (sign##c, 0); \
+ func (sign##a, sign##b, sign##c); \
+ check_vector (sign##c, func##_vector, #func);
+
+
+#define TESTV(func, sign) \
+ if (func (sign##a) != func##_value) \
+ abort ();
+
+#define TESTVLL(func, sign) \
+ if (func (ll##sign##a) != func##_value) \
+ abort ();
+
+int main (void)
+{
+ int sa[16];
+ int sb[16];
+ int sc[16];
+ unsigned int ua[16];
+ unsigned int ub[16];
+ unsigned int uc[16];
+ long long llsa[16];
+ unsigned long long llua[16];
+ int i;
+
+ /* Table of standard values to compare against. */
+ unsigned int test_bic_vector[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+ unsigned int test_orn_vector[] = {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1};
+ int mla_vector[] = {0, 1, 4, 9, 16, 25, 36, 49, 64, 81, 100, 121, 144, 169, 196, 225};
+ int mls_vector[] = {0, -1, -4, -9, -16, -25, -36, -49, -64, -81, -100, -121, -144, -169, -196, -225};
+ int smax_vector[] = {0, -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15};
+ int smin_vector[] = {0, -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15};
+ unsigned int umax_vector[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
+ unsigned int umin_vector[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
+ int reduce_smax_value = 0;
+ int reduce_smin_value = -15;
+ unsigned int reduce_umax_value = 15;
+ unsigned int reduce_umin_value = 0;
+ unsigned int reduce_add_u32_value = 120;
+ int reduce_add_s32_value = -120;
+ long long reduce_add_s64_value = -120;
+ unsigned long long reduce_add_u64_value = 120;
+
+ /* Set up input vectors. */
+ for (i=0; i < 16; i++)
+ {
+ sa[i] = sb[i] = -i;
+ llsa[i] = (long long)-i;
+ ua[i] = ub[i] = i;
+ llua[i] = (unsigned long long)i;
+ }
+
+ TEST (test_bic, s);
+ TEST (test_orn, s);
+ TEST (mla, s);
+ TEST (mls, s);
+ TEST (smax, s);
+ TEST (smin, s);
+ TEST (umax, u);
+ TEST (umin, u);
+ TESTV (reduce_smax, s);
+ TESTV (reduce_smin, s);
+ TESTV (reduce_umax, u);
+ TESTV (reduce_umin, u);
+ TESTV (reduce_add_u32, u);
+ TESTV (reduce_add_s32, s);
+ TESTVLL (reduce_add_u64, u);
+ TESTVLL (reduce_add_s64, s);
+ return 0;
+}
===================================================================
@@ -0,0 +1,45 @@
+# Specific regression driver for AArch64.
+# Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
+# Contributed by ARM Ltd.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>. */
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't an AArch64 target.
+if {![istarget aarch64*-*-*] } then {
+ return
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+
+# If a testcase doesn't have special options, use these.
+global DEFAULT_CFLAGS
+if ![info exists DEFAULT_CFLAGS] then {
+ set DEFAULT_CFLAGS " -ansi -pedantic-errors"
+}
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \
+ "" $DEFAULT_CFLAGS
+
+# All done.
+dg-finish
===================================================================
@@ -0,0 +1,131 @@
+
+/* { dg-do run } */
+/* { dg-options "-O3" } */
+
+#include "limits.h"
+
+extern void abort (void);
+
+#define N 16
+
+#include "vect-abs.x"
+
+#define SET_VEC(size, type) void set_vector_##size (pRINT##size a) \
+ { \
+ int i; \
+ for (i=0; i<N; i++) \
+ a[i] = (type##_MIN) + (i + 1); \
+ }
+
+#define SET_RVEC(size, type) void set_rvector_##size (pRINT##size a) \
+ { \
+ int i; \
+ for (i=0; i<N; i++) \
+ a[i] = type##_MAX - i; \
+ }
+
+#define CHECK_VEC(size) void check_vector_##size (pRINT##size a, \
+ pRINT##size b) \
+ { \
+ int i; \
+ for (i=0; i<N; i++) \
+ if (a[i] != b[i]) \
+ abort (); \
+ }
+
+
+SET_RVEC (8, SCHAR)
+SET_RVEC (16, SHRT)
+SET_RVEC (32, INT)
+SET_RVEC (64, LONG_LONG)
+
+set_rvector_long (pRLONG a)
+{
+ int i;
+ for (i=0; i<N; i++)
+ a[i] = (LONG_MAX) - i;
+}
+
+SET_VEC (8, SCHAR)
+SET_VEC (16, SHRT)
+SET_VEC (32, INT)
+SET_VEC (64, LONG_LONG)
+
+set_vector_long (long *__restrict__ a)
+{
+ long i;
+ for (i=0; i<N; i++)
+ a[i] = (LONG_MIN) + i + 1;
+}
+
+CHECK_VEC (8)
+CHECK_VEC (16)
+CHECK_VEC (32)
+CHECK_VEC (64)
+
+check_vector_long (long *__restrict__ a, long *__restrict__ b)
+{
+ long i;
+ for (i=0; i<N; i++)
+ if (a[i] != b[i])
+ abort ();
+}
+
+int main (void)
+{
+
+ signed char a8[N];
+ short a16[N];
+ int a32[N];
+ long long a64[N];
+ /* abs () from stdlib. */
+ int alib32[N];
+ long alibl[N];
+
+
+ signed char b8[N];
+ short b16[N];
+ int b32[N];
+ long long b64[N];
+ /* abs () from stdlib. */
+ long blibl[N];
+
+ signed char abs_vector_8[N];
+ short abs_vector_16[N];
+ int abs_vector_32[N];
+ long long abs_vector_64[N];
+ long abs_vector_long[N];
+
+ /* Set up result vectors. */
+ set_rvector_8 (abs_vector_8);
+ set_rvector_16 (abs_vector_16);
+ set_rvector_32 (abs_vector_32);
+ set_rvector_long (abs_vector_long);
+ set_rvector_64 (abs_vector_64);
+
+ /* Set up inputs. */
+ set_vector_8 (b8);
+ set_vector_16 (b16);
+ set_vector_32 (b32);
+ set_vector_64 (b64);
+ set_vector_long (blibl);
+
+ /* Calculate their absolute values. */
+ absolute_s8 (a8, b8);
+ absolute_s16 (a16, b16);
+ absolute_s32 (a32, b32);
+ absolute_s64 (a64, b64);
+ /* abs () from stdlib. */
+ absolute_s32_lib (alib32, b32);
+ absolute_l32_lib (alibl, blibl);
+
+ /* Check. */
+ check_vector_8 (a8, abs_vector_8);
+ check_vector_16 (a16, abs_vector_16);
+ check_vector_32 (a32, abs_vector_32);
+ check_vector_64 (a64, abs_vector_64);
+ check_vector_32 (alib32, abs_vector_32);
+ check_vector_long (alibl, abs_vector_long);
+
+ return 0;
+}
===================================================================
@@ -0,0 +1,137 @@
+
+/* { dg-do run } */
+/* { dg-options "-O3" } */
+
+extern void abort (void);
+
+#include "vect-fp.x"
+
+
+#define DEFN_SETV(type) \
+ set_vector_##type (pR##type a, type n) \
+ { \
+ int i; \
+ for (i=0; i<16; i++) \
+ a[i] = n; \
+ }
+
+#define DEFN_CHECKV(type) \
+ void check_vector_##type (pR##type a, pR##type vec) \
+ { \
+ int i; \
+ for (i=0; i<16; i++) \
+ if (a[i] != vec[i]) \
+ abort (); \
+ }
+
+#define TEST2(fname, type) \
+ set_vector_##type (a##type, 0.0); \
+ fname##_##type (a##type, b##type); \
+ check_vector_##type (a##type, fname##_##type##_vector);
+
+#define TEST3(fname, type) \
+ set_vector_##type (a##type, 0.0); \
+ fname##_##type (a##type, b##type, c##type); \
+ check_vector_##type (a##type, fname##_##type##_vector);
+
+#define TEST(fname, N) \
+ TEST##N(fname, F32); \
+ TEST##N(fname, F64);
+
+DEFN_SETV (F32)
+DEFN_SETV (F64)
+
+DEFN_CHECKV (F32)
+DEFN_CHECKV (F64)
+
+int main (void)
+{
+ F32 aF32[16];
+ F32 bF32[16];
+ F32 cF32[16];
+
+ F64 aF64[16];
+ F64 bF64[16];
+ F64 cF64[16];
+ int i;
+
+ F32 add_F32_vector[] = { 3.0f, 5.0f, 7.0f, 9.0f, 11.0f,
+ 13.0f, 15.0f, 17.0f, 19.0f,
+ 21.0f, 23.0f, 25.0f, 27.0f,
+ 29.0f, 31.0f, 33.0f };
+
+ F64 add_F64_vector[] = { 3.0, 5.0, 7.0, 9.0, 11.0,
+ 13.0, 15.0, 17.0, 19.0,
+ 21.0, 23.0, 25.0, 27.0,
+ 29.0, 31.0, 33.0 };
+
+ F32 sub_F32_vector[] = { -1.0f, -1.0f, -1.0f, -1.0f, -1.0f,
+ -1.0f, -1.0f, -1.0f, -1.0f, -1.0f,
+ -1.0f, -1.0f, -1.0f, -1.0f, -1.0f,
+ -1.0f };
+
+ F64 sub_F64_vector[] = { -1.0, -1.0, -1.0, -1.0, -1.0,
+ -1.0, -1.0, -1.0, -1.0, -1.0,
+ -1.0, -1.0, -1.0, -1.0, -1.0,
+ -1.0 };
+
+ F32 mul_F32_vector[] = { 2.0f, 6.0f, 12.0f, 20.0f, 30.0f,
+ 42.0f, 56.0f, 72.0f, 90.0f,
+ 110.0f, 132.0f, 156.0f, 182.0f,
+ 210.0f, 240.0f, 272.0f };
+
+ F64 mul_F64_vector[] = { 2.0, 6.0, 12.0, 20.0, 30.0,
+ 42.0, 56.0, 72.0, 90.0,
+ 110.0, 132.0, 156.0, 182.0,
+ 210.0, 240.0, 272.0 };
+
+ F32 div_F32_vector[] = { 0.5f, (float)(2.0/3.0), 0.75f, 0.8f,
+ (float)(5.0/6.0), (float)(6.0/7.0), 0.875000f,
+ (float)(8.0/9.0), 0.900000f, (float)(10.0/11.0),
+ (float)(11.0/12.0), (float)(12.0/13.0),
+ (float)(13.0/14.0), (float)(14.0/15.0), 0.937500f,
+ (float)(16.0/17.0) };
+
+ F64 div_F64_vector[] = { 0.5, (2.0/3.0), 0.75, 0.8, (5.0/6.0),
+ (6.0/7.0), 0.875000, (8.0/9.0), 0.900000,
+ (10.0/11.0), (11.0/12.0), (12.0/13.0), (13.0/14.0),
+ (14.0/15.0), 0.937500, (16.0/17.0) };
+
+ F32 neg_F32_vector[] = { -1.0f, -2.0f, -3.0f, -4.0f,
+ -5.0f, -6.0f, -7.0f, -8.0f,
+ -9.0f, -10.0f, -11.0f, -12.0f,
+ -13.0f, -14.0f, -15.0f, -16.0f };
+
+ F64 neg_F64_vector[] = { -1.0, -2.0, -3.0, -4.0,
+ -5.0, -6.0, -7.0, -8.0,
+ -9.0, -10.0, -11.0, -12.0,
+ -13.0, -14.0, -15.0, -16.0 };
+
+ F32 abs_F32_vector[] = { 1.0f, 2.0f, 3.0f, 4.0f,
+ 5.0f, 6.0f, 7.0f, 8.0f,
+ 9.0f, 10.0f, 11.0f, 12.0f,
+ 13.0f, 14.0f, 15.0f, 16.0f };
+
+ F64 abs_F64_vector[] = { 1.0, 2.0, 3.0, 4.0,
+ 5.0, 6.0, 7.0, 8.0,
+ 9.0, 10.0, 11.0, 12.0,
+ 13.0, 14.0, 15.0, 16.0 };
+
+ /* Setup input vectors. */
+ for (i=1; i<=16; i++)
+ {
+ bF32[i-1] = (float)i;
+ cF32[i-1] = (float)(i+1);
+ bF64[i-1] = (double)i;
+ cF64[i-1] = (double)(i+1);
+ }
+
+ TEST (add, 3);
+ TEST (sub, 3);
+ TEST (mul, 3);
+ TEST (div, 3);
+ TEST (neg, 2);
+ TEST (abs, 2);
+
+ return 0;
+}
===================================================================
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#define GPF double
+#define SUFFIX(x) x
+#define GPI int
+
+#include "fcvt.x"
+
+/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\]+, *d\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *d\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtps\tw\[0-9\]+, *d\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *d\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtms\tw\[0-9\]+, *d\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtas\tw\[0-9\]+, *d\[0-9\]" 2 } } */
===================================================================
@@ -0,0 +1,803 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#include "../../../config/aarch64/arm_neon.h"
+
+
+/* { dg-final { scan-assembler-times "\\tfmax\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */
+
+float32x2_t
+test_vmax_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return vmax_f32(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.8b, v\[0-9\].8b, v\[0-9\].8b" 1 } } */
+
+int8x8_t
+test_vmax_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return vmax_s8(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.8b, v\[0-9\].8b, v\[0-9\].8b" 1 } } */
+
+uint8x8_t
+test_vmax_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return vmax_u8(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.4h, v\[0-9\].4h, v\[0-9\].4h" 1 } } */
+
+int16x4_t
+test_vmax_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return vmax_s16(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.4h, v\[0-9\].4h, v\[0-9\].4h" 1 } } */
+
+uint16x4_t
+test_vmax_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return vmax_u16(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */
+
+int32x2_t
+test_vmax_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return vmax_s32(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */
+
+uint32x2_t
+test_vmax_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return vmax_u32(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tfmax\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */
+
+float32x4_t
+test_vmaxq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return vmaxq_f32(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tfmax\\tv\[0-9\]+\.2d, v\[0-9\].2d, v\[0-9\].2d" 1 } } */
+
+float64x2_t
+test_vmaxq_f64 (float64x2_t __a, float64x2_t __b)
+{
+ return vmaxq_f64(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.16b, v\[0-9\].16b, v\[0-9\].16b" 1 } } */
+
+int8x16_t
+test_vmaxq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return vmaxq_s8(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.16b, v\[0-9\].16b, v\[0-9\].16b" 1 } } */
+
+uint8x16_t
+test_vmaxq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return vmaxq_u8(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.8h, v\[0-9\].8h, v\[0-9\].8h" 1 } } */
+
+int16x8_t
+test_vmaxq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return vmaxq_s16(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.8h, v\[0-9\].8h, v\[0-9\].8h" 1 } } */
+
+uint16x8_t
+test_vmaxq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return vmaxq_u16(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */
+
+int32x4_t
+test_vmaxq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return vmaxq_s32(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */
+
+uint32x4_t
+test_vmaxq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return vmaxq_u32(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tfmin\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */
+
+float32x2_t
+test_vmin_f32 (float32x2_t __a, float32x2_t __b)
+{
+ return vmin_f32(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.8b, v\[0-9\].8b, v\[0-9\].8b" 1 } } */
+
+int8x8_t
+test_vmin_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return vmin_s8(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.8b, v\[0-9\].8b, v\[0-9\].8b" 1 } } */
+
+uint8x8_t
+test_vmin_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return vmin_u8(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.4h, v\[0-9\].4h, v\[0-9\].4h" 1 } } */
+
+int16x4_t
+test_vmin_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return vmin_s16(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.4h, v\[0-9\].4h, v\[0-9\].4h" 1 } } */
+
+uint16x4_t
+test_vmin_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return vmin_u16(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */
+
+int32x2_t
+test_vmin_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return vmin_s32(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */
+
+uint32x2_t
+test_vmin_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return vmin_u32(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tfmin\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */
+
+float32x4_t
+test_vminq_f32 (float32x4_t __a, float32x4_t __b)
+{
+ return vminq_f32(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tfmin\\tv\[0-9\]+\.2d, v\[0-9\].2d, v\[0-9\].2d" 1 } } */
+
+float64x2_t
+test_vminq_f64 (float64x2_t __a, float64x2_t __b)
+{
+ return vminq_f64(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.16b, v\[0-9\].16b, v\[0-9\].16b" 1 } } */
+
+int8x16_t
+test_vminq_s8 (int8x16_t __a, int8x16_t __b)
+{
+ return vminq_s8(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.16b, v\[0-9\].16b, v\[0-9\].16b" 1 } } */
+
+uint8x16_t
+test_vminq_u8 (uint8x16_t __a, uint8x16_t __b)
+{
+ return vminq_u8(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.8h, v\[0-9\].8h, v\[0-9\].8h" 1 } } */
+
+int16x8_t
+test_vminq_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return vminq_s16(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.8h, v\[0-9\].8h, v\[0-9\].8h" 1 } } */
+
+uint16x8_t
+test_vminq_u16 (uint16x8_t __a, uint16x8_t __b)
+{
+ return vminq_u16(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */
+
+int32x4_t
+test_vminq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return vminq_s32(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */
+
+uint32x4_t
+test_vminq_u32 (uint32x4_t __a, uint32x4_t __b)
+{
+ return vminq_u32(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\taddp\\tv\[0-9\]+\.8b, v\[0-9\].8b, v\[0-9\].8b" 2 } } */
+
+int8x8_t
+test_vpadd_s8 (int8x8_t __a, int8x8_t __b)
+{
+ return vpadd_s8(__a, __b);
+}
+
+uint8x8_t
+test_vpadd_u8 (uint8x8_t __a, uint8x8_t __b)
+{
+ return vpadd_u8(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\taddp\\tv\[0-9\]+\.4h, v\[0-9\].4h, v\[0-9\].4h" 2 } } */
+
+int16x4_t
+test_vpadd_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return vpadd_s16(__a, __b);
+}
+
+uint16x4_t
+test_vpadd_u16 (uint16x4_t __a, uint16x4_t __b)
+{
+ return vpadd_u16(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\taddp\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 2 } } */
+
+int32x2_t
+test_vpadd_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return vpadd_s32(__a, __b);
+}
+
+uint32x2_t
+test_vpadd_u32 (uint32x2_t __a, uint32x2_t __b)
+{
+ return vpadd_u32(__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlal\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.4h" 1 } } */
+
+int32x4_t
+test_vqdmlal_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return vqdmlal_s16 (__a, __b, __c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlal2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 1 } } */
+
+int32x4_t
+test_vqdmlal_high_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c)
+{
+ return vqdmlal_high_s16 (__a, __b, __c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlal2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.h" 3 } } */
+
+int32x4_t
+test_vqdmlal_high_lane_s16 (int32x4_t a, int16x8_t b, int16x8_t c)
+{
+ return vqdmlal_high_lane_s16 (a, b, c, 3);
+}
+
+int32x4_t
+test_vqdmlal_high_laneq_s16 (int32x4_t a, int16x8_t b, int16x8_t c)
+{
+ return vqdmlal_high_laneq_s16 (a, b, c, 6);
+}
+
+int32x4_t
+test_vqdmlal_high_n_s16 (int32x4_t __a, int16x8_t __b, int16_t __c)
+{
+ return vqdmlal_high_n_s16 (__a, __b, __c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlal\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.h" 3 } } */
+
+int32x4_t
+test_vqdmlal_lane_s16 (int32x4_t a, int16x4_t b, int16x8_t c)
+{
+ return vqdmlal_lane_s16 (a, b, c, 3);
+}
+
+int32x4_t
+test_vqdmlal_laneq_s16 (int32x4_t a, int16x4_t b, int16x8_t c)
+{
+ return vqdmlal_laneq_s16 (a, b, c, 6);
+}
+
+int32x4_t
+test_vqdmlal_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c)
+{
+ return vqdmlal_n_s16 (__a, __b, __c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlal\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.2s" 1 } } */
+
+int64x2_t
+test_vqdmlal_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return vqdmlal_s32 (__a, __b, __c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlal2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 1 } } */
+
+int64x2_t
+test_vqdmlal_high_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c)
+{
+ return vqdmlal_high_s32 (__a, __b, __c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlal2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.s" 3 } } */
+
+int64x2_t
+test_vqdmlal_high_lane_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c)
+{
+ return vqdmlal_high_lane_s32 (__a, __b, __c, 1);
+}
+
+int64x2_t
+test_vqdmlal_high_laneq_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c)
+{
+ return vqdmlal_high_laneq_s32 (__a, __b, __c, 3);
+}
+
+int64x2_t
+test_vqdmlal_high_n_s32 (int64x2_t __a, int32x4_t __b, int32_t __c)
+{
+ return vqdmlal_high_n_s32 (__a, __b, __c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlal\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.s" 3 } } */
+
+int64x2_t
+test_vqdmlal_lane_s32 (int64x2_t __a, int32x2_t __b, int32x4_t __c)
+{
+ return vqdmlal_lane_s32 (__a, __b, __c, 1);
+}
+
+int64x2_t
+test_vqdmlal_laneq_s32 (int64x2_t __a, int32x2_t __b, int32x4_t __c)
+{
+ return vqdmlal_laneq_s32 (__a, __b, __c, 3);
+}
+
+int64x2_t
+test_vqdmlal_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c)
+{
+ return vqdmlal_n_s32 (__a, __b, __c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlsl\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.4h" 1 } } */
+
+int32x4_t
+test_vqdmlsl_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c)
+{
+ return vqdmlsl_s16 (__a, __b, __c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlsl2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 1 } } */
+
+int32x4_t
+test_vqdmlsl_high_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c)
+{
+ return vqdmlsl_high_s16 (__a, __b, __c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlsl2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.h" 3 } } */
+
+int32x4_t
+test_vqdmlsl_high_lane_s16 (int32x4_t a, int16x8_t b, int16x8_t c)
+{
+ return vqdmlsl_high_lane_s16 (a, b, c, 3);
+}
+
+int32x4_t
+test_vqdmlsl_high_laneq_s16 (int32x4_t a, int16x8_t b, int16x8_t c)
+{
+ return vqdmlsl_high_laneq_s16 (a, b, c, 6);
+}
+
+int32x4_t
+test_vqdmlsl_high_n_s16 (int32x4_t __a, int16x8_t __b, int16_t __c)
+{
+ return vqdmlsl_high_n_s16 (__a, __b, __c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlsl\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.h" 3 } } */
+
+int32x4_t
+test_vqdmlsl_lane_s16 (int32x4_t a, int16x4_t b, int16x8_t c)
+{
+ return vqdmlsl_lane_s16 (a, b, c, 3);
+}
+
+int32x4_t
+test_vqdmlsl_laneq_s16 (int32x4_t a, int16x4_t b, int16x8_t c)
+{
+ return vqdmlsl_laneq_s16 (a, b, c, 6);
+}
+
+int32x4_t
+test_vqdmlsl_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c)
+{
+ return vqdmlsl_n_s16 (__a, __b, __c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlsl\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.2s" 1 } } */
+
+int64x2_t
+test_vqdmlsl_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c)
+{
+ return vqdmlsl_s32 (__a, __b, __c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlsl2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 1 } } */
+
+int64x2_t
+test_vqdmlsl_high_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c)
+{
+ return vqdmlsl_high_s32 (__a, __b, __c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlsl2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.s" 3 } } */
+
+int64x2_t
+test_vqdmlsl_high_lane_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c)
+{
+ return vqdmlsl_high_lane_s32 (__a, __b, __c, 1);
+}
+
+int64x2_t
+test_vqdmlsl_high_laneq_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c)
+{
+ return vqdmlsl_high_laneq_s32 (__a, __b, __c, 3);
+}
+
+int64x2_t
+test_vqdmlsl_high_n_s32 (int64x2_t __a, int32x4_t __b, int32_t __c)
+{
+ return vqdmlsl_high_n_s32 (__a, __b, __c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmlsl\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.s" 3 } } */
+
+int64x2_t
+test_vqdmlsl_lane_s32 (int64x2_t __a, int32x2_t __b, int32x4_t __c)
+{
+ return vqdmlsl_lane_s32 (__a, __b, __c, 1);
+}
+
+int64x2_t
+test_vqdmlsl_laneq_s32 (int64x2_t __a, int32x2_t __b, int32x4_t __c)
+{
+ return vqdmlsl_laneq_s32 (__a, __b, __c, 3);
+}
+
+int64x2_t
+test_vqdmlsl_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c)
+{
+ return vqdmlsl_n_s32 (__a, __b, __c);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmull\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.4h" 1 } } */
+
+int32x4_t
+test_vqdmull_s16 (int16x4_t __a, int16x4_t __b)
+{
+ return vqdmull_s16 (__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmull2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 1 } } */
+
+int32x4_t
+test_vqdmull_high_s16 (int16x8_t __a, int16x8_t __b)
+{
+ return vqdmull_high_s16 (__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmull2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.h" 3 } } */
+
+int32x4_t
+test_vqdmull_high_lane_s16 (int16x8_t a, int16x8_t b)
+{
+ return vqdmull_high_lane_s16 (a, b, 3);
+}
+
+int32x4_t
+test_vqdmull_high_laneq_s16 (int16x8_t a, int16x8_t b)
+{
+ return vqdmull_high_laneq_s16 (a, b, 6);
+}
+
+int32x4_t
+test_vqdmull_high_n_s16 (int16x8_t __a, int16_t __b)
+{
+ return vqdmull_high_n_s16 (__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmull\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.h" 3 } } */
+
+int32x4_t
+test_vqdmull_lane_s16 (int16x4_t a, int16x8_t b)
+{
+ return vqdmull_lane_s16 (a, b, 3);
+}
+
+int32x4_t
+test_vqdmull_laneq_s16 (int16x4_t a, int16x8_t b)
+{
+ return vqdmull_laneq_s16 (a, b, 6);
+}
+
+int32x4_t
+test_vqdmull_n_s16 (int16x4_t __a, int16_t __b)
+{
+ return vqdmull_n_s16 (__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmull\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.2s" 1 } } */
+
+int64x2_t
+test_vqdmull_s32 (int32x2_t __a, int32x2_t __b)
+{
+ return vqdmull_s32 (__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmull2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 1 } } */
+
+int64x2_t
+test_vqdmull_high_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return vqdmull_high_s32 (__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmull2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.s" 3 } } */
+
+int64x2_t
+test_vqdmull_high_lane_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return vqdmull_high_lane_s32 (__a, __b, 1);
+}
+
+int64x2_t
+test_vqdmull_high_laneq_s32 (int32x4_t __a, int32x4_t __b)
+{
+ return vqdmull_high_laneq_s32 (__a, __b, 3);
+}
+
+int64x2_t
+test_vqdmull_high_n_s32 (int32x4_t __a, int32_t __b)
+{
+ return vqdmull_high_n_s32 (__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsqdmull\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.s" 3 } } */
+
+int64x2_t
+test_vqdmull_lane_s32 (int32x2_t __a, int32x4_t __b)
+{
+ return vqdmull_lane_s32 (__a, __b, 1);
+}
+
+int64x2_t
+test_vqdmull_laneq_s32 (int32x2_t __a, int32x4_t __b)
+{
+ return vqdmull_laneq_s32 (__a, __b, 1);
+}
+
+int64x2_t
+test_vqdmull_n_s32 (int32x2_t __a, int32_t __b)
+{
+ return vqdmull_n_s32 (__a, __b);
+}
+
+/* { dg-final { scan-assembler-times "\\tsshll\\tv\[0-9\]+\.2d" 1 } } */
+
+int64x2_t
+test_vshll_n_s32 (int32x2_t __a)
+{
+ return vshll_n_s32 (__a, 9);
+}
+
+/* { dg-final { scan-assembler-times "\\tushll\\tv\[0-9\]+\.2d" 1 } } */
+
+uint64x2_t
+test_vshll_n_u32 (uint32x2_t __a)
+{
+ return vshll_n_u32 (__a, 9);
+}
+
+/* { dg-final { scan-assembler-times "\\tshll\\tv\[0-9\]+\.2d" 2 } } */
+
+int64x2_t
+test_vshll_n_s32_2 (int32x2_t __a)
+{
+ return vshll_n_s32 (__a, 32);
+}
+
+uint64x2_t
+test_vshll_n_u32_2 (uint32x2_t __a)
+{
+ return vshll_n_u32 (__a, 32);
+}
+
+/* { dg-final { scan-assembler-times "\\tsshll\\tv\[0-9\]+\.4s" 1 } } */
+
+int32x4_t
+test_vshll_n_s16 (int16x4_t __a)
+{
+ return vshll_n_s16 (__a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tushll\\tv\[0-9\]+\.4s" 1 } } */
+
+uint32x4_t
+test_vshll_n_u16 (uint16x4_t __a)
+{
+ return vshll_n_u16 (__a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tshll\\tv\[0-9\]+\.4s" 2 } } */
+
+int32x4_t
+test_vshll_n_s16_2 (int16x4_t __a)
+{
+ return vshll_n_s16 (__a, 16);
+}
+
+uint32x4_t
+test_vshll_n_u16_2 (uint16x4_t __a)
+{
+ return vshll_n_u16 (__a, 16);
+}
+
+/* { dg-final { scan-assembler-times "\\tsshll\\tv\[0-9\]+\.8h" 1 } } */
+
+int16x8_t
+test_vshll_n_s8 (int8x8_t __a)
+{
+ return vshll_n_s8 (__a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tushll\\tv\[0-9\]+\.8h" 1 } } */
+
+uint16x8_t
+test_vshll_n_u8 (uint8x8_t __a)
+{
+ return vshll_n_u8 (__a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tshll\\tv\[0-9\]+\.8h" 2 } } */
+
+int16x8_t
+test_vshll_n_s8_2 (int8x8_t __a)
+{
+ return vshll_n_s8 (__a, 8);
+}
+
+uint16x8_t
+test_vshll_n_u8_2 (uint8x8_t __a)
+{
+ return vshll_n_u8 (__a, 8);
+}
+
+/* { dg-final { scan-assembler-times "\\tsshll2\\tv\[0-9\]+\.2d" 1 } } */
+
+int64x2_t
+test_vshll_high_n_s32 (int32x4_t __a)
+{
+ return vshll_high_n_s32 (__a, 9);
+}
+
+/* { dg-final { scan-assembler-times "\\tushll2\\tv\[0-9\]+\.2d" 1 } } */
+
+uint64x2_t
+test_vshll_high_n_u32 (uint32x4_t __a)
+{
+ return vshll_high_n_u32 (__a, 9);
+}
+
+/* { dg-final { scan-assembler-times "\\tshll2\\tv\[0-9\]+\.2d" 2 } } */
+
+int64x2_t
+test_vshll_high_n_s32_2 (int32x4_t __a)
+{
+ return vshll_high_n_s32 (__a, 32);
+}
+
+uint64x2_t
+test_vshll_high_n_u32_2 (uint32x4_t __a)
+{
+ return vshll_high_n_u32 (__a, 32);
+}
+
+/* { dg-final { scan-assembler-times "\\tsshll2\\tv\[0-9\]+\.4s" 1 } } */
+
+int32x4_t
+test_vshll_high_n_s16 (int16x8_t __a)
+{
+ return vshll_high_n_s16 (__a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tushll2\\tv\[0-9\]+\.4s" 1 } } */
+
+uint32x4_t
+test_vshll_high_n_u16 (uint16x8_t __a)
+{
+ return vshll_high_n_u16 (__a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tshll2\\tv\[0-9\]+\.4s" 2 } } */
+
+int32x4_t
+test_vshll_high_n_s16_2 (int16x8_t __a)
+{
+ return vshll_high_n_s16 (__a, 16);
+}
+
+uint32x4_t
+test_vshll_high_n_u16_2 (uint16x8_t __a)
+{
+ return vshll_high_n_u16 (__a, 16);
+}
+
+/* { dg-final { scan-assembler-times "\\tsshll2\\tv\[0-9\]+\.8h" 1 } } */
+
+int16x8_t
+test_vshll_high_n_s8 (int8x16_t __a)
+{
+ return vshll_high_n_s8 (__a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tushll2\\tv\[0-9\]+\.8h" 1 } } */
+
+uint16x8_t
+test_vshll_high_n_u8 (uint8x16_t __a)
+{
+ return vshll_high_n_u8 (__a, 3);
+}
+
+/* { dg-final { scan-assembler-times "\\tshll2\\tv\[0-9\]+\.8h" 2 } } */
+
+int16x8_t
+test_vshll_high_n_s8_2 (int8x16_t __a)
+{
+ return vshll_high_n_s8 (__a, 8);
+}
+
+uint16x8_t
+test_vshll_high_n_u8_2 (uint8x16_t __a)
+{
+ return vshll_high_n_u8 (__a, 8);
+}
===================================================================
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#define GPF float
+#define SUFFIX(x) x##f
+
+#include "frint.x"
+
+/* { dg-final { scan-assembler-times "frintz\ts\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "frintp\ts\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "frintm\ts\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "frinti\ts\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "frinta\ts\[0-9\]" 2 } } */
===================================================================
@@ -0,0 +1,138 @@
+
+/* { dg-do run } */
+/* { dg-options "-O3" } */
+
+#include "limits.h"
+
+extern void abort (void);
+
+#define N 16
+
+#include "vect-mull.x"
+
+#define SET_VEC(size, type, sign) \
+ void set_vector_##sign##size \
+ (pR##sign##INT##size b, \
+ pR##sign##INT##size c) \
+ { \
+ int i; \
+ for (i=0; i<N; i++) \
+ { \
+ b[i] = (type)((INT_MAX >> (32 - size)) - i); \
+ c[i] = (type)((INT_MAX >> (32 - size)) - i * 2); \
+ } \
+ }
+
+#define CHECK_VEC(size, sign) void check_vector_##sign##size (pR##sign##INT##size a, \
+ pR##sign##INT##size b) \
+ { \
+ int i; \
+ for (i=0; i<N; i++) \
+ if (a[i] != b[i]) \
+ abort (); \
+ }
+
+SET_VEC (8, signed char, S)
+SET_VEC (16, signed short, S)
+SET_VEC (32, signed int, S)
+
+SET_VEC (8, unsigned char, U)
+SET_VEC (16, unsigned short, U)
+SET_VEC (32, unsigned int, U)
+
+DEF_MULL2 (DEF_MULLB)
+DEF_MULL2 (DEF_MULLH)
+DEF_MULL2 (DEF_MULLS)
+
+CHECK_VEC (8, S)
+CHECK_VEC (8, U)
+CHECK_VEC (16, S)
+CHECK_VEC (16, U)
+CHECK_VEC (32, S)
+CHECK_VEC (32, U)
+CHECK_VEC (64, S)
+CHECK_VEC (64, U)
+
+int main (void)
+{
+
+#define DECL_VAR(name) signed char name##_S8[N]; \
+ signed short name##_S16[N]; \
+ signed int name##_S32[N]; \
+ unsigned char name##_U8[N]; \
+ unsigned short name##_U16[N]; \
+ unsigned int name##_U32[N];
+
+ DECL_VAR (output);
+ signed long long output_S64[N];
+ unsigned long long output_U64[N];
+
+ DECL_VAR (input1);
+ DECL_VAR (input2);
+
+ signed short expected_S16[] =
+ { 16129, 15750, 15375, 15004, 14637, 14274, 13915, 13560,
+ 13209, 12862, 12519, 12180, 11845, 11514, 11187, 10864 };
+
+ signed int expected_S32[] =
+ { 1073676289, 1073577990, 1073479695, 1073381404, 1073283117,
+ 1073184834, 1073086555, 1072988280, 1072890009, 1072791742,
+ 1072693479, 1072595220, 1072496965, 1072398714, 1072300467,
+ 1072202224 };
+
+ signed long long expected_S64[] =
+ { 4611686014132420609LL, 4611686007689969670LL,
+ 4611686001247518735LL, 4611685994805067804LL,
+ 4611685988362616877LL, 4611685981920165954LL,
+ 4611685975477715035LL, 4611685969035264120LL,
+ 4611685962592813209LL, 4611685956150362302LL,
+ 4611685949707911399LL, 4611685943265460500LL,
+ 4611685936823009605LL, 4611685930380558714LL,
+ 4611685923938107827LL, 4611685917495656944LL };
+
+ unsigned short expected_U16[] =
+ { 16129, 15750, 15375, 15004, 14637, 14274, 13915, 13560,
+ 13209, 12862, 12519, 12180, 11845, 11514, 11187, 10864 };
+
+ unsigned int expected_U32[] =
+ { 1073676289, 1073577990, 1073479695, 1073381404, 1073283117,
+ 1073184834, 1073086555, 1072988280, 1072890009, 1072791742,
+ 1072693479, 1072595220, 1072496965, 1072398714, 1072300467,
+ 1072202224 };
+
+ unsigned long long expected_U64[] =
+ { 4611686014132420609ULL, 4611686007689969670ULL,
+ 4611686001247518735ULL, 4611685994805067804ULL,
+ 4611685988362616877ULL, 4611685981920165954ULL,
+ 4611685975477715035ULL, 4611685969035264120ULL,
+ 4611685962592813209ULL, 4611685956150362302ULL,
+ 4611685949707911399ULL, 4611685943265460500ULL,
+ 4611685936823009605ULL, 4611685930380558714ULL,
+ 4611685923938107827ULL, 4611685917495656944ULL };
+
+ /* Set up input. */
+ set_vector_S8 (input1_S8, input2_S8);
+ set_vector_S16 (input1_S16, input2_S16);
+ set_vector_S32 (input1_S32, input2_S32);
+ set_vector_U8 (input1_U8, input2_U8);
+ set_vector_U16 (input1_U16, input2_U16);
+ set_vector_U32 (input1_U32, input2_U32);
+
+ /* Calculate actual results. */
+ widen_mult_Sb (output_S16, input1_S8, input2_S8);
+ widen_mult_Sh (output_S32, input1_S16, input2_S16);
+ widen_mult_Ss (output_S64, input1_S32, input2_S32);
+ widen_mult_Ub (output_U16, input1_U8, input2_U8);
+ widen_mult_Uh (output_U32, input1_U16, input2_U16);
+ widen_mult_Us (output_U64, input1_U32, input2_U32);
+
+ /* Check actual vs. expected. */
+ check_vector_S16 (expected_S16, output_S16);
+ check_vector_S32 (expected_S32, output_S32);
+ check_vector_S64 (expected_S64, output_S64);
+ check_vector_U16 (expected_U16, output_U16);
+ check_vector_U32 (expected_U32, output_U32);
+ check_vector_U64 (expected_U64, output_U64);
+
+ return 0;
+}
===================================================================
@@ -0,0 +1,23 @@
+
+typedef float *__restrict__ pRF32;
+typedef double *__restrict__ pRF64;
+
+float addv_f32 (pRF32 a)
+{
+ int i;
+ float s = 0.0;
+ for (i=0; i<16; i++)
+ s += a[i];
+
+ return s;
+}
+
+double addv_f64 (pRF64 a)
+{
+ int i;
+ double s = 0.0;
+ for (i=0; i<16; i++)
+ s += a[i];
+
+ return s;
+}
===================================================================
@@ -0,0 +1,7 @@
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -ffast-math" } */
+
+#include "vect-faddv.x"
+
+/* { dg-final { scan-assembler-times "faddp\\tv" 2} } */
===================================================================
@@ -0,0 +1,439 @@
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+
+#include "arm_neon.h"
+
+int8x8_t
+tbl_tests8_ (int8x8_t tab, int8x8_t idx)
+{
+ return vtbl1_s8 (tab, idx);
+}
+
+uint8x8_t
+tbl_testu8_ (uint8x8_t tab, uint8x8_t idx)
+{
+ return vtbl1_u8 (tab, idx);
+}
+
+poly8x8_t
+tbl_testp8_ (poly8x8_t tab, uint8x8_t idx)
+{
+ return vtbl1_p8 (tab, idx);
+}
+
+int8x8_t
+tbl_tests8_2 (int8x8x2_t tab, int8x8_t idx)
+{
+ return vtbl2_s8 (tab, idx);
+}
+
+uint8x8_t
+tbl_testu8_2 (uint8x8x2_t tab, uint8x8_t idx)
+{
+ return vtbl2_u8 (tab, idx);
+}
+
+poly8x8_t
+tbl_testp8_2 (poly8x8x2_t tab, uint8x8_t idx)
+{
+ return vtbl2_p8 (tab, idx);
+}
+
+int8x8_t
+tbl_tests8_3 (int8x8x3_t tab, int8x8_t idx)
+{
+ return vtbl3_s8 (tab, idx);
+}
+
+uint8x8_t
+tbl_testu8_3 (uint8x8x3_t tab, uint8x8_t idx)
+{
+ return vtbl3_u8 (tab, idx);
+}
+
+poly8x8_t
+tbl_testp8_3 (poly8x8x3_t tab, uint8x8_t idx)
+{
+ return vtbl3_p8 (tab, idx);
+}
+
+int8x8_t
+tbl_tests8_4 (int8x8x4_t tab, int8x8_t idx)
+{
+ return vtbl4_s8 (tab, idx);
+}
+
+uint8x8_t
+tbl_testu8_4 (uint8x8x4_t tab, uint8x8_t idx)
+{
+ return vtbl4_u8 (tab, idx);
+}
+
+poly8x8_t
+tbl_testp8_4 (poly8x8x4_t tab, uint8x8_t idx)
+{
+ return vtbl4_p8 (tab, idx);
+}
+
+int8x8_t
+tb_tests8_ (int8x8_t r, int8x8_t tab, int8x8_t idx)
+{
+ return vtbx1_s8 (r, tab, idx);
+}
+
+uint8x8_t
+tb_testu8_ (uint8x8_t r, uint8x8_t tab, uint8x8_t idx)
+{
+ return vtbx1_u8 (r, tab, idx);
+}
+
+poly8x8_t
+tb_testp8_ (poly8x8_t r, poly8x8_t tab, uint8x8_t idx)
+{
+ return vtbx1_p8 (r, tab, idx);
+}
+
+int8x8_t
+tb_tests8_2 (int8x8_t r, int8x8x2_t tab, int8x8_t idx)
+{
+ return vtbx2_s8 (r, tab, idx);
+}
+
+uint8x8_t
+tb_testu8_2 (uint8x8_t r, uint8x8x2_t tab, uint8x8_t idx)
+{
+ return vtbx2_u8 (r, tab, idx);
+}
+
+poly8x8_t
+tb_testp8_2 (poly8x8_t r, poly8x8x2_t tab, uint8x8_t idx)
+{
+ return vtbx2_p8 (r, tab, idx);
+}
+
+int8x8_t
+tb_tests8_3 (int8x8_t r, int8x8x3_t tab, int8x8_t idx)
+{
+ return vtbx3_s8 (r, tab, idx);
+}
+
+uint8x8_t
+tb_testu8_3 (uint8x8_t r, uint8x8x3_t tab, uint8x8_t idx)
+{
+ return vtbx3_u8 (r, tab, idx);
+}
+
+poly8x8_t
+tb_testp8_3 (poly8x8_t r, poly8x8x3_t tab, uint8x8_t idx)
+{
+ return vtbx3_p8 (r, tab, idx);
+}
+
+int8x8_t
+tb_tests8_4 (int8x8_t r, int8x8x4_t tab, int8x8_t idx)
+{
+ return vtbx4_s8 (r, tab, idx);
+}
+
+uint8x8_t
+tb_testu8_4 (uint8x8_t r, uint8x8x4_t tab, uint8x8_t idx)
+{
+ return vtbx4_u8 (r, tab, idx);
+}
+
+poly8x8_t
+tb_testp8_4 (poly8x8_t r, poly8x8x4_t tab, uint8x8_t idx)
+{
+ return vtbx4_p8 (r, tab, idx);
+}
+
+int8x8_t
+qtbl_tests8_ (int8x16_t tab, int8x8_t idx)
+{
+ return vqtbl1_s8 (tab, idx);
+}
+
+uint8x8_t
+qtbl_testu8_ (uint8x16_t tab, uint8x8_t idx)
+{
+ return vqtbl1_u8 (tab, idx);
+}
+
+poly8x8_t
+qtbl_testp8_ (poly8x16_t tab, uint8x8_t idx)
+{
+ return vqtbl1_p8 (tab, idx);
+}
+
+int8x8_t
+qtbl_tests8_2 (int8x16x2_t tab, int8x8_t idx)
+{
+ return vqtbl2_s8 (tab, idx);
+}
+
+uint8x8_t
+qtbl_testu8_2 (uint8x16x2_t tab, uint8x8_t idx)
+{
+ return vqtbl2_u8 (tab, idx);
+}
+
+poly8x8_t
+qtbl_testp8_2 (poly8x16x2_t tab, uint8x8_t idx)
+{
+ return vqtbl2_p8 (tab, idx);
+}
+
+int8x8_t
+qtbl_tests8_3 (int8x16x3_t tab, int8x8_t idx)
+{
+ return vqtbl3_s8 (tab, idx);
+}
+
+uint8x8_t
+qtbl_testu8_3 (uint8x16x3_t tab, uint8x8_t idx)
+{
+ return vqtbl3_u8 (tab, idx);
+}
+
+poly8x8_t
+qtbl_testp8_3 (poly8x16x3_t tab, uint8x8_t idx)
+{
+ return vqtbl3_p8 (tab, idx);
+}
+
+int8x8_t
+qtbl_tests8_4 (int8x16x4_t tab, int8x8_t idx)
+{
+ return vqtbl4_s8 (tab, idx);
+}
+
+uint8x8_t
+qtbl_testu8_4 (uint8x16x4_t tab, uint8x8_t idx)
+{
+ return vqtbl4_u8 (tab, idx);
+}
+
+poly8x8_t
+qtbl_testp8_4 (poly8x16x4_t tab, uint8x8_t idx)
+{
+ return vqtbl4_p8 (tab, idx);
+}
+
+int8x8_t
+qtb_tests8_ (int8x8_t r, int8x16_t tab, int8x8_t idx)
+{
+ return vqtbx1_s8 (r, tab, idx);
+}
+
+uint8x8_t
+qtb_testu8_ (uint8x8_t r, uint8x16_t tab, uint8x8_t idx)
+{
+ return vqtbx1_u8 (r, tab, idx);
+}
+
+poly8x8_t
+qtb_testp8_ (poly8x8_t r, poly8x16_t tab, uint8x8_t idx)
+{
+ return vqtbx1_p8 (r, tab, idx);
+}
+
+int8x8_t
+qtb_tests8_2 (int8x8_t r, int8x16x2_t tab, int8x8_t idx)
+{
+ return vqtbx2_s8 (r, tab, idx);
+}
+
+uint8x8_t
+qtb_testu8_2 (uint8x8_t r, uint8x16x2_t tab, uint8x8_t idx)
+{
+ return vqtbx2_u8 (r, tab, idx);
+}
+
+poly8x8_t
+qtb_testp8_2 (poly8x8_t r, poly8x16x2_t tab, uint8x8_t idx)
+{
+ return vqtbx2_p8 (r, tab, idx);
+}
+
+int8x8_t
+qtb_tests8_3 (int8x8_t r, int8x16x3_t tab, int8x8_t idx)
+{
+ return vqtbx3_s8 (r, tab, idx);
+}
+
+uint8x8_t
+qtb_testu8_3 (uint8x8_t r, uint8x16x3_t tab, uint8x8_t idx)
+{
+ return vqtbx3_u8 (r, tab, idx);
+}
+
+poly8x8_t
+qtb_testp8_3 (poly8x8_t r, poly8x16x3_t tab, uint8x8_t idx)
+{
+ return vqtbx3_p8 (r, tab, idx);
+}
+
+int8x8_t
+qtb_tests8_4 (int8x8_t r, int8x16x4_t tab, int8x8_t idx)
+{
+ return vqtbx4_s8 (r, tab, idx);
+}
+
+uint8x8_t
+qtb_testu8_4 (uint8x8_t r, uint8x16x4_t tab, uint8x8_t idx)
+{
+ return vqtbx4_u8 (r, tab, idx);
+}
+
+poly8x8_t
+qtb_testp8_4 (poly8x8_t r, poly8x16x4_t tab, uint8x8_t idx)
+{
+ return vqtbx4_p8 (r, tab, idx);
+}
+
+int8x16_t
+qtblq_tests8_ (int8x16_t tab, int8x16_t idx)
+{
+ return vqtbl1q_s8 (tab, idx);
+}
+
+uint8x16_t
+qtblq_testu8_ (uint8x16_t tab, uint8x16_t idx)
+{
+ return vqtbl1q_u8 (tab, idx);
+}
+
+poly8x16_t
+qtblq_testp8_ (poly8x16_t tab, uint8x16_t idx)
+{
+ return vqtbl1q_p8 (tab, idx);
+}
+
+int8x16_t
+qtblq_tests8_2 (int8x16x2_t tab, int8x16_t idx)
+{
+ return vqtbl2q_s8 (tab, idx);
+}
+
+uint8x16_t
+qtblq_testu8_2 (uint8x16x2_t tab, uint8x16_t idx)
+{
+ return vqtbl2q_u8 (tab, idx);
+}
+
+poly8x16_t
+qtblq_testp8_2 (poly8x16x2_t tab, uint8x16_t idx)
+{
+ return vqtbl2q_p8 (tab, idx);
+}
+
+int8x16_t
+qtblq_tests8_3 (int8x16x3_t tab, int8x16_t idx)
+{
+ return vqtbl3q_s8 (tab, idx);
+}
+
+uint8x16_t
+qtblq_testu8_3 (uint8x16x3_t tab, uint8x16_t idx)
+{
+ return vqtbl3q_u8 (tab, idx);
+}
+
+poly8x16_t
+qtblq_testp8_3 (poly8x16x3_t tab, uint8x16_t idx)
+{
+ return vqtbl3q_p8 (tab, idx);
+}
+
+int8x16_t
+qtblq_tests8_4 (int8x16x4_t tab, int8x16_t idx)
+{
+ return vqtbl4q_s8 (tab, idx);
+}
+
+uint8x16_t
+qtblq_testu8_4 (uint8x16x4_t tab, uint8x16_t idx)
+{
+ return vqtbl4q_u8 (tab, idx);
+}
+
+poly8x16_t
+qtblq_testp8_4 (poly8x16x4_t tab, uint8x16_t idx)
+{
+ return vqtbl4q_p8 (tab, idx);
+}
+
+int8x16_t
+qtbxq_tests8_ (int8x16_t r, int8x16_t tab, int8x16_t idx)
+{
+ return vqtbx1q_s8 (r, tab, idx);
+}
+
+uint8x16_t
+qtbxq_testu8_ (uint8x16_t r, uint8x16_t tab, uint8x16_t idx)
+{
+ return vqtbx1q_u8 (r, tab, idx);
+}
+
+poly8x16_t
+qtbxq_testp8_ (poly8x16_t r, poly8x16_t tab, uint8x16_t idx)
+{
+ return vqtbx1q_p8 (r, tab, idx);
+}
+
+int8x16_t
+qtbxq_tests8_2 (int8x16_t r, int8x16x2_t tab, int8x16_t idx)
+{
+ return vqtbx2q_s8 (r, tab, idx);
+}
+
+uint8x16_t
+qtbxq_testu8_2 (uint8x16_t r, uint8x16x2_t tab, uint8x16_t idx)
+{
+ return vqtbx2q_u8 (r, tab, idx);
+}
+
+poly8x16_t
+qtbxq_testp8_2 (poly8x16_t r, poly8x16x2_t tab, uint8x16_t idx)
+{
+ return vqtbx2q_p8 (r, tab, idx);
+}
+
+int8x16_t
+qtbxq_tests8_3 (int8x16_t r, int8x16x3_t tab, int8x16_t idx)
+{
+ return vqtbx3q_s8 (r, tab, idx);
+}
+
+uint8x16_t
+qtbxq_testu8_3 (uint8x16_t r, uint8x16x3_t tab, uint8x16_t idx)
+{
+ return vqtbx3q_u8 (r, tab, idx);
+}
+
+poly8x16_t
+qtbxq_testp8_3 (poly8x16_t r, poly8x16x3_t tab, uint8x16_t idx)
+{
+ return vqtbx3q_p8 (r, tab, idx);
+}
+
+int8x16_t
+qtbxq_tests8_4 (int8x16_t r, int8x16x4_t tab, int8x16_t idx)
+{
+ return vqtbx4q_s8 (r, tab, idx);
+}
+
+uint8x16_t
+qtbxq_testu8_4 (uint8x16_t r, uint8x16x4_t tab, uint8x16_t idx)
+{
+ return vqtbx4q_u8 (r, tab, idx);
+}
+
+poly8x16_t
+qtbxq_testp8_4 (poly8x16_t r, poly8x16x4_t tab, uint8x16_t idx)
+{
+ return vqtbx4q_p8 (r, tab, idx);
+}
+
+/* { dg-final { scan-assembler-times "tbl v" 42} } */
+/* { dg-final { scan-assembler-times "tbx v" 30} } */
===================================================================
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+extern double fma (double, double, double);
+extern float fmaf (float, float, float);
+
+double test1 (double x, double y, double z)
+{
+ return fma (x, y, z);
+}
+
+float test2 (float x, float y, float z)
+{
+ return fmaf (x, y, z);
+}
+
+/* { dg-final { scan-assembler-times "fmadd\td\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "fmadd\ts\[0-9\]" 1 } } */
===================================================================
@@ -0,0 +1,66 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcmodel=large -fno-builtin" } */
+/* { dg-skip-if "-mcmodel=large -fPIC not currently supported" { aarch64-*-* } { "-fPIC" } { "" } } */
+
+typedef long unsigned int size_t;
+typedef unsigned short int sa_family_t;
+
+struct sockaddr
+{
+ sa_family_t sa_family;
+ char sa_data[14];
+};
+struct arpreq
+{
+ int arp_flags;
+ struct sockaddr arp_netmask;
+};
+typedef struct _IO_FILE FILE;
+extern char *fgets (char *__restrict __s, int __n, FILE *__restrict __stream);
+extern struct _IO_FILE *stderr;
+extern int optind;
+struct aftype {
+ int (*input) (int type, char *bufp, struct sockaddr *);
+};
+struct aftype *ap;
+static int arp_set(char **args)
+{
+ char host[128];
+ struct arpreq req;
+ struct sockaddr sa;
+ memset((char *) &req, 0, sizeof(req));
+ if (*args == ((void *)0)) {
+ fprintf(stderr, ("arp: need host name\n"));
+ }
+ safe_strncpy(host, *args++, (sizeof host));
+ if (ap->input(0, host, &sa) < 0) {
+ }
+ while (*args != ((void *)0)) {
+ if (!__extension__ ({ size_t __s1_len, __s2_len; (__builtin_constant_p (*args) && __builtin_constant_p ("netmask") && (__s1_len = strlen (*args), __s2_len = strlen ("netmask"), (!((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) || __s1_len >= 4) && (!((size_t)(const void *)(("netmask") + 1) - (size_t)(const void *)("netmask") == 1) || __s2_len >= 4)) ? __builtin_strcmp (*args, "netmask") : (__builtin_constant_p (*args) && ((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) && (__s1_len = strlen (*args), __s1_len < 4) ? (__builtin_constant_p ("netmask") && ((size_t)(const void *)(("netmask") + 1) - (size_t)(const void *)("netmask") == 1) ? __builtin_strcmp (*args, "netmask") : (__extension__ ({ __const unsigned char *__s2 = (__const unsigned char *) (__const char *) ("netmask"); register int __result = (((__const unsigned char *) (__const char *) (*args))[0] - __s2[0]); if (__s1_len > 0 && __result == 0) { __result = (((__const unsigned char *) (__const char *) (*args))[1] - __s2[1]); if (__s1_len > 1 && __result == 0) { __result = (((__const unsigned char *) (__const char *) (*args))[2] - __s2[2]); if (__s1_len > 2 && __result == 0) __result = (((__const unsigned char *) (__const char *) (*args))[3] - __s2[3]); } } __result; }))) : (__builtin_constant_p ("netmask") && ((size_t)(const void *)(("netmask") + 1) - (size_t)(const void *)("netmask") == 1) && (__s2_len = strlen ("netmask"), __s2_len < 4) ? (__builtin_constant_p (*args) && ((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) ? __builtin_strcmp (*args, "netmask") : (__extension__ ({ __const unsigned char *__s1 = (__const unsigned char *) (__const char *) (*args); register int __result = __s1[0] - ((__const unsigned char *) (__const char *) ("netmask"))[0]; if (__s2_len > 0 && __result == 0) { __result = (__s1[1] - ((__const unsigned char *) (__const char *) ("netmask"))[1]); if (__s2_len > 1 && __result == 0) { __result = (__s1[2] - ((__const unsigned char *) (__const char *) ("netmask"))[2]); if (__s2_len > 2 && __result == 0) __result = (__s1[3] - ((__const unsigned char *) (__const char *) ("netmask"))[3]); } } __result; }))) : __builtin_strcmp (*args, "netmask")))); })) {
+ if (__extension__ ({ size_t __s1_len, __s2_len; (__builtin_constant_p (*args) && __builtin_constant_p ("255.255.255.255") && (__s1_len = strlen (*args), __s2_len = strlen ("255.255.255.255"), (!((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) || __s1_len >= 4) && (!((size_t)(const void *)(("255.255.255.255") + 1) - (size_t)(const void *)("255.255.255.255") == 1) || __s2_len >= 4)) ? __builtin_strcmp (*args, "255.255.255.255") : (__builtin_constant_p (*args) && ((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) && (__s1_len = strlen (*args), __s1_len < 4) ? (__builtin_constant_p ("255.255.255.255") && ((size_t)(const void *)(("255.255.255.255") + 1) - (size_t)(const void *)("255.255.255.255") == 1) ? __builtin_strcmp (*args, "255.255.255.255") : (__extension__ ({ __const unsigned char *__s2 = (__const unsigned char *) (__const char *) ("255.255.255.255"); register int __result = (((__const unsigned char *) (__const char *) (*args))[0] - __s2[0]); if (__s1_len > 0 && __result == 0) { __result = (((__const unsigned char *) (__const char *) (*args))[1] - __s2[1]); if (__s1_len > 1 && __result == 0) { __result = (((__const unsigned char *) (__const char *) (*args))[2] - __s2[2]); if (__s1_len > 2 && __result == 0) __result = (((__const unsigned char *) (__const char *) (*args))[3] - __s2[3]); } } __result; }))) : (__builtin_constant_p ("255.255.255.255") && ((size_t)(const void *)(("255.255.255.255") + 1) - (size_t)(const void *)("255.255.255.255") == 1) && (__s2_len = strlen ("255.255.255.255"), __s2_len < 4) ? (__builtin_constant_p (*args) && ((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) ? __builtin_strcmp (*args, "255.255.255.255") : (__extension__ ({ __const unsigned char *__s1 = (__const unsigned char *) (__const char *) (*args); register int __result = __s1[0] - ((__const unsigned char *) (__const char *) ("255.255.255.255"))[0]; if (__s2_len > 0 && __result == 0) { __result = (__s1[1] - ((__const unsigned char *) (__const char *) ("255.255.255.255"))[1]); if (__s2_len > 1 && __result == 0) { __result = (__s1[2] - ((__const unsigned char *) (__const char *) ("255.255.255.255"))[2]); if (__s2_len > 2 && __result == 0) __result = (__s1[3] - ((__const unsigned char *) (__const char *) ("255.255.255.255"))[3]); } } __result; }))) : __builtin_strcmp (*args, "255.255.255.255")))); }) != 0) {
+ memcpy((char *) &req.arp_netmask, (char *) &sa,
+ sizeof(struct sockaddr));
+ }
+ }
+ }
+}
+static int arp_file(char *name)
+{
+ char buff[1024];
+ char *sp, *args[32];
+ int linenr, argc;
+ FILE *fp;
+ while (fgets(buff, sizeof(buff), fp) != (char *) ((void *)0)) {
+ if (arp_set(args) != 0)
+ fprintf(stderr, ("arp: cannot set entry on line %u on line %u of etherfile %s !\n"),
+ linenr, name);
+ }
+}
+int main(int argc, char **argv)
+{
+ int i, lop, what;
+ switch (what) {
+ case 0:
+ what = arp_file(argv[optind] ? argv[optind] : "/etc/ethers");
+ }
+}
===================================================================
@@ -0,0 +1,15 @@
+
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+
+typedef struct
+{
+ int i;
+ int y;
+} __attribute__ ((aligned (16))) struct64_t;
+
+void foo ()
+{
+ struct64_t tmp;
+ asm volatile ("ldr q0, %[value]" : : [value]"m"(tmp));
+}
===================================================================
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+typedef struct {
+ char a:1;
+ char b:7;
+ int c;
+} BitStruct;
+
+volatile BitStruct bits;
+
+int foo ()
+{
+ return bits.b;
+}
+
+/* { dg-final { scan-assembler "ldrb\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" } } */
===================================================================
@@ -0,0 +1,5 @@
+if { [istarget aarch64_be-*-*] } then {
+ return 1
+}
+
+return 0
===================================================================
@@ -0,0 +1,29 @@
+/* Test AAPCS64 layout and __builtin_va_arg.
+
+ Miscellaneous test: Anonymous arguments passed on the stack. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define AAPCS64_TEST_STDARG
+#define TESTFILE "va_arg-10.c"
+
+struct z
+{
+ double x[4];
+};
+
+double d1 = 25.0;
+double d2 = 103.0;
+struct z a = { 5.0, 6.0, 7.0, 8.0 };
+struct z b = { 9.0, 10.0, 11.0, 12.0 };
+
+#include "abitest.h"
+#else
+ ARG(struct z, a, D0, 0)
+ ARG(struct z, b, D4, LAST_NAMED_ARG_ID)
+ DOTS
+ ANON(double, d1, STACK, 2)
+ LAST_ANON(double, d2, STACK+8, 3)
+
+#endif
===================================================================
@@ -0,0 +1,60 @@
+/* Test AAPCS64 layout and __builtin_va_arg.
+
+ Pass by reference. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define AAPCS64_TEST_STDARG
+#define TESTFILE "va_arg-12.c"
+
+struct z
+{
+ char c;
+ short s;
+ int ia[4];
+};
+
+struct z a, b, c;
+
+#define HAS_DATA_INIT_FUNC
+void init_data ()
+{
+ a.c = 0x11;
+ a.s = 0x2222;
+ a.ia[0] = 0x33333333;
+ a.ia[1] = 0x44444444;
+ a.ia[2] = 0x55555555;
+ a.ia[3] = 0x66666666;
+
+ b.c = 0x77;
+ b.s = 0x8888;
+ b.ia[0] = 0x99999999;
+ b.ia[1] = 0xaaaaaaaa;
+ b.ia[2] = 0xbbbbbbbb;
+ b.ia[3] = 0xcccccccc;
+
+ c.c = 0xdd;
+ c.s = 0xeeee;
+ c.ia[0] = 0xffffffff;
+ c.ia[1] = 0x12121212;
+ c.ia[2] = 0x23232323;
+ c.ia[3] = 0x34343434;
+}
+
+#include "abitest.h"
+#else
+ PTR(struct z, a, X0, 0)
+ ARG(int, 0xdeadbeef, X1, 1)
+ ARG(int, 0xcafebabe, X2, 2)
+ ARG(int, 0xdeadbabe, X3, 3)
+ ARG(int, 0xcafebeef, X4, 4)
+ ARG(int, 0xbeefdead, X5, 5)
+ ARG(int, 0xbabecafe, X6, LAST_NAMED_ARG_ID)
+ DOTS
+ PTR_ANON(struct z, b, X7, 7)
+ PTR_ANON(struct z, c, STACK, 8)
+ ANON(int, 0xbabedead, STACK+8, 9)
+ LAST_ANON(double, 123.45, D0, 10)
+
+#endif
===================================================================
@@ -0,0 +1,21 @@
+/* Test AAPCS layout
+
+ Empty, i.e. zero-sized, small struct passing used to cause Internal Compiler
+ Error. */
+
+/* { dg-do compile { target aarch64*-*-* } } */
+
+struct AAAA
+{
+
+} aaaa;
+
+
+void named (int, struct AAAA);
+void unnamed (int, ...);
+
+void foo ()
+{
+ name (0, aaaa);
+ unnamed (0, aaaa);
+}
===================================================================
@@ -0,0 +1,34 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "test_11.c"
+
+__complex__ x = 1.0+2.0i;
+
+struct y
+{
+ int p;
+ int q;
+ int r;
+ int s;
+} v = { 1, 2, 3, 4 };
+
+struct z
+{
+ double x[4];
+};
+
+struct z a = { 5.0, 6.0, 7.0, 8.0 };
+struct z b = { 9.0, 10.0, 11.0, 12.0 };
+
+#include "abitest.h"
+#else
+ ARG(double, 11.0, D0)
+ DOTS
+ ANON(struct z, a, D1)
+ ANON(struct z, b, STACK)
+ LAST_ANON(double, 0.5, STACK+32)
+#endif
===================================================================
@@ -0,0 +1,16 @@
+/* Test AAPCS layout
+
+/* { dg-do compile { target aarch64*-*-* } } */
+
+#define vector __attribute__((vector_size(16)))
+
+void
+foo(int a, ...);
+
+int
+main(void)
+{
+ foo (1, (vector unsigned int){10,11,12,13},
+ 2, (vector unsigned int){20,21,22,23});
+ return 0;
+}
===================================================================
@@ -0,0 +1,34 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+
+#define TESTFILE "test_13.c"
+
+
+struct y
+{
+ int p;
+ int q;
+ int r;
+ int s;
+} v = { 1, 2, 3, 4 };
+
+struct z
+{
+ double x[4];
+};
+
+struct z a = { 5.0, 6.0, 7.0, 8.0 };
+struct z b = { 9.0, 10.0, 11.0, 12.0 };
+
+#include "abitest.h"
+#else
+ ARG(int, 7, W0)
+ ARG(struct y, v, X1)
+ ARG(struct z, a, D0)
+ ARG(double, 1.0, D4)
+ ARG(struct z, b, STACK)
+ LAST_ARG(double, 0.5, STACK+32)
+#endif
===================================================================
@@ -0,0 +1,20 @@
+/* { dg-do compile { target aarch64*-*-* } } */
+
+struct S
+{
+ union
+ {
+ long double b;
+ } a;
+};
+
+struct S s;
+
+extern struct S a[5];
+extern struct S check (struct S, struct S *, struct S);
+extern void checkx (struct S);
+
+void test (void)
+{
+ checkx (check (s, &a[1], a[2]));
+}
===================================================================
@@ -0,0 +1,17 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_int128.c"
+
+typedef int TItype __attribute__ ((mode (TI)));
+
+TItype x = 0xcafecafecafecfeacfeacfea;
+TItype y = 0xcfeacfeacfeacafecafecafe;
+
+#include "abitest.h"
+#else
+ ARG (TItype, x, X0)
+ LAST_ARG (TItype, y, X2)
+#endif
===================================================================
@@ -0,0 +1,21 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "test_15.c"
+
+#include "abitest.h"
+#else
+ ARG(double, 1.0, D0)
+ ARG(double, 2.0, D1)
+ ARG(double, 3.0, D2)
+ ARG(double, 4.0, D3)
+ ARG(double, 5.0, D4)
+ ARG(double, 6.0, D5)
+ ARG(double, 7.0, D6)
+ ARG(double, 8.0, D7)
+ ARG(double, 9.0, STACK)
+ LAST_ARG(double, 10.0, STACK+8)
+#endif
===================================================================
@@ -0,0 +1,37 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "test_17.c"
+
+__complex__ x = 1.0+2.0i;
+
+struct y
+{
+ int p;
+ int q;
+ int r;
+ int s;
+} v = { 1, 2, 3, 4 };
+
+struct z
+{
+ double x[4];
+};
+
+float f1 = 25.0;
+struct z a = { 5.0, 6.0, 7.0, 8.0 };
+struct z b = { 9.0, 10.0, 11.0, 12.0 };
+
+#include "abitest.h"
+#else
+ ARG(double, 11.0, D0)
+ DOTS
+ ANON(struct z, a, D1)
+ ANON(struct z, b, STACK)
+ ANON(int , 5, W0)
+ ANON(double, f1, STACK+32)
+ LAST_ANON(double, 0.5, STACK+40)
+#endif
===================================================================
@@ -0,0 +1,126 @@
+/* Test AAPCS64 layout.
+
+ Test the comformance to the alignment and padding requirements.
+
+ B.4 If the argument type is a Composite Type then the size of the
+ argument is rounded up to the nearest multiple of 8 bytes.
+ C.4 If the argument is an HFA, a Quad-precision Floating-point or Short
+ Vector Type then the NSAA is rounded up to the larger of 8 or the
+ Natural Alignment of the argument's type.
+ C.12 The NSAA is rounded up to the larger of 8 or the Natural Alignment
+ of the argument's type.
+ C.14 If the size of the argument is less than 8 bytes then the size of
+ the argument is set ot 8 bytes. The effect is as if the argument
+ was copied to the least significant bits of a 64-bit register and
+ the remaining bits filled with unspecified values. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_align-1.c"
+#include "type-def.h"
+
+struct y
+{
+ int p;
+ int q;
+ int r;
+ int s;
+};
+
+struct y v1 = { 1, 2, 3, 4 };
+struct y v2 = { 5, 6, 7, 8 };
+struct y v3 = { 9, 10, 11, 12 };
+struct y v4 = { 13, 14, 15, 16 };
+
+struct z
+{
+ double x[4];
+};
+
+struct z a = { 5.0, 6.0, 7.0, 8.0 };
+struct z b = { 9.0, 10.0, 11.0, 12.0 };
+
+vf4_t c = { 13.f, 14.f, 15.f, 16.f };
+
+struct x
+{
+ vf4_t v;
+} w;
+
+char ch='a';
+short sh=13;
+int i=14;
+long long ll=15;
+
+struct s1
+{
+ short sh[3];
+} s1;
+
+struct s2
+{
+ int i[2];
+ char c;
+} s2;
+
+struct ldx2_t
+{
+ long double ld[2];
+} ldx2 = { 12345.67890L, 23456.78901L };
+
+union u_t
+{
+ long double ld;
+ double d[2];
+} u;
+
+#define HAS_DATA_INIT_FUNC
+void init_data ()
+{
+ w.v = (vf4_t){ 17.f, 18.f, 19.f, 20.f };
+ s1.sh[0] = 16;
+ s1.sh[1] = 17;
+ s1.sh[2] = 18;
+ s2.i[0] = 19;
+ s2.i[1] = 20;
+ s2.c = 21;
+ u.ld = 34567.89012L;
+}
+
+#include "abitest.h"
+#else
+
+ ARG(struct y, v1, X0)
+ ARG(struct y, v2, X2)
+ ARG(struct y, v3, X4)
+ ARG(struct y, v4, X6)
+ ARG(struct z, a, D0)
+ ARG(struct z, b, D4)
+ ARG(double, 12.5, STACK)
+ ARG(vf4_t, c, STACK+16) /* [C.4] 16-byte aligned short vector */
+ ARG(double, 17.0, STACK+32)
+ ARG(struct x, w, STACK+48) /* [C.12] 16-byte aligned small struct */
+#ifndef __AAPCS64_BIG_ENDIAN__
+ ARG(char, ch, STACK+64) /* [C.14] char padded to the size of 8 bytes */
+ ARG(short, sh, STACK+72) /* [C.14] short padded to the size of 8 bytes */
+ ARG(int, i, STACK+80) /* [C.14] int padded to the size of 8 bytes */
+#else
+ ARG(char, ch, STACK+71)
+ ARG(short, sh, STACK+78)
+ ARG(int, i, STACK+84)
+#endif
+ ARG(long long, ll, STACK+88)
+ ARG(struct s1, s1, STACK+96) /* [B.4] small struct padded to the size of 8 bytes */
+ ARG(double, 18.0, STACK+104)
+ ARG(struct s2, s2, STACK+112) /* [B.4] small struct padded to the size of 16 bytes */
+ ARG(double, 19.0, STACK+128)
+ ARG(long double, 30.0L, STACK+144) /* [C.4] 16-byte aligned quad-precision */
+ ARG(double, 31.0, STACK+160)
+ ARG(struct ldx2_t, ldx2, STACK+176) /* [C.4] 16-byte aligned HFA */
+ ARG(double, 32.0, STACK+208)
+ ARG(__int128, 33, STACK+224) /* [C.12] 16-byte aligned 128-bit integer */
+ ARG(double, 34.0, STACK+240)
+ ARG(union u_t, u, STACK+256) /* [C.12] 16-byte aligned small composite (union in this case) */
+ LAST_ARG_NONFLAT (int, 35.0, STACK+272, i32in64)
+#endif
===================================================================
@@ -0,0 +1,35 @@
+/* Test AAPCS64 layout. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_19.c"
+
+struct y
+{
+ int p1;
+ int p2;
+ float q;
+ int r1;
+ int r2;
+ char x;
+} v = { -1, 1, 2.0f, 3, 18, 19, 20};
+
+struct z
+{
+ double x[4];
+};
+
+struct z a = { 5.0, 6.0, 7.0, 8.0 };
+struct z b = { 9.0, 10.0, 11.0, 12.0 };
+
+#include "abitest.h"
+#else
+ ARG(int, 7, W0)
+ DOTS
+ ANON(double, 4.0, D0)
+ ANON(struct z, a, D1)
+ ANON(struct z, b, STACK)
+ PTR_ANON(struct y, v, X1)
+ LAST_ANON(int, 10, W2)
+#endif
===================================================================
@@ -0,0 +1,46 @@
+/* Test AAPCS64 layout.
+
+ C.8 If the argument has an alignment of 16 then the NGRN is rounded up
+ the next even number.
+ C.9 If the argument is an Integral Type, the size of the argument is
+ equal to 16 and the NGRN is less than 7, the argument is copied
+ to x[NGRN] and x[NGRN+1]. x[NGRN] shall contain the lower addressed
+ double-word of the memory representation of the argument. The
+ NGRN is incremented by two. The argument has now been allocated.
+
+ The case of passing a 128-bit integer in two general registers is covered
+ in this test. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_align-3.c"
+#include "type-def.h"
+
+union int128_t qword;
+
+int gInt[4];
+
+#define HAS_DATA_INIT_FUNC
+void init_data ()
+{
+ /* Initialize the quadword integer via the union. */
+ qword.l64 = 0xDEADBEEFCAFEBABELL;
+ qword.h64 = 0x123456789ABCDEF0LL;
+
+ gInt[0] = 12345;
+ gInt[1] = 23456;
+ gInt[2] = 34567;
+ gInt[3] = 45678;
+}
+
+
+#include "abitest.h"
+#else
+ ARG(int, gInt[0], W0)
+ ARG(int, gInt[1], W1)
+ ARG(int, gInt[2], W2)
+ ARG(__int128, qword.i, X4)
+ LAST_ARG(int, gInt[3], W6)
+
+#endif
===================================================================
@@ -0,0 +1,50 @@
+/* Test AAPCS64 layout and __builtin_va_arg.
+
+ This test covers fundamental data types as specified in AAPCS64 \S 4.1.
+ It is focus on unnamed parameter passed in registers. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define AAPCS64_TEST_STDARG
+#define TESTFILE "va_arg-1.c"
+#include "type-def.h"
+
+vf2_t vf2 = (vf2_t){ 17.f, 18.f };
+vi4_t vi4 = (vi4_t){ 0xdeadbabe, 0xbabecafe, 0xcafebeef, 0xbeefdead };
+union int128_t qword;
+signed char sc = 0xed;
+signed int sc_promoted = 0xffffffed;
+signed short ss = 0xcba9;
+signed int ss_promoted = 0xffffcba9;
+float fp = 65432.12345f;
+double fp_promoted = (double)65432.12345f;
+
+#define HAS_DATA_INIT_FUNC
+void init_data ()
+{
+ /* Init signed quad-word integer. */
+ qword.l64 = 0xfdb9753102468aceLL;
+ qword.h64 = 0xeca8642013579bdfLL;
+}
+
+#include "abitest.h"
+#else
+ ARG ( int , 0xff , X0, LAST_NAMED_ARG_ID)
+ DOTS
+ ANON_PROMOTED(unsigned char , 0xfe , unsigned int, 0xfe , X1, 1)
+ ANON_PROMOTED( signed char , sc , signed int, sc_promoted, X2, 2)
+ ANON_PROMOTED(unsigned short , 0xdcba, unsigned int, 0xdcba , X3, 3)
+ ANON_PROMOTED( signed short , ss , signed int, ss_promoted, X4, 4)
+ ANON (unsigned int , 0xdeadbeef, X5, 5)
+ ANON ( signed int , 0xcafebabe, X6, 6)
+ ANON (unsigned long long, 0xba98765432101234ULL, X7, 7)
+ ANON ( signed long long, 0xa987654321012345LL , STACK, 8)
+ ANON ( __int128, qword.i , STACK+16, 9)
+ ANON_PROMOTED( float , fp , double, fp_promoted, D0, 10)
+ ANON ( double , 9876543.212345, D1, 11)
+ ANON ( long double , 98765432123456789.987654321L, Q2, 12)
+ ANON ( vf2_t, vf2 , D3, 13)
+ ANON ( vi4_t, vi4 , Q4, 14)
+ LAST_ANON ( int , 0xeeee, STACK+32,15)
+#endif
===================================================================
@@ -0,0 +1,101 @@
+/* This header file should be included for the purpose of function return
+ value testing. */
+
+#include "abitest-common.h"
+#include "validate_memory.h"
+
+void (*testfunc_ptr)(char* stack);
+
+/* Helper macros to generate function name. Example of the function name:
+ func_return_val_1. */
+#define FUNC_BASE_NAME func_return_val_
+#define FUNC_NAME_COMBINE(base,suffix) base ## suffix
+#define FUNC_NAME_1(base,suffix) FUNC_NAME_COMBINE(base,suffix)
+#define FUNC_NAME(suffix) FUNC_NAME_1(FUNC_BASE_NAME,suffix)
+#define TEST_FUNC_BASE_NAME testfunc_
+#define TEST_FUNC_NAME(suffix) FUNC_NAME_1(TEST_FUNC_BASE_NAME,suffix)
+
+#undef DUMP_STATUS
+#ifdef DUMP_ENABLED
+#define DUMP_STATUS(type,val) printf ("### Checking "#type" "#val"\n");
+#else
+#define DUMP_STATUS(type,val)
+#endif
+
+/* Generate code to do memcmp to check if the returned value is in the
+ correct location and has the expected value.
+ Note that for value that is returned in the caller-allocated memory
+ block, we get the address from the saved x8 register. x8 is saved
+ just after the callee is returned; we assume that x8 has not been
+ clobbered at then, although there is no requirement for the callee
+ preserve the value stored in x8. Luckily, all test cases here are
+ simple enough that x8 doesn't normally get clobbered (although not
+ guaranteed). */
+#undef FUNC_VAL_CHECK
+#define FUNC_VAL_CHECK(id, type, val, offset, layout) \
+void TEST_FUNC_NAME(id)(char* stack) \
+{ \
+ type __x = val; \
+ char* addr; \
+ DUMP_STATUS(type,val) \
+ if (offset != X8) \
+ addr = stack + offset; \
+ else \
+ addr = *(char **)(stack + X8); \
+ if (validate_memory (&__x, addr, sizeof (type), layout) != 0) \
+ abort(); \
+}
+
+/* Composite larger than 16 bytes is replaced by a pointer to a copy prepared
+ by the caller, so here we extrat the pointer, deref it and compare the
+ content with that of the original one. */
+#define PTR(type, val, offset, ...) { \
+ type * ptr; \
+ DUMP_ARG(type,val) \
+ ptr = *(type **)(stack + offset); \
+ if (memcmp (ptr, &val, sizeof (type)) != 0) abort (); \
+}
+
+#include TESTFILE
+
+MYFUNCTYPE myfunc () PCSATTR;
+
+/* Define the function to return VAL of type TYPE. I and D in the
+ parameter list are two dummy parameters to help improve the detection
+ of bugs like a short vector being returned in X0 after copied from V0. */
+#undef FUNC_VAL_CHECK
+#define FUNC_VAL_CHECK(id, type, var, offset, layout) \
+__attribute__ ((noinline)) type FUNC_NAME (id) (int i, double d, type t) \
+ { \
+ asm (""::"r" (i),"r" (d)); /* asm prevents function from getting \
+ optimized away. Using i and d prevents \
+ warnings about unused parameters. \
+ */ \
+ return t; \
+ }
+#include TESTFILE
+
+
+/* Call the function to return value and call the checking function
+ to validate. See the comment above for the reason of having 0 and 0.0
+ in the function argument list. */
+#undef FUNC_VAL_CHECK
+#define FUNC_VAL_CHECK(id, type, var, offset, layout) \
+ { \
+ testfunc_ptr = TEST_FUNC_NAME(id); \
+ FUNC_NAME(id) (0, 0.0, var); \
+ myfunc (); \
+ }
+
+int main()
+{
+ which_kind_of_test = TK_RETURN;
+
+#ifdef HAS_DATA_INIT_FUNC
+ init_data ();
+#endif
+
+#include TESTFILE
+
+ return 0;
+}
===================================================================
@@ -0,0 +1,86 @@
+/* Test AAPCS64 layout and __builtin_va_arg.
+
+ This test covers most composite types as described in AAPCS64 \S 4.3.
+ Homogeneous floating-point aggregate types are covered in other tests. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define AAPCS64_TEST_STDARG
+#define TESTFILE "va_arg-3.c"
+#include "type-def.h"
+
+struct x0
+{
+ char ch;
+ int i;
+} y0 = { 'a', 12345 };
+
+struct x1
+{
+ int a;
+ int b;
+ int c;
+ int d;
+} y1 = { 0xdeadbeef, 0xcafebabe, 0x87654321, 0xabcedf975 };
+
+struct x2
+{
+ long long a;
+ long long b;
+ char ch;
+} y2 = { 0x12, 0x34, 0x56 };
+
+union x3
+{
+ char ch;
+ int i;
+ long long ll;
+} y3;
+
+union x4
+{
+ int i;
+ struct x2 y2;
+} y4;
+
+struct x5
+{
+ union int128_t qword;
+} y5;
+
+#define HAS_DATA_INIT_FUNC
+void init_data ()
+{
+ /* Init small union. */
+ y3.ll = 0xfedcba98LL;
+
+ /* Init big union. */
+ y4.y2.a = 0x78;
+ y4.y2.b = 0x89;
+ y4.y2.ch= 0x9a;
+
+ /* Init signed quad-word integer. */
+ y5.qword.l64 = 0xfdb9753102468aceLL;
+ y5.qword.h64 = 0xeca8642013579bdfLL;
+}
+
+#include "abitest.h"
+#else
+ ARG (float ,1.0f, S0, LAST_NAMED_ARG_ID)
+ DOTS
+ ANON (struct x0, y0, X0, 1)
+ ANON (struct x1, y1, X1, 2)
+ PTR_ANON (struct x2, y2, X3, 3)
+ ANON (union x3, y3, X4, 4)
+ PTR_ANON (union x4, y4, X5, 5)
+ ANON (struct x5, y5, X6, 6)
+ ANON (struct x0, y0, STACK, 7)
+ ANON (struct x1, y1, STACK+8, 8)
+ PTR_ANON (struct x2, y2, STACK+24, 9)
+ ANON (union x3, y3, STACK+32, 10)
+ PTR_ANON (union x4, y4, STACK+40, 11)
+ ANON (int , 1, STACK+48, 12)
+ ANON (struct x5, y5, STACK+64, 13)
+ LAST_ANON(int , 2, STACK+80, 14)
+#endif
===================================================================
@@ -0,0 +1,31 @@
+/* Test AAPCS64 layout */
+
+/* C.7 If the argument is an Integral Type, the size of the argument is
+ less than or equal to 8 bytes and the NGRN is less than 8, the
+ argument is copied to the least significant bits in x[NGRN]. The
+ NGRN is incremented by one. The argument has now been allocated. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_1.c"
+/* TODO: review if we need this */
+#define RUNTIME_ENDIANNESS_CHECK
+#include "abitest.h"
+#else
+ ARG(int, 4, W0)
+ ARG(double, 4.0, D0)
+ ARG(int, 3, W1)
+ /* TODO: review the way of memcpy char, short, etc. */
+#ifndef __AAPCS64_BIG_ENDIAN__
+ ARG(char, 0xEF, X2)
+ ARG(short, 0xBEEF, X3)
+ ARG(int, 0xDEADBEEF, X4)
+#else
+ /* TODO: need the model/qemu to be big-endian as well */
+ ARG(char, 0xEF, X2+7)
+ ARG(short, 0xBEEF, X3+6)
+ ARG(int, 0xDEADBEEF, X4+4)
+#endif
+ LAST_ARG(long long, 0xDEADBEEFCAFEBABELL, X5)
+#endif
===================================================================
@@ -0,0 +1,18 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "test_3.c"
+
+__complex__ x = 1.0+2.0i;
+
+#include "abitest.h"
+#else
+ARG (float, 1.0f, S0)
+ARG (__complex__ double, x, D1)
+ARG (float, 2.0f, S3)
+ARG (double, 5.0, D4)
+LAST_ARG_NONFLAT (int, 3, X0, i32in64)
+#endif
===================================================================
@@ -0,0 +1,47 @@
+/* Test AAPCS64 layout and __builtin_va_arg.
+
+ This test is focus on certain unnamed homogeneous floating-point aggregate
+ types passed in fp/simd registers. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define AAPCS64_TEST_STDARG
+#define TESTFILE "va_arg-5.c"
+#include "type-def.h"
+
+struct hfa_fx1_t hfa_fx1 = {12.345f};
+struct hfa_fx2_t hfa_fx2 = {123.456f, 234.456f};
+struct hfa_dx2_t hfa_dx2 = {234.567, 345.678};
+struct hfa_dx4_t hfa_dx4 = {1234.123, 2345.234, 3456.345, 4567.456};
+struct hfa_ldx3_t hfa_ldx3 = {123456.7890, 234567.8901, 345678.9012};
+struct hfa_ffs_t hfa_ffs;
+union hfa_union_t hfa_union;
+
+#define HAS_DATA_INIT_FUNC
+void init_data ()
+{
+ hfa_union.s.a = 37.f;
+ hfa_union.s.b = 38.f;
+ hfa_union.c = 39.f;
+
+ hfa_ffs.a = 42.f;
+ hfa_ffs.b = 43.f;
+ hfa_ffs.c.a = 44.f;
+ hfa_ffs.c.b = 45.f;
+}
+
+#include "abitest.h"
+#else
+ ARG (int, 1, X0, LAST_NAMED_ARG_ID)
+ DOTS
+ /* HFA passed in fp/simd registers or on stack. */
+ ANON (struct hfa_dx4_t , hfa_dx4 , D0 , 0)
+ ANON (struct hfa_ldx3_t , hfa_ldx3 , Q4 , 1)
+ ANON (struct hfa_ffs_t , hfa_ffs , STACK , 2)
+ ANON (union hfa_union_t, hfa_union, STACK+16, 3)
+ ANON (struct hfa_fx1_t , hfa_fx1 , STACK+24, 4)
+ ANON (struct hfa_fx2_t , hfa_fx2 , STACK+32, 5)
+ ANON (struct hfa_dx2_t , hfa_dx2 , STACK+40, 6)
+ LAST_ANON(double , 1.0 , STACK+56, 7)
+#endif
===================================================================
@@ -0,0 +1,286 @@
+/* This header file defines a set of macros to be used in the construction
+ of parameter passing and/or va_arg code gen tests during the
+ pre-processing stage. It is included inside abitest.h.
+
+ The following macros are defined here:
+
+ LAST_ARG
+ ARG
+ DOTS
+ ANON
+ LAST_ANON
+ PTR
+ PTR_ANON
+ LAST_ANONPTR
+
+ These macros are given different definitions depending on which one of
+ the following macros is defined.
+
+ AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS
+ AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST
+ AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST
+ AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST
+ AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT
+ AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS
+ AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST
+
+ Do not define more than one of the above macros. */
+
+
+/* AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS
+ Define macros to check the incoming arguments. */
+
+#ifdef AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS
+
+#undef LAST_ARG
+#undef ARG
+#undef DOTS
+#undef ANON
+#undef LAST_ANON
+#undef PTR
+#undef PTR_ANON
+#undef LAST_ANONPTR
+#undef ANON_PROMOTED
+
+/* Generate memcmp to check if the incoming args have the expected values. */
+#define LAST_ARG_NONFLAT(type, val, offset, layout, ...) \
+{ \
+ type __x = val; \
+ DUMP_ARG(type,val); \
+ if (validate_memory (&__x, stack + offset, sizeof (type), layout) != 0) \
+ abort(); \
+}
+#define LAST_ARG(type,val,offset,...) LAST_ARG_NONFLAT (type, val, offset, \
+ flat,__VA_ARGS__)
+#define ARG_NONFLAT(type,val,offset,layout,...) LAST_ARG_NONFLAT (type, val, \
+ offset, \
+ layout, \
+ __VA_ARGS__)
+#define ARG(type,val,offset,...) LAST_ARG_NONFLAT(type, val, offset, \
+ flat, __VA_ARGS__)
+#define ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__)
+#define LAST_ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__)
+#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...) \
+ ANON(type_promoted, val_promoted, offset, __VA_ARGS__)
+/* Composite larger than 16 bytes is replaced by a pointer to a copy prepared
+ by the caller, so here we extrat the pointer, deref it and compare the
+ content with that of the original one. */
+#define PTR(type, val, offset, ...) { \
+ type * ptr; \
+ DUMP_ARG(type,val); \
+ ptr = *(type **)(stack + offset); \
+ if (memcmp (ptr, &val, sizeof (type)) != 0) abort (); \
+}
+#define PTR_ANON(type, val, offset, ...) PTR(type, val, offset, __VA_ARGS__)
+#define LAST_ANONPTR(type, val, offset, ...) PTR(type, val, offset, __VA_ARGS__)
+#define DOTS
+
+#endif /* AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS */
+
+
+/* AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST
+ Define macros to generate parameter type list. */
+
+#ifdef AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST
+
+#undef LAST_ARG
+#undef ARG
+#undef DOTS
+#undef ANON
+#undef LAST_ANON
+#undef PTR
+#undef PTR_ANON
+#undef LAST_ANONPTR
+
+/* Generate parameter type list (without identifiers). */
+#define LAST_ARG(type,val,offset) type
+#define LAST_ARG_NONFLAT(type, val, offset, layout) type
+#define ARG(type,val,offset) LAST_ARG(type, val, offset),
+#define ARG_NONFLAT(type, val, offset, layout) LAST_ARG (type, val, offset),
+#define DOTS ...
+#define ANON(type,val, offset)
+#define LAST_ANON(type,val, offset)
+#define PTR(type, val, offset) LAST_ARG(type, val, offset),
+#define PTR_ANON(type, val, offset)
+#define LAST_ANONPTR(type, val, offset)
+
+#endif /* AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST */
+
+
+/* AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST
+ Define macros to generate argument list. */
+
+#ifdef AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST
+
+#undef LAST_ARG
+#undef ARG
+#undef DOTS
+#undef ANON
+#undef LAST_ANON
+#undef PTR
+#undef PTR_ANON
+#undef LAST_ANONPTR
+#undef ANON_PROMOTED
+
+/* Generate the argument list; use VAL as the argument name. */
+#define LAST_ARG(type,val,offset,...) val
+#define LAST_ARG_NONFLAT(type,val,offset,layout,...) val
+#define ARG(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__),
+#define ARG_NONFLAT(type, val, offset, layout,...) LAST_ARG (type, val, \
+ offset, \
+ __VA_ARGS__),
+#define DOTS
+#define LAST_ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__)
+#define ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__),
+#define PTR(type, val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__),
+#define PTR_ANON(type, val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__),
+#define LAST_ANONPTR(type, val, offset,...) LAST_ARG(type, val, offset, __VA_ARGS__)
+#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...) \
+ LAST_ARG(type, val, offset, __VA_ARGS__),
+
+#endif /* AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST */
+
+
+/* AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST
+ Define variadic macros to generate parameter type list. */
+
+#ifdef AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST
+
+#undef LAST_ARG
+#undef ARG
+#undef DOTS
+#undef ANON
+#undef LAST_ANON
+#undef PTR
+#undef PTR_ANON
+#undef LAST_ANONPTR
+#undef ANON_PROMOTED
+
+/* Generate parameter type list (without identifiers). */
+#define LAST_ARG(type,val,offset,...) type
+#define LAST_ARG_NONFLAT(type, val, offset, layout, ...) type
+#define ARG(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__),
+#define ARG_NONFLAT(type, val, offset, layout, ...) LAST_ARG (type, val, \
+ offset, \
+ __VA_ARGS__),
+#define DOTS
+#define ANON(type,val, offset,...) ARG(type,val,offset, __VA_ARGS__)
+#define LAST_ANON(type,val, offset,...) LAST_ARG(type,val, offset, __VA_ARGS__)
+#define PTR(type, val, offset,...) LAST_ARG(type, val, offset, __VA_ARGS__),
+#define PTR_ANON(type, val, offset,...) PTR(type, val, offset, __VA_ARGS__)
+#define LAST_ANONPTR(type, val, offset,...) LAST_ARG(type, val, offset, __VA_ARGS__)
+#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...) \
+ LAST_ARG(type_promoted, val_promoted, offset, __VA_ARGS__),
+
+#endif /* AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST */
+
+
+/* AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT
+ Define variadic macros to generate parameter type list with
+ identifiers. */
+
+#ifdef AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT
+
+#undef LAST_ARG
+#undef ARG
+#undef DOTS
+#undef ANON
+#undef LAST_ANON
+#undef PTR
+#undef PTR_ANON
+#undef LAST_ANONPTR
+#undef ANON_PROMOTED
+
+/* Generate parameter type list (with identifiers).
+ The identifiers are named with prefix _f and suffix of the value of
+ __VA_ARGS__. */
+#define LAST_ARG(type,val,offset,...) type _f##__VA_ARGS__
+#define LAST_ARG_NONFLAT(type, val, offset, layout, ...) type _f##__VA_ARGS__
+#define ARG(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__),
+#define ARG_NONFLAT(type, val, offset, layout, ...) LAST_ARG (type, val, \
+ offset, \
+ __VA_ARGS__),
+#define DOTS ...
+#define ANON(type,val, offset,...)
+#define LAST_ANON(type,val, offset,...)
+#define PTR(type, val, offset,...) LAST_ARG(type, val, offset, __VA_ARGS__),
+#define PTR_ANON(type, val, offset,...)
+#define LAST_ANONPTR(type, val, offset,...)
+#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...)
+
+#endif /* AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT */
+
+
+/* AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS
+ Define variadic macros to generate assignment from the function
+ incoming arguments to local variables. */
+
+#ifdef AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS
+
+#undef LAST_ARG
+#undef ARG
+#undef DOTS
+#undef ANON
+#undef LAST_ANON
+#undef PTR
+#undef PTR_ANON
+#undef LAST_ANONPTR
+#undef ANON_PROMOTED
+
+/* Generate assignment statements. For named args, direct assignment from
+ the formal parameter is generated; for unnamed args, va_arg is used.
+ The names of the local variables start with _x and end with the value of
+ __VA_ARGS__. */
+#define LAST_ARG(type,val,offset,...) type _x##__VA_ARGS__ = _f##__VA_ARGS__;
+#define LAST_ARG_NONFLAT(type, val, offset, layout, ...) \
+ type _x##__VA_ARGS__ = _f##__VA_ARGS__;
+#define ARG(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__)
+#define ARG_NONFLAT(type,val,offset,layout,...) \
+ LAST_ARG (type, val, offset, __VA_ARGS__)
+#define ANON(type,val,offset,...) type _x##__VA_ARGS__ = va_arg (ap, type);
+#define LAST_ANON(type,val,offset,...) ANON(type, val, offset, __VA_ARGS__)
+#define PTR(type, val,offset,...) ARG(type, val, offset, __VA_ARGS__)
+#define PTR_ANON(type, val, offset,...) ANON(type, val,offset, __VA_ARGS__)
+#define LAST_ANONPTR(type, val, offset,...) ANON(type, val, offset, __VA_ARGS__)
+#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...) \
+ ANON(type_promoted, val_promoted, offset, __VA_ARGS__)
+
+#define DOTS
+
+#endif /* AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS */
+
+
+/* AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST
+ Define variadic macros to generate argument list using the variables
+ generated during AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS. */
+
+#ifdef AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST
+
+#undef LAST_ARG
+#undef ARG
+#undef DOTS
+#undef ANON
+#undef LAST_ANON
+#undef PTR
+#undef PTR_ANON
+#undef LAST_ANONPTR
+#undef ANON_PROMOTED
+
+/* Generate the argument list; the names start with _x and end with the value of
+ __VA_ARGS__. All arguments (named or unnamed) in stdarg_func are passed to
+ myfunc as named arguments. */
+#define LAST_ARG(type,val,offset,...) _x##__VA_ARGS__
+#define LAST_ARG_NONFLAT(type, val, offset, layout, ...) _x##__VA_ARGS__
+#define ARG(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__),
+#define ARG_NONFLAT(type, val, offset, layout, ...) \
+ LAST_ARG_NONFLAT (type, val, offset, layout, __VA_ARGS__),
+#define DOTS
+#define LAST_ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__)
+#define ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__),
+#define PTR(type, val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__),
+#define PTR_ANON(type, val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__),
+#define LAST_ANONPTR(type, val, offset,...) LAST_ARG(type, val, offset, __VA_ARGS__)
+#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...) \
+ ANON(type_promoted, val_promoted, offset, __VA_ARGS__)
+
+#endif /* AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST */
===================================================================
@@ -0,0 +1,24 @@
+/* Test AAPCS64 layout */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "test_5.c"
+
+__complex__ float x = 1.0+2.0i;
+
+struct y
+{
+ long p;
+ long q;
+} v = { 1, 2};
+
+#include "abitest.h"
+#else
+ ARG(float, 1.0f, S0)
+ ARG(__complex__ float, x, S1)
+ ARG(float, 2.0f, S3)
+ ARG(double, 5.0, D4)
+ LAST_ARG(struct y, v, X0)
+#endif
===================================================================
@@ -0,0 +1,31 @@
+/* Test AAPCS64 layout and __builtin_va_arg.
+
+ This test covers complex types. Complex floating-point types are treated
+ as homogeneous floating-point aggregates, while complex integral types
+ are treated as general composite types. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define AAPCS64_TEST_STDARG
+#define TESTFILE "va_arg-7.c"
+#include "type-def.h"
+
+_Complex __int128 complex_qword = 567890 + 678901i;
+
+#include "abitest.h"
+#else
+ ARG (int, 1, X0, LAST_NAMED_ARG_ID)
+ DOTS
+ /* Complex floating-point types are passed in fp/simd registers. */
+ ANON (_Complex float , 12.3f + 23.4fi , S0, 0)
+ ANON (_Complex double , 34.56 + 45.67i , D2, 1)
+ ANON (_Complex long double, 56789.01234L + 67890.12345Li, Q4, 2)
+
+ /* Complex integral types are passed in general registers or via reference. */
+ ANON (_Complex short , (short)12345 + (short)23456i, X1, 10)
+ ANON (_Complex int , 34567 + 45678i , X2, 11)
+ PTR_ANON (_Complex __int128 , complex_qword , X3, 12)
+
+ LAST_ANON(int , 1 , X4, 20)
+#endif
===================================================================
@@ -0,0 +1,30 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_7.c"
+
+__complex__ float x = 1.0f + 2.0i;
+
+struct y
+{
+ int p;
+ int q;
+ int r;
+ int s;
+} v = { 1, 2, 3, 4 }, v1 = {5, 6, 7, 8}, v2 = {9, 10, 11, 12};
+
+#include "abitest.h"
+#else
+ARG (struct y, v, X0)
+ARG (struct y, v1, X2)
+ARG (struct y, v2, X4)
+ARG (int, 4, W6)
+ARG (float, 1.0f, S0)
+ARG (__complex__ float, x, S1)
+ARG (float, 2.0f, S3)
+ARG (double, 5.0, D4)
+ARG (int, 3, W7)
+LAST_ARG_NONFLAT (int, 5, STACK, i32in64)
+#endif
===================================================================
@@ -0,0 +1,31 @@
+/* Test AAPCS64 layout and __builtin_va_arg.
+
+ Miscellaneous test: HFA anonymous parameter passed in SIMD/FP regs. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define AAPCS64_TEST_STDARG
+#define TESTFILE "va_arg-9.c"
+
+struct z
+{
+ double x[4];
+};
+
+double d1 = 25.0;
+struct z a = { 5.0, 6.0, 7.0, 8.0 };
+struct z b = { 9.0, 10.0, 11.0, 12.0 };
+
+#include "abitest.h"
+#else
+ ARG(double, 11.0, D0, LAST_NAMED_ARG_ID)
+ DOTS
+ ANON(int, 8, W0, 1)
+ ANON(struct z, a, D1, 2)
+ ANON(struct z, b, STACK, 3)
+ ANON(int, 5, W1, 4)
+ ANON(double, d1, STACK+32, 5)
+ LAST_ANON(double, 0.5, STACK+40, 6)
+
+#endif
===================================================================
@@ -0,0 +1,18 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_complex.c"
+
+__complex__ float x = 1.0+2.0i;
+__complex__ int y = 5 + 6i;
+__complex__ double z = 2.0 + 3.0i;
+
+#include "abitest.h"
+#else
+ ARG(__complex__ float, x, S0)
+ ARG(__complex__ int, y, X0)
+ ARG(__complex__ double, z, D2)
+ LAST_ARG (int, 5, W1)
+#endif
===================================================================
@@ -0,0 +1,32 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "test_9.c"
+
+struct y
+{
+ int p;
+ int q;
+ int r;
+ int s;
+} v = { 1, 2, 3, 4 };
+
+struct z
+{
+ double x[4];
+};
+
+struct z a = { 5.0, 6.0, 7.0, 8.0 };
+struct z b = { 9.0, 10.0, 11.0, 12.0 };
+
+#include "abitest.h"
+#else
+ ARG(int, 7, W0)
+ ARG(struct y, v, X1)
+ ARG(struct z, a, D0)
+ ARG(struct z, b, D4)
+ LAST_ARG(double, 0.5, STACK)
+#endif
===================================================================
@@ -0,0 +1,22 @@
+/* Test AAPCS64 layout */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_20.c"
+
+#include "abitest.h"
+
+#else
+ ARG(int, 8, W0)
+ ARG(double, 1.0, D0)
+ ARG(double, 2.0, D1)
+ ARG(double, 3.0, D2)
+ ARG(double, 4.0, D3)
+ ARG(double, 5.0, D4)
+ ARG(double, 6.0, D5)
+ ARG(double, 7.0, D6)
+ DOTS
+ ANON(_Complex double, 1234.0 + 567.0i, STACK)
+ LAST_ANON(double, -987.0, STACK+16)
+#endif
===================================================================
@@ -0,0 +1,44 @@
+/* Test AAPCS64 function result return.
+
+ This test covers most fundamental data types as specified in
+ AAPCS64 \S 4.1. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+/* { dg-additional-sources "abitest.S" } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "func-ret-1.c"
+#include "type-def.h"
+
+vf2_t vf2 = (vf2_t){ 17.f, 18.f };
+vi4_t vi4 = (vi4_t){ 0xdeadbabe, 0xbabecafe, 0xcafebeef, 0xbeefdead };
+union int128_t qword;
+
+int *int_ptr = (int *)0xabcdef0123456789ULL;
+
+#define HAS_DATA_INIT_FUNC
+void init_data ()
+{
+ /* Init signed quad-word integer. */
+ qword.l64 = 0xfdb9753102468aceLL;
+ qword.h64 = 0xeca8642013579bdfLL;
+}
+
+#include "abitest-2.h"
+#else
+FUNC_VAL_CHECK (0, unsigned char , 0xfe , X0, i8in64)
+FUNC_VAL_CHECK (1, signed char , 0xed , X0, i8in64)
+FUNC_VAL_CHECK (2, unsigned short, 0xdcba , X0, i16in64)
+FUNC_VAL_CHECK (3, signed short, 0xcba9 , X0, i16in64)
+FUNC_VAL_CHECK (4, unsigned int , 0xdeadbeef, X0, i32in64)
+FUNC_VAL_CHECK (5, signed int , 0xcafebabe, X0, i32in64)
+FUNC_VAL_CHECK (6, unsigned long long, 0xba98765432101234ULL, X0, flat)
+FUNC_VAL_CHECK (7, signed long long, 0xa987654321012345LL, X0, flat)
+FUNC_VAL_CHECK (8, __int128, qword.i, X0, flat)
+FUNC_VAL_CHECK (9, float, 65432.12345f, S0, flat)
+FUNC_VAL_CHECK (10, double, 9876543.212345, D0, flat)
+FUNC_VAL_CHECK (11, long double, 98765432123456789.987654321L, Q0, flat)
+FUNC_VAL_CHECK (12, vf2_t, vf2, D0, f32in64)
+FUNC_VAL_CHECK (13, vi4_t, vi4, Q0, i32in128)
+FUNC_VAL_CHECK (14, int *, int_ptr, X0, flat)
+#endif
===================================================================
@@ -0,0 +1,19 @@
+/* Test AAPCS64 layout */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_22.c"
+
+struct y
+{
+ float p;
+ float q;
+} v = { 345.0f, 678.0f };
+
+#include "abitest.h"
+#else
+ ARG(float, 123.0f, S0)
+ ARG(struct y, v, S1)
+ LAST_ARG(float, 901.0f, S3)
+#endif
===================================================================
@@ -0,0 +1,157 @@
+/* This header file defines some types that are used in the AAPCS64 tests. */
+
+
+/* 64-bit vector of 2 floats. */
+typedef float vf2_t __attribute__((vector_size (8)));
+
+/* 128-bit vector of 4 floats. */
+typedef float vf4_t __attribute__((vector_size (16)));
+
+/* 128-bit vector of 4 ints. */
+typedef int vi4_t __attribute__((vector_size (16)));
+
+/* signed quad-word (in an union for the convenience of initialization). */
+union int128_t
+{
+ __int128 i;
+ struct
+ {
+ signed long long l64;
+ signed long long h64;
+ };
+};
+
+/* Homogeneous floating-point composite types. */
+
+struct hfa_fx1_t
+{
+ float a;
+};
+
+struct hfa_fx2_t
+{
+ float a;
+ float b;
+};
+
+struct hfa_dx2_t
+{
+ double a;
+ double b;
+};
+
+struct hfa_dx4_t
+{
+ double a;
+ double b;
+ double c;
+ double d;
+};
+
+struct hfa_ldx3_t
+{
+ long double a;
+ long double b;
+ long double c;
+};
+
+struct hfa_ffs_t
+{
+ float a;
+ float b;
+ struct hfa_fx2_t c;
+};
+
+union hfa_union_t
+{
+ struct
+ {
+ float a;
+ float b;
+ } s;
+ float c;
+};
+
+/* Non homogeneous floating-point-composite types. */
+
+struct non_hfa_fx5_t
+{
+ float a;
+ float b;
+ float c;
+ float d;
+ float e;
+};
+
+struct non_hfa_ffs_t
+{
+ float a;
+ float b;
+ struct hfa_dx2_t c;
+};
+
+struct non_hfa_ffs_2_t
+{
+ struct
+ {
+ int a;
+ int b;
+ } s;
+ float c;
+ float d;
+};
+
+struct hva_vf2x1_t
+{
+ vf2_t a;
+};
+
+struct hva_vf2x2_t
+{
+ vf2_t a;
+ vf2_t b;
+};
+
+struct hva_vi4x1_t
+{
+ vi4_t a;
+};
+
+struct non_hfa_ffd_t
+{
+ float a;
+ float b;
+ double c;
+};
+
+struct non_hfa_ii_t
+{
+ int a;
+ int b;
+};
+
+struct non_hfa_c_t
+{
+ char a;
+};
+
+struct non_hfa_ffvf2_t
+{
+ float a;
+ float b;
+ vf2_t c;
+};
+
+struct non_hfa_fffd_t
+{
+ float a;
+ float b;
+ float c;
+ double d;
+};
+
+union non_hfa_union_t
+{
+ double a;
+ float b;
+};
===================================================================
@@ -0,0 +1,26 @@
+/* Test AAPCS64 layout.
+
+ Test parameter passing of floating-point quad precision types. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_quad_double.c"
+
+typedef long double TFtype;
+typedef _Complex long double CTFtype;
+
+TFtype x = 1.0;
+TFtype y = 2.0;
+
+CTFtype cx = 3.0 + 4.0i;
+CTFtype cy = 5.0 + 6.0i;
+
+#include "abitest.h"
+#else
+ ARG ( TFtype, x, Q0)
+ ARG (CTFtype, cx, Q1)
+ DOTS
+ ANON (CTFtype, cy, Q3)
+ LAST_ANON ( TFtype, y, Q5)
+#endif
===================================================================
@@ -0,0 +1,92 @@
+/* Test AAPCS64 function result return.
+
+ This test covers homogeneous floating-point aggregate types as described
+ in AAPCS64 \S 4.3.5. */
+
+/* { dg-do run { target aarch64-*-* } } */
+/* { dg-additional-sources "abitest.S" } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "func-ret-3.c"
+#include "type-def.h"
+
+struct hfa_fx1_t hfa_fx1 = {12.345f};
+struct hfa_fx2_t hfa_fx2 = {123.456f, 234.456f};
+struct hfa_dx2_t hfa_dx2 = {234.567, 345.678};
+struct hfa_dx4_t hfa_dx4 = {1234.123, 2345.234, 3456.345, 4567.456};
+struct hfa_ldx3_t hfa_ldx3 = {123456.7890, 234567.8901, 345678.9012};
+struct non_hfa_fx5_t non_hfa_fx5 = {456.789f, 567.890f, 678.901f, 789.012f, 890.123f};
+struct hfa_ffs_t hfa_ffs;
+struct non_hfa_ffs_t non_hfa_ffs;
+struct non_hfa_ffs_2_t non_hfa_ffs_2;
+struct hva_vf2x1_t hva_vf2x1;
+struct hva_vi4x1_t hva_vi4x1;
+struct non_hfa_ffd_t non_hfa_ffd = {23.f, 24.f, 25.0};
+struct non_hfa_ii_t non_hfa_ii = {26, 27};
+struct non_hfa_c_t non_hfa_c = {28};
+struct non_hfa_ffvf2_t non_hfa_ffvf2;
+struct non_hfa_fffd_t non_hfa_fffd = {33.f, 34.f, 35.f, 36.0};
+union hfa_union_t hfa_union;
+union non_hfa_union_t non_hfa_union;
+
+#define HAS_DATA_INIT_FUNC
+void init_data ()
+{
+ hva_vf2x1.a = (vf2_t){17.f, 18.f};
+ hva_vi4x1.a = (vi4_t){19, 20, 21, 22};
+
+ non_hfa_ffvf2.a = 29.f;
+ non_hfa_ffvf2.b = 30.f;
+ non_hfa_ffvf2.c = (vf2_t){31.f, 32.f};
+
+ hfa_union.s.a = 37.f;
+ hfa_union.s.b = 38.f;
+ hfa_union.c = 39.f;
+
+ non_hfa_union.a = 40.0;
+ non_hfa_union.b = 41.f;
+
+ hfa_ffs.a = 42.f;
+ hfa_ffs.b = 43.f;
+ hfa_ffs.c.a = 44.f;
+ hfa_ffs.c.b = 45.f;
+
+ non_hfa_ffs.a = 46.f;
+ non_hfa_ffs.b = 47.f;
+ non_hfa_ffs.c.a = 48.0;
+ non_hfa_ffs.c.b = 49.0;
+
+ non_hfa_ffs_2.s.a = 50;
+ non_hfa_ffs_2.s.b = 51;
+ non_hfa_ffs_2.c = 52.f;
+ non_hfa_ffs_2.d = 53.f;
+}
+
+#include "abitest-2.h"
+#else
+ /* HFA returned in fp/simd registers. */
+
+FUNC_VAL_CHECK ( 0, struct hfa_fx1_t , hfa_fx1 , S0, flat)
+FUNC_VAL_CHECK ( 1, struct hfa_fx2_t , hfa_fx2 , S0, flat)
+FUNC_VAL_CHECK ( 2, struct hfa_dx2_t , hfa_dx2 , D0, flat)
+
+FUNC_VAL_CHECK ( 3, struct hfa_dx4_t , hfa_dx4 , D0, flat)
+FUNC_VAL_CHECK ( 4, struct hfa_ldx3_t, hfa_ldx3 , Q0, flat)
+FUNC_VAL_CHECK ( 5, struct hfa_ffs_t , hfa_ffs , S0, flat)
+FUNC_VAL_CHECK ( 6, union hfa_union_t, hfa_union, S0, flat)
+
+FUNC_VAL_CHECK ( 7, struct hva_vf2x1_t, hva_vf2x1, D0, flat)
+FUNC_VAL_CHECK ( 8, struct hva_vi4x1_t, hva_vi4x1, Q0, flat)
+
+ /* Non-HFA returned in general registers or via a pointer in X8. */
+FUNC_VAL_CHECK (10, struct non_hfa_fx5_t , non_hfa_fx5 , X8, flat)
+FUNC_VAL_CHECK (13, struct non_hfa_ffd_t , non_hfa_ffd , X0, flat)
+FUNC_VAL_CHECK (14, struct non_hfa_ii_t , non_hfa_ii , X0, flat)
+FUNC_VAL_CHECK (15, struct non_hfa_c_t , non_hfa_c , X0, flat)
+FUNC_VAL_CHECK (16, struct non_hfa_ffvf2_t, non_hfa_ffvf2, X0, flat)
+FUNC_VAL_CHECK (17, struct non_hfa_fffd_t , non_hfa_fffd , X8, flat)
+FUNC_VAL_CHECK (18, struct non_hfa_ffs_t , non_hfa_ffs , X8, flat)
+FUNC_VAL_CHECK (19, struct non_hfa_ffs_2_t, non_hfa_ffs_2, X0, flat)
+FUNC_VAL_CHECK (20, union non_hfa_union_t, non_hfa_union, X0, flat)
+
+#endif
===================================================================
@@ -0,0 +1,22 @@
+/* Test AAPCS64 layout. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_24.c"
+
+typedef long double TFtype;
+
+#include "abitest.h"
+#else
+ ARG(TFtype, 1.0, Q0)
+ ARG(TFtype, 2.0, Q1)
+ ARG(TFtype, 3.0, Q2)
+ ARG(TFtype, 4.0, Q3)
+ ARG(TFtype, 5.0, Q4)
+ ARG(TFtype, 6.0, Q5)
+ ARG(TFtype, 7.0, Q6)
+ ARG(TFtype, 8.0, Q7)
+ ARG(double, 9.0, STACK)
+ LAST_ARG(TFtype, 10.0, STACK+16)
+#endif
===================================================================
@@ -0,0 +1,139 @@
+#undef __AAPCS64_BIG_ENDIAN__
+#ifdef __GNUC__
+#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#define __AAPCS64_BIG_ENDIAN__
+#endif
+#else
+#error unknown compiler
+#endif
+
+#define IN_FRAMEWORK
+
+#define D0 0
+#define D1 8
+#define D2 16
+#define D3 24
+#define D4 32
+#define D5 40
+#define D6 48
+#define D7 56
+
+#define S0 64
+#define S1 68
+#define S2 72
+#define S3 76
+#define S4 80
+#define S5 84
+#define S6 88
+#define S7 92
+
+#define W0 96
+#define W1 100
+#define W2 104
+#define W3 108
+#define W4 112
+#define W5 116
+#define W6 120
+#define W7 124
+
+#define X0 128
+#define X1 136
+#define X2 144
+#define X3 152
+#define X4 160
+#define X5 168
+#define X6 176
+#define X7 184
+
+#define Q0 192
+#define Q1 208
+#define Q2 224
+#define Q3 240
+#define Q4 256
+#define Q5 272
+#define Q6 288
+#define Q7 304
+
+#define X8 320
+#define X9 328
+
+#define STACK 336
+
+/* The type of test. 'myfunc' in abitest.S needs to know which kind of
+ test it is running to decide what to do at the runtime. Keep the
+ related code in abitest.S synchronized if anything is changed here. */
+enum aapcs64_test_kind
+{
+ TK_PARAM = 0, /* Test parameter passing. */
+ TK_VA_ARG, /* Test va_arg code generation. */
+ TK_RETURN /* Test function return value. */
+};
+
+int which_kind_of_test;
+
+extern int printf (const char*, ...);
+extern void abort (void);
+extern void dumpregs () __asm("myfunc");
+
+#ifndef MYFUNCTYPE
+#define MYFUNCTYPE void
+#endif
+
+#ifndef PCSATTR
+#define PCSATTR
+#endif
+
+
+#ifdef RUNTIME_ENDIANNESS_CHECK
+#ifndef RUNTIME_ENDIANNESS_CHECK_FUNCTION_DEFINED
+/* This helper funtion defined to detect whether there is any incompatibility
+ issue on endianness between compilation time and run-time environments.
+ TODO: review the implementation when the work of big-endian support in A64
+ GCC starts.
+ */
+static void rt_endian_check ()
+{
+ const char* msg_endian[2] = {"little-endian", "big-endian"};
+ const char* msg_env[2] = {"compile-time", "run-time"};
+ union
+ {
+ unsigned int ui;
+ unsigned char ch[4];
+ } u;
+ int flag = -1;
+
+ u.ui = 0xCAFEBABE;
+
+ printf ("u.ui=0x%X, u.ch[0]=0x%X\n", u.ui, u.ch[0]);
+
+ if (u.ch[0] == 0xBE)
+ {
+ /* Little-Endian at run-time */
+#ifdef __AAPCS64_BIG_ENDIAN__
+ /* Big-Endian at compile-time */
+ flag = 1;
+#endif
+ }
+ else
+ {
+ /* Big-Endian at run-time */
+#ifndef __AAPCS64_BIG_ENDIAN__
+ /* Little-Endian at compile-time */
+ flag = 0;
+#endif
+ }
+
+ if (flag != -1)
+ {
+ /* Endianness conflict exists */
+ printf ("Error: endianness conflicts between %s and %s:\n\
+\t%s: %s\n\t%s: %s\n", msg_env[0], msg_env[1], msg_env[0], msg_endian[flag],
+ msg_env[1], msg_endian[1-flag]);
+ abort ();
+ }
+
+ return;
+}
+#endif
+#define RUNTIME_ENDIANNESS_CHECK_FUNCTION_DEFINED
+#endif
===================================================================
@@ -0,0 +1,54 @@
+/* Test AAPCS64 layout.
+
+ Test some small structures that should be passed in GPRs. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_26.c"
+
+struct y0
+{
+ char ch;
+} c0 = { 'A' };
+
+struct y2
+{
+ long long ll[2];
+} c2 = { 0xDEADBEEF, 0xCAFEBABE };
+
+struct y3
+{
+ int i[3];
+} c3 = { 56789, 67890, 78901 };
+
+typedef float vf2_t __attribute__((vector_size (8)));
+struct x0
+{
+ vf2_t v;
+} s0;
+
+typedef short vh4_t __attribute__((vector_size (8)));
+
+struct x1
+{
+ vh4_t v[2];
+} s1;
+
+#define HAS_DATA_INIT_FUNC
+void init_data ()
+{
+ s0.v = (vf2_t){ 17.f, 18.f };
+ s1.v[0] = (vh4_t){ 345, 456, 567, 678 };
+ s1.v[1] = (vh4_t){ 789, 890, 901, 123 };
+}
+
+#include "abitest.h"
+#else
+ARG (struct y0, c0, X0)
+ARG (struct y2, c2, X1)
+ARG (struct y3, c3, X3)
+ARG_NONFLAT (struct x0, s0, D0, f32in64)
+ARG (struct x1, s1, D1)
+LAST_ARG_NONFLAT (int, 89012, X5, i32in64)
+#endif
===================================================================
@@ -0,0 +1,5 @@
+if { [istarget aarch64_be-*-*] } then {
+ return 1
+}
+
+return 0
===================================================================
@@ -0,0 +1,59 @@
+ .global dumpregs
+ .global myfunc
+ .type dumpregs,%function
+ .type myfunc,%function
+dumpregs:
+myfunc:
+ mov x16, sp
+ mov x17, sp
+ sub sp, sp, 352 // 336 for registers and 16 for old sp and lr
+
+ stp x8, x9, [x17, #-16]! //320
+
+ stp q6, q7, [x17, #-32]! //288
+ stp q4, q5, [x17, #-32]! //256
+ stp q2, q3, [x17, #-32]! //224
+ stp q0, q1, [x17, #-32]! //192
+
+ stp x6, x7, [x17, #-16]! //176
+ stp x4, x5, [x17, #-16]! //160
+ stp x2, x3, [x17, #-16]! //144
+ stp x0, x1, [x17, #-16]! //128
+
+ stp w6, w7, [x17, #-8]! //120
+ stp w4, w5, [x17, #-8]! //112
+ stp w2, w3, [x17, #-8]! //104
+ stp w0, w1, [x17, #-8]! // 96
+
+ stp s6, s7, [x17, #-8]! // 88
+ stp s4, s5, [x17, #-8]! // 80
+ stp s2, s3, [x17, #-8]! // 72
+ stp s0, s1, [x17, #-8]! // 64
+
+ stp d6, d7, [x17, #-16]! // 48
+ stp d4, d5, [x17, #-16]! // 32
+ stp d2, d3, [x17, #-16]! // 16
+ stp d0, d1, [x17, #-16]! // 0
+
+ add x0, sp, #16
+ stp x16, x30, [x17, #-16]!
+
+ adrp x9, which_kind_of_test // determine the type of test
+ add x9, x9, :lo12:which_kind_of_test
+ ldr w9, [x9, #0]
+ cmp w9, #1
+ bgt LABEL_TEST_FUNC_RETURN
+ bl testfunc // parameter passing test or va_arg code gen test
+ b LABEL_RET
+LABEL_TEST_FUNC_RETURN:
+ adrp x9, testfunc_ptr
+ add x9, x9, :lo12:testfunc_ptr
+ ldr x9, [x9, #0]
+ blr x9 // function return value test
+LABEL_RET:
+ ldp x0, x30, [sp]
+ mov sp, x0
+ ret
+
+.weak testfunc
+.weak testfunc_ptr
===================================================================
@@ -0,0 +1,32 @@
+/* Test AAPCS64 layout and __builtin_va_arg.
+
+ Miscellaneous test: Anonymous arguments passed on the stack. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define AAPCS64_TEST_STDARG
+#define TESTFILE "va_arg-11.c"
+
+struct z
+{
+ double x[2];
+};
+
+double d1 = 25.0;
+struct z a = { 5.0, 6.0 };
+
+#include "abitest.h"
+#else
+ ARG(double, 1.0, D0, 0)
+ ARG(double, 2.0, D1, 1)
+ ARG(double, 3.0, D2, 2)
+ ARG(double, 4.0, D3, 3)
+ ARG(double, 5.0, D4, 4)
+ ARG(double, 6.0, D5, 5)
+ ARG(double, 7.0, D6, LAST_NAMED_ARG_ID)
+ DOTS
+ ANON(struct z, a, STACK, 8)
+ LAST_ANON(double, d1, STACK+16, 9)
+
+#endif
===================================================================
@@ -0,0 +1,26 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "test_10.c"
+
+struct z
+{
+ double x[4];
+};
+
+struct z a = { 5.0, 6.0, 7.0, 8.0 };
+struct z b = { 9.0, 10.0, 11.0, 12.0 };
+
+#include "abitest.h"
+#else
+
+ ARG(int, 7, W0)
+ DOTS
+ ANON(struct z, a, D0)
+ ANON(struct z, b, D4)
+ ANON(double, 0.5, STACK)
+ LAST_ANON(double, 1.5, STACK+8)
+#endif
===================================================================
@@ -0,0 +1,44 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "test_12.c"
+
+
+struct y
+{
+ long p;
+ long q;
+ long r;
+ long s;
+} v = { 1, 2, 3, 4 };
+
+struct y1
+{
+ int p;
+ int q;
+ int r;
+ int s;
+} v1 = { 1, 2, 3, 4 };
+
+
+struct z
+{
+ double x[4];
+};
+
+struct z a = { 5.0, 6.0, 7.0, 8.0 };
+struct z b = { 9.0, 10.0, 11.0, 12.0 };
+
+#define MYFUNCTYPE struct y
+
+#include "abitest.h"
+#else
+ ARG(int, 7, W0)
+ ARG(struct y1, v1, X1)
+ ARG(struct z, a, D0)
+ ARG(struct z, b, D4)
+ LAST_ARG(double, 0.5, STACK)
+#endif
===================================================================
@@ -0,0 +1,13 @@
+/* Test AAPCS layout
+
+ Larger than machine-supported vector size. The behaviour is unspecified by
+ the AAPCS64 document; the implementation opts for pass by reference. */
+
+/* { dg-do compile { target aarch64*-*-* } } */
+
+typedef char A __attribute__ ((vector_size (64)));
+
+void
+foo (A a)
+{
+}
===================================================================
@@ -0,0 +1,35 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "test_14.c"
+
+
+struct y
+{
+ int p;
+ int q;
+ int r;
+ int s;
+} v = { 1, 2, 3, 4 };
+
+struct z
+{
+ double x[4];
+};
+
+struct z a = { 5.0, 6.0, 7.0, 8.0 };
+struct z b = { 9.0, 10.0, 11.0, 12.0 };
+
+#include "abitest.h"
+#else
+ ARG(int, 7, W0)
+ ARG(int, 9, W1)
+ ARG(struct z, a, D0)
+ ARG(double, 1.0, D4)
+ ARG(struct z, b, STACK)
+ ARG(int, 4, W2)
+ LAST_ARG(double, 0.5, STACK+32)
+#endif
===================================================================
@@ -0,0 +1,9 @@
+/* Test AAPCS layout
+
+/* { dg-do compile { target aarch64*-*-* } } */
+
+__complex__ long int
+ctest_long_int(__complex__ long int x)
+{
+ return x;
+}
===================================================================
@@ -0,0 +1,32 @@
+/* Test AAPCS layout */
+/* C.5 If the argument is a Half- or Single- precision Floating-point type,
+ then the size of the argument is set to 8 bytes. The effect is as if
+ the argument had been copied to the least significant bits of a 64-bit
+ register and the remaining bits filled with unspecified values. */
+/* TODO: add the check of half-precision floating-point when it is supported
+ by the A64 GCC. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "test_16.c"
+
+#include "abitest.h"
+#else
+ ARG(float, 1.0, S0)
+ ARG(float, 2.0, S1)
+ ARG(float, 3.0, S2)
+ ARG(float, 4.0, S3)
+ ARG(float, 5.0, S4)
+ ARG(float, 6.0, S5)
+ ARG(float, 7.0, S6)
+ ARG(float, 8.0, S7)
+#ifndef __AAPCS64_BIG_ENDIAN__
+ ARG(float, 9.0, STACK)
+ LAST_ARG(float, 10.0, STACK+8)
+#else
+ ARG(float, 9.0, STACK+4)
+ LAST_ARG(float, 10.0, STACK+12)
+#endif
+#endif
===================================================================
@@ -0,0 +1,81 @@
+/* Memory validation functions for AArch64 procedure call standard.
+ Copyright (C) 2012 Free Software Foundation, Inc.
+ Contributed by ARM Ltd.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef VALIDATE_MEMORY_H
+#define VALIDATE_MEMORY_H
+
+enum structure_type
+{
+ flat = 0,
+ i32in128,
+ f32in64,
+ i8in64,
+ i16in64,
+ i32in64,
+};
+
+/* Some explicit declarations as I can't include files outside the testsuite.
+ */
+typedef long unsigned int size_t;
+int memcmp (void *, void *, size_t);
+
+/* These two arrays contain element size and block size data for the enumeration
+ above. */
+const int element_size[] = { 1, 4, 4, 1, 2, 4 };
+const int block_reverse_size[] = { 1, 16, 8, 8, 8, 8 };
+
+int
+validate_memory (void *mem1, char *mem2, size_t size, enum structure_type type)
+{
+ /* In big-endian mode, the data in mem2 will have been byte-reversed in
+ register sized groups, while the data in mem1 will have been byte-reversed
+ according to the true structure of the data. To compare them, we need to
+ compare chunks of data in reverse order.
+
+ This is only implemented for homogeneous data layouts at the moment. For
+ hetrogeneous structures a custom compare case will need to be written. */
+
+ unsigned int i;
+ char *cmem1 = (char *) mem1;
+ switch (type)
+ {
+#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+ case i8in64:
+ case i16in64:
+ case i32in64:
+ case f32in64:
+ case i32in128:
+ for (i = 0; i < size; i += element_size[type])
+ {
+ if (memcmp (cmem1 + i,
+ mem2 + block_reverse_size[type] - i - element_size[type],
+ element_size[type]))
+ return 1;
+ }
+ return 0;
+ break;
+#endif
+ default:
+ break;
+ }
+ return memcmp (mem1, mem2, size);
+}
+
+#endif /* VALIDATE_MEMORY_H. */
===================================================================
@@ -0,0 +1,34 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+
+#define TESTFILE "test_18.c"
+
+
+struct y
+{
+ long p;
+ long q;
+ long r;
+ long s;
+} v = { 1, 2, 3, 4 };
+
+struct z
+{
+ double x[4];
+};
+
+struct z a = { 5.0, 6.0, 7.0, 8.0 };
+struct z b = { 9.0, 10.0, 11.0, 12.0 };
+
+#include "abitest.h"
+#else
+ ARG(int, 7, W0)
+ PTR(struct y, v, X1)
+ ARG(struct z, a, D0)
+ ARG(double, 1.0, D4)
+ ARG(struct z, b, STACK)
+ LAST_ARG(double, 0.5, STACK+32)
+#endif
===================================================================
@@ -0,0 +1,42 @@
+/* Test AAPCS64 layout.
+
+ C.8 If the argument has an alignment of 16 then the NGRN is rounded up
+ the next even number.
+
+ The case of a small struture containing only one 16-byte aligned
+ quad-word integer is covered in this test. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_align-2.c"
+#include "type-def.h"
+
+struct y
+{
+ union int128_t v;
+} w;
+
+struct x
+{
+ long long p;
+ int q;
+} s = {0xDEADBEEFCAFEBABELL, 0xFEEBDAED};
+
+#define HAS_DATA_INIT_FUNC
+void init_data ()
+{
+ /* Init signed quad-word integer. */
+ w.v.l64 = 0xfdb9753102468aceLL;
+ w.v.h64 = 0xeca8642013579bdfLL;
+}
+
+#include "abitest.h"
+#else
+ ARG(int, 0xAB, W0)
+ ARG(struct y, w, X2)
+ ARG(int, 0xCD, W4)
+ ARG(struct x, s, X5)
+ LAST_ARG(int, 0xFF00FF00, W7)
+
+#endif
===================================================================
@@ -0,0 +1,42 @@
+/* Test AAPCS64 layout.
+
+ C.3 If the argument is an HFA then the NSRN is set to 8 and the size
+ of the argument is rounded up to the nearest multiple of 8 bytes.
+
+ TODO: add the check of an HFA containing half-precision floating-point
+ when __f16 is supported in A64 GCC. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_align-4.c"
+
+struct z1
+{
+ double x[4];
+};
+
+struct z1 a = { 5.0, 6.0, 7.0, 8.0 };
+
+struct z2
+{
+ float x[3];
+};
+
+struct z2 b = { 13.f, 14.f, 15.f };
+struct z2 c = { 16.f, 17.f, 18.f };
+
+#include "abitest.h"
+#else
+
+ ARG(struct z1, a, D0)
+ ARG(double, 9.0, D4)
+ ARG(double, 10.0, D5)
+ ARG(struct z2, b, STACK) /* [C.3] on stack and size padded to 16 bytes */
+#ifndef __AAPCS64_BIG_ENDIAN__
+ ARG(float, 15.5f, STACK+16) /* [C.3] NSRN has been set to 8 */
+#else
+ ARG(float, 15.5f, STACK+20)
+#endif
+ LAST_ARG(struct z2, c, STACK+24)
+#endif
===================================================================
@@ -0,0 +1,59 @@
+/* Test AAPCS64 layout and __builtin_va_arg.
+
+ This test covers fundamental data types as specified in AAPCS64 \S 4.1.
+ It is focus on unnamed parameter passed on stack. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define AAPCS64_TEST_STDARG
+#define TESTFILE "va_arg-2.c"
+#include "type-def.h"
+
+vf2_t vf2 = (vf2_t){ 17.f, 18.f };
+vi4_t vi4 = (vi4_t){ 0xdeadbabe, 0xbabecafe, 0xcafebeef, 0xbeefdead };
+union int128_t qword;
+signed char sc = 0xed;
+signed int sc_promoted = 0xffffffed;
+signed short ss = 0xcba9;
+signed int ss_promoted = 0xffffcba9;
+float fp = 65432.12345f;
+double fp_promoted = (double)65432.12345f;
+
+#define HAS_DATA_INIT_FUNC
+void init_data ()
+{
+ /* Init signed quad-word integer. */
+ qword.l64 = 0xfdb9753102468aceLL;
+ qword.h64 = 0xeca8642013579bdfLL;
+}
+
+#include "abitest.h"
+#else
+ ARG ( int , 0xff , X0, 0)
+ ARG ( float , 1.0f , S0, 1)
+ ARG ( float , 1.0f , S1, 2)
+ ARG ( float , 1.0f , S2, 3)
+ ARG ( float , 1.0f , S3, 4)
+ ARG ( float , 1.0f , S4, 5)
+ ARG ( float , 1.0f , S5, 6)
+ ARG ( float , 1.0f , S6, 7)
+ ARG ( float , 1.0f , S7, LAST_NAMED_ARG_ID)
+ DOTS
+ ANON ( __int128, qword.i , X2, 8)
+ ANON ( signed long long, 0xa987654321012345LL , X4, 9)
+ ANON ( __int128, qword.i , X6, 10)
+ ANON_PROMOTED(unsigned char , 0xfe , unsigned int, 0xfe , STACK, 11)
+ ANON_PROMOTED( signed char , sc , signed int, sc_promoted, STACK+8, 12)
+ ANON_PROMOTED(unsigned short , 0xdcba, unsigned int, 0xdcba , STACK+16, 13)
+ ANON_PROMOTED( signed short , ss , signed int, ss_promoted, STACK+24, 14)
+ ANON (unsigned int , 0xdeadbeef, STACK+32, 15)
+ ANON ( signed int , 0xcafebabe, STACK+40, 16)
+ ANON (unsigned long long, 0xba98765432101234ULL, STACK+48, 17)
+ ANON_PROMOTED( float , fp , double, fp_promoted, STACK+56, 18)
+ ANON ( double , 9876543.212345, STACK+64, 19)
+ ANON ( long double , 98765432123456789.987654321L, STACK+80, 20)
+ ANON ( vf2_t, vf2 , STACK+96, 21)
+ ANON ( vi4_t, vi4 , STACK+112,22)
+ LAST_ANON ( int , 0xeeee, STACK+128,23)
+#endif
===================================================================
@@ -0,0 +1,16 @@
+/* Test AAPCS64 layout */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "test_2.c"
+#include "abitest.h"
+
+#else
+ ARG(float, 1.0f, S0)
+ ARG(double, 4.0, D1)
+ ARG(float, 2.0f, S2)
+ ARG(double, 5.0, D3)
+ LAST_ARG(int, 3, W0)
+#endif
===================================================================
@@ -0,0 +1,159 @@
+/* This header file should be included for the purpose of parameter passing
+ testing and va_arg code gen testing.
+
+ To test va_arg code gen, #define AAPCS64_TEST_STDARG in the test case.
+
+ The parameter passing test is done by passing variables/constants to
+ 'myfunc', which pushes its incoming arguments to a memory block on the
+ stack and then passes the memory block address to 'testfunc'. It is inside
+ 'testfunc' that the real parameter passing check is carried out.
+
+ The function body of 'myfunc' is in abitest.S. The declaration of 'myfunc'
+ is constructed during the pre-processing stage.
+
+ The va_arg code gen test has a similar workflow, apart from an extra set-up
+ step before calling 'myfunc'. All arguments are passed to 'stdarg_func'
+ first, which assigned these arguments to its local variables via either
+ direct assignment or va_arg macro, depending on whether an argument is named
+ or not. Afterwards, 'stdarg_func' calls 'myfunc' with the aforementioned
+ local variables as the arguments to finish the remaining steps. */
+
+#include "abitest-common.h"
+#include "validate_memory.h"
+
+#ifdef AAPCS64_TEST_STDARG
+/* Generate va_start (ap, last_named_arg). Note that this requires
+ LAST_NAMED_ARG_ID to be defined/used correctly in the test file. */
+#ifndef LAST_NAMED_ARG_ID
+#define LAST_NAMED_ARG_ID 65535
+#endif
+#ifndef VA_START
+#undef VA_START_1
+#define VA_START_1(ap, id) va_start (ap, _f##id);
+#define VA_START(ap, id) VA_START_1 (ap, id);
+#endif
+#endif /* AAPCS64_TEST_STDARG */
+
+/* Some debugging facility. */
+#undef DUMP_ARG
+#ifdef DUMP_ENABLED
+#define DUMP_ARG(type,val) printf ("### Checking ARG "#type" "#val"\n")
+#else
+#define DUMP_ARG(type,val)
+#endif
+
+
+/* Function called from myfunc (defined in abitest.S) to check the arguments
+ passed to myfunc. myfunc has pushed all the arguments into the memory
+ block pointed by STACK. */
+void testfunc(char* stack)
+{
+#define AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS
+#include "macro-def.h"
+#include TESTFILE
+#undef AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS
+ return;
+}
+
+
+#ifndef AAPCS64_TEST_STDARG
+/* Test parameter passing. */
+
+/* Function declaration of myfunc. */
+MYFUNCTYPE myfunc(
+#define AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST
+#include "macro-def.h"
+#include TESTFILE
+#undef AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST
+) PCSATTR;
+
+#else /* AAPCS64_TEST_STDARG */
+/* Test stdarg macros, e.g. va_arg. */
+#include <stdarg.h>
+
+/* Dummy function to help reset parameter passing registers, i.e. X0-X7
+ and V0-V7 (by being passed 0 in W0-W7 and 0.f in S0-S7). */
+__attribute__ ((noinline)) void
+dummy_func (int w0, int w1, int w2, int w3, int w4, int w5, int w6, int w7,
+ float s0, float s1, float s2, float s3, float s4, float s5,
+ float s6, float s7)
+{
+ asm (""); /* Prevent function from getting optimized away */
+ return;
+}
+
+/* Function declaration of myfunc. */
+MYFUNCTYPE myfunc(
+#define AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST
+#include "macro-def.h"
+#include TESTFILE
+#undef AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST
+) PCSATTR;
+
+/* Function definition of stdarg_func.
+ stdarg_func is a variadic function; it retrieves all of its arguments,
+ both named and unnamed, and passes them to myfunc in the identical
+ order. myfunc will carry out the check on the passed values. Remember
+ that myfunc is not a variadic function. */
+MYFUNCTYPE stdarg_func(
+#define AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT
+#include "macro-def.h"
+#include TESTFILE
+#undef AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT
+) PCSATTR
+{
+ /* Start of the function body of stdarg_func. */
+ va_list ap;
+
+ VA_START (ap, LAST_NAMED_ARG_ID)
+ /* Zeroize the content of X0-X7 and V0-V7 to make sure that any va_arg
+ failure will not be hidden by the old data being in these registers. */
+ dummy_func (0, 0, 0, 0, 0, 0, 0, 0, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f);
+ /* A full memory barrier to ensure that compiler won't optimize away
+ va_arg code gen. */
+ __sync_synchronize ();
+ {
+ /* Assign all the function incoming arguments to local variables. */
+#define AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS
+#include "macro-def.h"
+#include TESTFILE
+#undef AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS
+
+ /* Call myfunc and pass in the local variables prepared above. */
+ myfunc (
+#define AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST
+#include "macro-def.h"
+#include TESTFILE
+#undef AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST
+);
+ }
+ va_end (ap);
+}
+
+#endif /* AAPCS64_TEST_STDARG */
+
+
+int main()
+{
+#ifdef RUNTIME_ENDIANNESS_CHECK
+ rt_endian_check();
+#endif
+#ifdef HAS_DATA_INIT_FUNC
+ init_data ();
+#endif
+
+#ifndef AAPCS64_TEST_STDARG
+ which_kind_of_test = TK_PARAM;
+ myfunc(
+#else
+ which_kind_of_test = TK_VA_ARG;
+ stdarg_func(
+#endif
+#define AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST
+#include "macro-def.h"
+#include TESTFILE
+#undef AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST
+);
+ return 0;
+}
+
===================================================================
@@ -0,0 +1,93 @@
+/* Test AAPCS64 layout and __builtin_va_arg.
+
+ This test covers homogeneous floating-point aggregate types and homogeneous
+ short-vector aggregate types as described in AAPCS64 \S 4.3.5. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define AAPCS64_TEST_STDARG
+#define TESTFILE "va_arg-4.c"
+#include "type-def.h"
+
+struct hfa_fx1_t hfa_fx1 = {12.345f};
+struct hfa_fx2_t hfa_fx2 = {123.456f, 234.456f};
+struct hfa_dx2_t hfa_dx2 = {234.567, 345.678};
+struct hfa_dx4_t hfa_dx4 = {1234.123, 2345.234, 3456.345, 4567.456};
+struct hfa_ldx3_t hfa_ldx3 = {123456.7890, 234567.8901, 345678.9012};
+struct non_hfa_fx5_t non_hfa_fx5 = {456.789f, 567.890f, 678.901f, 789.012f, 890.123f};
+struct hfa_ffs_t hfa_ffs;
+struct non_hfa_ffs_t non_hfa_ffs;
+struct non_hfa_ffs_2_t non_hfa_ffs_2;
+struct hva_vf2x1_t hva_vf2x1;
+struct hva_vf2x2_t hva_vf2x2;
+struct hva_vi4x1_t hva_vi4x1;
+struct non_hfa_ffd_t non_hfa_ffd = {23.f, 24.f, 25.0};
+struct non_hfa_ii_t non_hfa_ii = {26, 27};
+struct non_hfa_c_t non_hfa_c = {28};
+struct non_hfa_ffvf2_t non_hfa_ffvf2;
+struct non_hfa_fffd_t non_hfa_fffd = {33.f, 34.f, 35.f, 36.0};
+union hfa_union_t hfa_union;
+union non_hfa_union_t non_hfa_union;
+
+#define HAS_DATA_INIT_FUNC
+void init_data ()
+{
+ hva_vf2x1.a = (vf2_t){17.f, 18.f};
+ hva_vf2x2.a = (vf2_t){19.f, 20.f};
+ hva_vf2x2.b = (vf2_t){21.f, 22.f};
+ hva_vi4x1.a = (vi4_t){19, 20, 21, 22};
+
+ non_hfa_ffvf2.a = 29.f;
+ non_hfa_ffvf2.b = 30.f;
+ non_hfa_ffvf2.c = (vf2_t){31.f, 32.f};
+
+ hfa_union.s.a = 37.f;
+ hfa_union.s.b = 38.f;
+ hfa_union.c = 39.f;
+
+ non_hfa_union.a = 40.0;
+ non_hfa_union.b = 41.f;
+
+ hfa_ffs.a = 42.f;
+ hfa_ffs.b = 43.f;
+ hfa_ffs.c.a = 44.f;
+ hfa_ffs.c.b = 45.f;
+
+ non_hfa_ffs.a = 46.f;
+ non_hfa_ffs.b = 47.f;
+ non_hfa_ffs.c.a = 48.0;
+ non_hfa_ffs.c.b = 49.0;
+
+ non_hfa_ffs_2.s.a = 50;
+ non_hfa_ffs_2.s.b = 51;
+ non_hfa_ffs_2.c = 52.f;
+ non_hfa_ffs_2.d = 53.f;
+}
+
+#include "abitest.h"
+#else
+ ARG (int , 1, X0, LAST_NAMED_ARG_ID)
+ DOTS
+ /* HFA or HVA passed in fp/simd registers or on stack. */
+ ANON (struct hfa_fx1_t , hfa_fx1 , S0 , 0)
+ ANON (struct hfa_fx2_t , hfa_fx2 , S1 , 1)
+ ANON (struct hfa_dx2_t , hfa_dx2 , D3 , 2)
+ ANON (struct hva_vf2x1_t, hva_vf2x1, D5 , 11)
+ ANON (struct hva_vi4x1_t, hva_vi4x1, Q6 , 12)
+ ANON (struct hfa_dx4_t , hfa_dx4 , STACK , 3)
+ ANON (struct hfa_ffs_t , hfa_ffs , STACK+32, 4)
+ ANON (union hfa_union_t, hfa_union, STACK+48, 5)
+ ANON (struct hfa_ldx3_t , hfa_ldx3 , STACK+64, 6)
+ /* Non-H[FV]A passed in general registers or on stack or via reference. */
+ PTR_ANON (struct non_hfa_fx5_t , non_hfa_fx5 , X1 , 10)
+ ANON (struct non_hfa_ffd_t , non_hfa_ffd , X2 , 13)
+ ANON (struct non_hfa_ii_t , non_hfa_ii , X4 , 14)
+ ANON (struct non_hfa_c_t , non_hfa_c , X5 , 15)
+ ANON (struct non_hfa_ffvf2_t, non_hfa_ffvf2, X6 , 16)
+ PTR_ANON (struct non_hfa_fffd_t , non_hfa_fffd , STACK+112, 17)
+ PTR_ANON (struct non_hfa_ffs_t , non_hfa_ffs , STACK+120, 18)
+ ANON (struct non_hfa_ffs_2_t, non_hfa_ffs_2, STACK+128, 19)
+ ANON (union non_hfa_union_t, non_hfa_union, STACK+144, 20)
+ LAST_ANON(int , 2 , STACK+152, 30)
+#endif
===================================================================
@@ -0,0 +1,20 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target arm*-*-eabi* } } */
+/* { dg-require-effective-target arm_hard_vfp_ok } */
+/* { dg-require-effective-target arm32 } */
+/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "test_4.c"
+
+__complex__ float x = 1.0f + 2.0fi;
+#include "abitest.h"
+#else
+ARG (float, 1.0f, S0)
+ARG (__complex__ float, x, S1)
+ARG (float, 2.0f, S3)
+ARG (double, 5.0, D4)
+LAST_ARG_NONFLAT (int, 3, X0, i32in64)
+#endif
===================================================================
@@ -0,0 +1,40 @@
+/* Test AAPCS64 layout and __builtin_va_arg.
+
+ This test is focus on certain unnamed homogeneous floating-point aggregate
+ types passed in fp/simd registers. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define AAPCS64_TEST_STDARG
+#define TESTFILE "va_arg-6.c"
+#include "type-def.h"
+
+struct hfa_fx1_t hfa_fx1 = {12.345f};
+struct hfa_dx2_t hfa_dx2 = {234.567, 345.678};
+struct hfa_ffs_t hfa_ffs;
+union hfa_union_t hfa_union;
+
+#define HAS_DATA_INIT_FUNC
+void init_data ()
+{
+ hfa_union.s.a = 37.f;
+ hfa_union.s.b = 38.f;
+ hfa_union.c = 39.f;
+
+ hfa_ffs.a = 42.f;
+ hfa_ffs.b = 43.f;
+ hfa_ffs.c.a = 44.f;
+ hfa_ffs.c.b = 45.f;
+}
+
+#include "abitest.h"
+#else
+ ARG (int, 1, X0, LAST_NAMED_ARG_ID)
+ DOTS
+ ANON (struct hfa_ffs_t , hfa_ffs , S0 , 0)
+ ANON (union hfa_union_t, hfa_union, S4 , 1)
+ ANON (struct hfa_dx2_t , hfa_dx2 , D6 , 2)
+ ANON (struct hfa_fx1_t , hfa_fx1 , STACK , 3)
+ LAST_ANON(double , 1.0 , STACK+8, 4)
+#endif
===================================================================
@@ -0,0 +1,25 @@
+/* Test AAPCS64 layout and __builtin_va_arg.
+
+ Miscellaneous test: HFA anonymous parameter passed in SIMD/FP regs. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define AAPCS64_TEST_STDARG
+#define TESTFILE "va_arg-8.c"
+
+struct z
+{
+ double x[4];
+};
+
+struct z a = { 5.0, 6.0, 7.0, 8.0 };
+
+#include "abitest.h"
+#else
+ ARG(int, 0xdeadbeef, W0, LAST_NAMED_ARG_ID)
+ DOTS
+ ANON(double, 4.0, D0, 1)
+ LAST_ANON(struct z, a, D1, 2)
+
+#endif
===================================================================
@@ -0,0 +1,26 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_6.c"
+
+__complex__ double x = 1.0+2.0i;
+
+struct y
+{
+ int p;
+ int q;
+ int r;
+ int s;
+} v = { 1, 2, 3, 4 };
+
+#include "abitest.h"
+#else
+ ARG(struct y, v, X0)
+ ARG(float, 1.0f, S0)
+ ARG(__complex__ double, x, D1)
+ ARG(float, 2.0f, S3)
+ ARG(double, 5.0, D4)
+ LAST_ARG(int, 3, W2)
+#endif
===================================================================
@@ -0,0 +1,24 @@
+/* Test AAPCS layout (VFP variant) */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "test_8.c"
+
+struct z
+{
+ double x[4];
+};
+
+struct z a = { 5.0, 6.0, 7.0, 8.0 };
+struct z b = { 9.0, 10.0, 11.0, 12.0 };
+
+#include "abitest.h"
+#else
+ ARG(struct z, a, D0)
+ ARG(struct z, b, D4)
+ ARG(double, 0.5, STACK)
+ ARG(int, 7, W0)
+ LAST_ARG(int, 8, W1)
+#endif
===================================================================
@@ -0,0 +1,67 @@
+# Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
+# Contributed by ARM Ltd.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>. */
+
+load_lib c-torture.exp
+load_lib target-supports.exp
+load_lib torture-options.exp
+
+if { ![istarget aarch64*-*-*] } then {
+ return
+}
+
+torture-init
+set-torture-options $C_TORTURE_OPTIONS
+set additional_flags "-W -Wall -Wno-abi"
+
+# Test parameter passing.
+foreach src [lsort [glob -nocomplain $srcdir/$subdir/test_*.c]] {
+ if {[runtest_file_p $runtests $src]} {
+ c-torture-execute [list $src \
+ $srcdir/$subdir/abitest.S] \
+ $additional_flags
+ }
+}
+
+# Test unnamed argument retrieval via the va_arg macro.
+foreach src [lsort [glob -nocomplain $srcdir/$subdir/va_arg-*.c]] {
+ if {[runtest_file_p $runtests $src]} {
+ c-torture-execute [list $src \
+ $srcdir/$subdir/abitest.S] \
+ $additional_flags
+ }
+}
+
+# Test function return value.
+foreach src [lsort [glob -nocomplain $srcdir/$subdir/func-ret-*.c]] {
+ if {[runtest_file_p $runtests $src]} {
+ c-torture-execute [list $src \
+ $srcdir/$subdir/abitest.S] \
+ $additional_flags
+ }
+}
+
+# Test no internal compiler errors.
+foreach src [lsort [glob -nocomplain $srcdir/$subdir/ice_*.c]] {
+ if {[runtest_file_p $runtests $src]} {
+ c-torture [list $src] \
+ $additional_flags
+ }
+}
+
+torture-finish
===================================================================
@@ -0,0 +1,21 @@
+/* Test AAPCS64 layout */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_21.c"
+
+#include "abitest.h"
+
+#else
+ ARG(int, 8, W0)
+ ARG(double, 1.0, D0)
+ ARG(double, 2.0, D1)
+ ARG(double, 3.0, D2)
+ ARG(double, 4.0, D3)
+ ARG(double, 5.0, D4)
+ ARG(double, 6.0, D5)
+ ARG(double, 7.0, D6)
+ ARG(_Complex double, 1234.0 + 567.0i, STACK)
+ LAST_ARG(double, -987.0, STACK+16)
+#endif
===================================================================
@@ -0,0 +1,71 @@
+/* Test AAPCS64 function result return.
+
+ This test covers most composite types as described in AAPCS64 \S 4.3.
+ Homogeneous floating-point aggregate types are covered in func-ret-3.c. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+/* { dg-additional-sources "abitest.S" } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "func-ret-2.c"
+
+struct x0
+{
+ char ch;
+ int i;
+} ys0 = { 'a', 12345 };
+
+struct x1
+{
+ int a;
+ unsigned int b;
+ unsigned int c;
+ unsigned int d;
+} ys1 = { 0xdeadbeef, 0xcafebabe, 0x87654321, 0xbcedf975 };
+
+struct x2
+{
+ long long a;
+ long long b;
+ char ch;
+} y2 = { 0x12, 0x34, 0x56 };
+
+union x3
+{
+ char ch;
+ int i;
+ long long ll;
+} y3;
+
+union x4
+{
+ int i;
+ struct x2 y2;
+} y4;
+
+#define HAS_DATA_INIT_FUNC
+void init_data ()
+{
+ /* Init small union. */
+ y3.ll = 0xfedcba98LL;
+
+ /* Init big union. */
+ y4.y2.a = 0x78;
+ y4.y2.b = 0x89;
+ y4.y2.ch= 0x9a;
+}
+
+
+#include "abitest-2.h"
+#else
+ /* Composite smaller than or equal to 16 bytes returned in X0 and X1. */
+FUNC_VAL_CHECK ( 0, struct x0, ys0, X0, flat)
+FUNC_VAL_CHECK ( 1, struct x1, ys1, X0, flat)
+FUNC_VAL_CHECK ( 2, union x3, y3, X0, flat)
+
+ /* Composite larger than 16 bytes returned in the caller-reserved memory
+ block of which the address is passed as an additional argument to the
+ function in X8. */
+FUNC_VAL_CHECK (10, struct x2, y2, X8, flat)
+FUNC_VAL_CHECK (11, union x4, y4, X8, flat)
+#endif
===================================================================
@@ -0,0 +1,42 @@
+/* Test AAPCS64 layout.
+
+ Larger than machine-supported vector size. The behaviour is unspecified by
+ the AAPCS64 document; the implementation opts for pass by reference. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_23.c"
+
+typedef char A __attribute__ ((vector_size (64)));
+
+struct y
+{
+ double df[8];
+};
+
+union u
+{
+ struct y x;
+ A a;
+} u;
+
+#define HAS_DATA_INIT_FUNC
+void init_data ()
+{
+ u.x.df[0] = 1.0;
+ u.x.df[1] = 2.0;
+ u.x.df[2] = 3.0;
+ u.x.df[3] = 4.0;
+ u.x.df[4] = 5.0;
+ u.x.df[5] = 6.0;
+ u.x.df[6] = 7.0;
+ u.x.df[7] = 8.0;
+}
+
+#include "abitest.h"
+#else
+ARG (float, 123.0f, S0)
+PTR (A, u.a, X0)
+LAST_ARG_NONFLAT (int, 0xdeadbeef, X1, i32in64)
+#endif
===================================================================
@@ -0,0 +1,26 @@
+/* Test AAPCS64 function result return.
+
+ This test covers complex types. Complex floating-point types are treated
+ as homogeneous floating-point aggregates, while complex integral types
+ are treated as general composite types. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+/* { dg-additional-sources "abitest.S" } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "func-ret-4.c"
+
+#include "abitest-2.h"
+#else
+ /* Complex floating-point types are passed in fp/simd registers. */
+FUNC_VAL_CHECK ( 0, _Complex float , 12.3f + 23.4fi, S0, flat)
+FUNC_VAL_CHECK ( 1, _Complex double, 34.56 + 45.67i, D0, flat)
+FUNC_VAL_CHECK ( 2, _Complex long double, 56789.01234 + 67890.12345i, Q0, flat)
+
+ /* Complex integral types are passed in general registers or via a pointer in
+ X8. */
+FUNC_VAL_CHECK (10, _Complex short , 12345 + 23456i, X0, flat)
+FUNC_VAL_CHECK (11, _Complex int , 34567 + 45678i, X0, flat)
+FUNC_VAL_CHECK (12, _Complex __int128, 567890 + 678901i, X8, flat)
+
+#endif
===================================================================
@@ -0,0 +1,61 @@
+/* Test AAPCS64 layout
+
+ Test homogeneous floating-point aggregates and homogeneous short-vector
+ aggregates, which should be passed in SIMD/FP registers or via the
+ stack. */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_25.c"
+
+typedef float vf2_t __attribute__((vector_size (8)));
+struct x0
+{
+ vf2_t v;
+} s0;
+struct x3
+{
+ vf2_t v[2];
+} s3;
+struct x4
+{
+ vf2_t v[3];
+} s4;
+
+typedef float vf4_t __attribute__((vector_size(16)));
+struct x1
+{
+ vf4_t v;
+} s1;
+
+struct x2
+{
+ double df[3];
+} s2;
+
+#define HAS_DATA_INIT_FUNC
+void init_data ()
+{
+ s0.v = (vf2_t){ 17.f, 18.f };
+ s1.v = (vf4_t){ 567.890f, 678.901f, 789.012f, 890.123f };
+ s2.df[0] = 123.456;
+ s2.df[1] = 234.567;
+ s2.df[2] = 345.678;
+ s3.v[0] = (vf2_t){ 19.f, 20.f, 21.f, 22.f };
+ s3.v[1] = (vf2_t){ 23.f, 24.f, 25.f, 26.f };
+ s4.v[0] = (vf2_t){ 27.f, 28.f, 29.f, 30.f };
+ s4.v[1] = (vf2_t){ 31.f, 32.f, 33.f, 34.f };
+ s4.v[2] = (vf2_t){ 35.f, 36.f, 37.f, 38.f };
+}
+
+#include "abitest.h"
+#else
+ARG_NONFLAT (struct x0, s0, Q0, f32in64)
+ARG (struct x2, s2, D1)
+ARG (struct x1, s1, Q4)
+ARG (struct x3, s3, D5)
+ARG (struct x4, s4, STACK)
+ARG_NONFLAT (int, 0xdeadbeef, X0, i32in64)
+LAST_ARG (double, 456.789, STACK+24)
+#endif
===================================================================
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+typedef struct {
+ volatile unsigned long a:8;
+ volatile unsigned long b:8;
+ volatile unsigned long c:16;
+} BitStruct;
+
+BitStruct bits;
+
+unsigned long foo ()
+{
+ return bits.b;
+}
+
+/* { dg-final { scan-assembler "ldr\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" } } */
===================================================================
@@ -0,0 +1,105 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -ffast-math" } */
+
+extern void abort (void);
+
+#include "vect-fmax-fmin.x"
+
+#include "vect-fmaxv-fminv.x"
+
+#define DEFN_SETV(type) \
+ set_vector_##type (pR##type a, type n) \
+ { \
+ int i; \
+ for (i=0; i<16; i++) \
+ a[i] = n; \
+ }
+
+#define DEFN_CHECKV(type) \
+ void check_vector_##type (pR##type a, pR##type vec) \
+ { \
+ int i; \
+ for (i=0; i<16; i++) \
+ if (a[i] != vec[i]) \
+ abort (); \
+ }
+
+#define TEST2(fname, type) \
+ set_vector_##type (c##type, 0.0); \
+ fname##_##type (a##type, b##type); \
+ check_vector_##type (c##type, fname##_##type##_vector);
+
+#define TEST3(fname, type) \
+ set_vector_##type (c##type, 0.0); \
+ fname##_##type (a##type, b##type, c##type); \
+ check_vector_##type (c##type, fname##_##type##_vector);
+
+#define TEST(fname, N) \
+ TEST##N (fname, F32); \
+ TEST##N (fname, F64);
+
+typedef float F32;
+typedef double F64;
+
+DEFN_SETV (F32)
+DEFN_SETV (F64)
+
+DEFN_CHECKV (F32)
+DEFN_CHECKV (F64)
+
+int main (void)
+{
+
+ F32 aF32[16];
+ F32 bF32[16];
+ F32 cF32[16];
+
+ F64 aF64[16];
+ F64 bF64[16];
+ F64 cF64[16];
+ int i;
+
+ /* Golden vectors. */
+ F32 max_F32_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0,
+ 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0 };
+
+ F64 max_F64_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0,
+ 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0 };
+
+ F32 min_F32_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0,
+ 7.0, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0, 0.0 };
+
+ F64 min_F64_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0,
+ 7.0, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0, 0.0 };
+
+ F32 minv_F32_value = 0.0f;
+ F32 maxv_F32_value = 15.0f;
+
+ F64 minv_F64_value = 0.0;
+ F64 maxv_F64_value = 15.0;
+
+ /* Setup input vectors. */
+ for (i=0; i<16; i++)
+ {
+ aF32[i] = (float)(15-i);
+ bF32[i] = (float)i;
+ aF64[i] = (double)(15-i);
+ bF64[i] = (double)i;
+ }
+
+ TEST (max, 3);
+ TEST (min, 3);
+
+ /* Test across lanes ops. */
+ if (maxv_f32 (max_F32_vector) != maxv_F32_value)
+ abort ();
+ if (minv_f32 (min_F32_vector) != minv_F32_value)
+ abort ();
+
+ if (maxv_f64 (max_F64_vector) != maxv_F64_value)
+ abort ();
+ if (minv_f64 (min_F64_vector) != minv_F64_value)
+ abort ();
+
+ return 0;
+}
===================================================================
@@ -0,0 +1,128 @@
+/* { dg-options "-O2 -mcmodel=small -fPIC -fno-builtin" } */
+/* { dg-do compile } */
+
+typedef long unsigned int size_t;
+enum
+{
+ __LC_TIME = 2,
+};
+enum
+{
+ ABDAY_1 = (((__LC_TIME) << 16) | (0)),
+ DAY_1,
+ ABMON_1,
+ MON_1,
+ D_T_FMT,
+};
+typedef struct __locale_struct
+{
+ struct locale_data *__locales[13];
+} *__locale_t;
+struct tm
+{
+ int tm_sec;
+ int tm_min;
+ int tm_hour;
+};
+struct locale_data
+{
+ const char *name;
+ struct
+ {
+ const char *string;
+ }
+ values [];
+};
+extern const struct locale_data _nl_C_LC_TIME __attribute__ ((visibility ("hidden")));
+char *
+__strptime_internal (rp, fmt, tmp, statep , locale)
+ const char *rp;
+ const char *fmt;
+ __locale_t locale;
+ void *statep;
+{
+ struct locale_data *const current = locale->__locales[__LC_TIME];
+ const char *rp_backup;
+ const char *rp_longest;
+ int cnt;
+ size_t val;
+ enum ptime_locale_status { not, loc, raw } decided_longest;
+ struct __strptime_state
+ {
+ enum ptime_locale_status decided : 2;
+ } s;
+ struct tm tmb;
+ struct tm *tm;
+ if (statep == ((void *)0))
+ {
+ memset (&s, 0, sizeof (s));
+ }
+ {
+ tm = &tmb;
+ }
+ while (*fmt != '\0')
+ {
+ if (*fmt != '%')
+ {
+ if (*fmt++ != *rp++) return ((void *)0);
+ continue;
+ }
+ if (statep != ((void *)0))
+ {
+ ++fmt;
+ }
+ rp_backup = rp;
+ switch (*fmt++)
+ {
+ case '%':
+ for (cnt = 0; cnt < 7; ++cnt)
+ {
+ const char *trp;
+ if (s.decided !=raw)
+ {
+ if (({ size_t len = strlen ((current->values[((int) (DAY_1 + cnt) & 0xffff)].string)); int result = __strncasecmp_l (((current->values[((int) (DAY_1 + cnt) & 0xffff)].string)), (trp), len, locale) == 0; if (result) (trp) += len; result; })
+ && trp > rp_longest)
+ {
+ }
+ if (({ size_t len = strlen ((current->values[((int) (ABDAY_1 + cnt) & 0xffff)].string)); int result = __strncasecmp_l (((current->values[((int) (ABDAY_1 + cnt) & 0xffff)].string)), (trp), len, locale) == 0; if (result) (trp) += len; result; })
+ && trp > rp_longest)
+ {
+ }
+ }
+ if (s.decided != loc
+ && (((trp = rp, ({ size_t len = strlen ((&_nl_C_LC_TIME.values[((int) (DAY_1) & 0xffff)].string)[cnt]); int result = __strncasecmp_l (((&_nl_C_LC_TIME.values[((int) (DAY_1) & 0xffff)].string)[cnt]), (trp), len, locale) == 0; if (result) (trp) += len; result; }))
+ && trp > rp_longest)
+ || ((trp = rp, ({ size_t len = strlen ((&_nl_C_LC_TIME.values[((int) (ABDAY_1) & 0xffff)].string)[cnt]); int result = __strncasecmp_l (((&_nl_C_LC_TIME.values[((int) (ABDAY_1) & 0xffff)].string)[cnt]), (rp), len, locale) == 0; if (result) (rp) += len; result; }))
+ && trp > rp_longest)))
+ {
+ }
+ }
+ {
+ const char *trp;
+ if (s.decided != loc
+ && (((trp = rp, ({ size_t len = strlen ((&_nl_C_LC_TIME.values[((int) (MON_1) & 0xffff)].string)[cnt]); int result = __strncasecmp_l (((&_nl_C_LC_TIME.values[((int) (MON_1) & 0xffff)].string)[cnt]), (trp), len, locale) == 0; if (result) (trp) += len; result; }))
+ && trp > rp_longest)
+ || ((trp = rp, ({ size_t len = strlen ((&_nl_C_LC_TIME.values[((int) (ABMON_1) & 0xffff)].string)[cnt]); int result = __strncasecmp_l (((&_nl_C_LC_TIME.values[((int) (ABMON_1) & 0xffff)].string)[cnt]), (trp), len, locale) == 0; if (result) (trp) += len; result; }))
+ && trp > rp_longest)))
+ {
+ }
+ }
+ case 'c':
+ {
+ if (!(*((current->values[((int) (D_T_FMT) & 0xffff)].string)) != '\0' && (rp = __strptime_internal (rp, ((current->values[((int) (D_T_FMT) & 0xffff)].string)), tm, &s , locale)) != ((void *)0)))
+ {
+ rp = rp_backup;
+ }
+ }
+ case 'C':
+ do { int __n = 2; val = 0; while (*rp == ' ') ++rp; if (*rp < '0' || *rp > '9') return ((void *)0); do { val *= 10; val += *rp++ - '0'; } while (--__n > 0 && val * 10 <= 99 && *rp >= '0' && *rp <= '9'); if (val < 0 || val > 99) return ((void *)0); } while (0);
+ case 'F':
+ if (!(*("%Y-%m-%d") != '\0' && (rp = __strptime_internal (rp, ("%Y-%m-%d"), tm, &s , locale)) != ((void *)0)))
+ tm->tm_hour = val % 12;
+ }
+ }
+}
+char *
+__strptime_l (buf, format, tm , locale)
+{
+}
===================================================================
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+typedef struct {
+ volatile unsigned long a:8;
+ volatile unsigned long b:8;
+ volatile unsigned long c:16;
+} BitStruct;
+
+BitStruct bits;
+
+unsigned long foo ()
+{
+ return bits.c;
+}
+
+/* { dg-final { scan-assembler "ldr\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" } } */
===================================================================
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int r;
+
+void test (int a, int b)
+{
+ /* { dg-final { scan-assembler "mneg\tw\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */
+ r = (-a) * b;
+}
===================================================================
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int r;
+
+void test (int a, int b)
+{
+ /* { dg-final { scan-assembler "mneg\tw\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */
+ r = a * (-b);
+}
===================================================================
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+volatile unsigned int w0, w1, w2, w3, w4;
+volatile int result;
+
+void test_si() {
+ /* { dg-final { scan-assembler "adc\tw\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */
+ w0 = w1 + w2 + (w3 >= w4);
+}
+
+volatile unsigned long long int x0, x1, x2, x3, x4;
+
+void test_di() {
+ /* { dg-final { scan-assembler "adc\tx\[0-9\]*, x\[0-9\]*, x\[0-9\]*\n" } } */
+ x0 = x1 + x2 + (x3 >= x4);
+}
+
===================================================================
@@ -0,0 +1,277 @@
+/* { dg-do run } */
+/* { dg-options "-O2" } */
+
+extern void abort (void);
+
+/* This series of tests looks for the optimization:
+ x = (a >= b) + c + d
+ =>
+ cmp a, b
+ adc x, c, d
+ */
+
+unsigned long
+ltu_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d)
+{
+ return (a < b) + c + d;
+}
+
+unsigned long
+gtu_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d)
+{
+ return (a > b) + c + d;
+}
+
+unsigned long
+leu_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d)
+{
+ return (a <= b) + c + d;
+}
+
+unsigned long
+geu_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d)
+{
+ return (a >= b) + c + d;
+}
+
+unsigned long
+equ_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d)
+{
+ return (a == b) + c + d;
+}
+
+unsigned long
+neu_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d)
+{
+ return (a != b) + c + d;
+}
+
+long
+lt_add ( long a, long b, long c, long d)
+{
+ return (a < b) + c + d;
+}
+
+long
+gt_add ( long a, long b, long c, long d)
+{
+ return (a > b) + c + d;
+}
+
+long
+le_add ( long a, long b, long c, long d)
+{
+ return (a <= b) + c + d;
+}
+
+long
+ge_add ( long a, long b, long c, long d)
+{
+ return (a >= b) + c + d;
+}
+
+long
+eq_add ( long a, long b, long c, long d)
+{
+ return (a == b) + c + d;
+}
+
+long
+ne_add ( long a, long b, long c, long d)
+{
+ return (a != b) + c + d;
+}
+
+
+int
+main ()
+{
+ if (ltu_add(1,2,3,4) != 8)
+ {
+ abort();
+ }
+
+ if (ltu_add(2,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (ltu_add(3,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (gtu_add(2,1,3,4) != 8)
+ {
+ abort();
+ }
+
+ if (gtu_add(2,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (gtu_add(1,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (leu_add(1,2,3,4) != 8)
+ {
+ abort();
+ }
+
+ if (leu_add(2,2,3,4) != 8)
+ {
+ abort();
+ }
+
+ if (leu_add(3,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (leu_add(2,1,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (geu_add(2,1,3,4) != 8)
+ {
+ abort();
+ }
+ if (geu_add(2,2,3,4) != 8)
+ {
+ abort();
+ }
+
+ if (geu_add(1,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (equ_add(1,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (equ_add(2,2,3,4) != 8)
+ {
+ abort();
+ }
+
+ if (equ_add(3,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (neu_add(1,2,3,4) != 8)
+ {
+ abort();
+ }
+
+ if (neu_add(2,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (neu_add(3,2,3,4) != 8)
+ {
+ abort();
+ }
+
+ if (lt_add(1,2,3,4) != 8)
+ {
+ abort();
+ }
+
+ if (lt_add(2,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (lt_add(3,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (gt_add(2,1,3,4) != 8)
+ {
+ abort();
+ }
+
+ if (gt_add(2,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (gt_add(1,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (le_add(1,2,3,4) != 8)
+ {
+ abort();
+ }
+
+ if (le_add(2,2,3,4) != 8)
+ {
+ abort();
+ }
+
+ if (le_add(3,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (le_add(2,1,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (ge_add(2,1,3,4) != 8)
+ {
+ abort();
+ }
+ if (ge_add(2,2,3,4) != 8)
+ {
+ abort();
+ }
+
+ if (ge_add(1,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (eq_add(1,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (eq_add(2,2,3,4) != 8)
+ {
+ abort();
+ }
+
+ if (eq_add(3,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (ne_add(1,2,3,4) != 8)
+ {
+ abort();
+ }
+
+ if (ne_add(2,2,3,4) != 7)
+ {
+ abort();
+ }
+
+ if (ne_add(3,2,3,4) != 8)
+ {
+ abort();
+ }
+ return 0;
+}
===================================================================
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int r;
+
+void test (int a, int b)
+{
+ /* { dg-final { scan-assembler "mneg\tw\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */
+ r = - (a * b);
+}
===================================================================
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#define GPF float
+#define SUFFIX(x) x##f
+#define GPI unsigned int
+
+#include "fcvt.x"
+
+/* { dg-final { scan-assembler-times "fcvtzu\tw\[0-9\]+, *s\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *s\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtpu\tw\[0-9\]+, *s\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *s\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtmu\tw\[0-9\]+, *s\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtau\tw\[0-9\]+, *s\[0-9\]" 2 } } */
===================================================================
@@ -0,0 +1,140 @@
+typedef int *__restrict__ pRINT;
+typedef unsigned int *__restrict__ pRUINT;
+typedef long long *__restrict__ pRINT64;
+typedef unsigned long long *__restrict__ pRUINT64;
+
+void test_orn (pRUINT a, pRUINT b, pRUINT c)
+{
+ int i;
+ for (i = 0; i < 16; i++)
+ c[i] = a[i] | (~b[i]);
+}
+
+void test_bic (pRUINT a, pRUINT b, pRUINT c)
+{
+ int i;
+ for (i = 0; i < 16; i++)
+ c[i] = a[i] & (~b[i]);
+}
+
+void mla (pRINT a, pRINT b, pRINT c)
+{
+ int i;
+ for (i=0;i<16;i++)
+ c[i] += a[i] * b[i];
+}
+
+void mls (pRINT a, pRINT b, pRINT c)
+{
+ int i;
+ for (i=0;i<16;i++)
+ c[i] -= a[i] * b[i];
+}
+
+void smax (pRINT a, pRINT b, pRINT c)
+{
+ int i;
+ for (i=0;i<16;i++)
+ c[i] = (a[i] > b[i] ? a[i] : b[i]);
+}
+
+void smin (pRINT a, pRINT b, pRINT c)
+{
+ int i;
+ for (i=0;i<16;i++)
+ c[i] = (a[i] < b[i] ? a[i] : b[i]);
+}
+
+void umax (pRUINT a, pRUINT b, pRUINT c)
+{
+ int i;
+ for (i=0;i<16;i++)
+ c[i] = (a[i] > b[i] ? a[i] : b[i]);
+}
+
+void umin (pRUINT a, pRUINT b, pRUINT c)
+{
+ int i;
+ for (i=0;i<16;i++)
+ c[i] = (a[i] < b[i] ? a[i] : b[i]);
+}
+
+unsigned int reduce_umax (pRUINT a)
+{
+ int i;
+ unsigned int s = a[0];
+ for (i = 1; i < 16; i++)
+ s = (s > a[i] ? s : a[i]);
+
+ return s;
+}
+
+unsigned int reduce_umin (pRUINT a)
+{
+ int i;
+ unsigned int s = a[0];
+ for (i = 1; i < 16; i++)
+ s = (s < a[i] ? s : a[i]);
+
+ return s;
+}
+
+int reduce_smax (pRINT a)
+{
+ int i;
+ int s = a[0];
+ for (i = 1; i < 16; i++)
+ s = (s > a[i] ? s : a[i]);
+
+ return s;
+}
+
+int reduce_smin (pRINT a)
+{
+ int i;
+ int s = a[0];
+ for (i = 1; i < 16; i++)
+ s = (s < a[i] ? s : a[i]);
+
+ return s;
+}
+
+unsigned int reduce_add_u32 (pRINT a)
+{
+ int i;
+ unsigned int s = 0;
+ for (i = 0; i < 16; i++)
+ s += a[i];
+
+ return s;
+}
+
+int reduce_add_s32 (pRINT a)
+{
+ int i;
+ int s = 0;
+ for (i = 0; i < 16; i++)
+ s += a[i];
+
+ return s;
+}
+
+unsigned long long reduce_add_u64 (pRUINT64 a)
+{
+ int i;
+ unsigned long long s = 0;
+ for (i = 0; i < 16; i++)
+ s += a[i];
+
+ return s;
+}
+
+long long reduce_add_s64 (pRINT64 a)
+{
+ int i;
+ long long s = 0;
+ for (i = 0; i < 16; i++)
+ s += a[i];
+
+ return s;
+}
===================================================================
@@ -0,0 +1,170 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int
+ldr_uxtw (int *arr, unsigned int i)
+{
+ /* { dg-final { scan-assembler "ldr\tw\[0-9\]+,.*uxtw #?2]" } } */
+ return arr[i];
+}
+
+int
+ldr_uxtw0 (char *arr, unsigned int i)
+{
+ /* { dg-final { scan-assembler "ldr\tw\[0-9\]+,.*uxtw]" } } */
+ return arr[i];
+}
+
+int
+ldr_sxtw (int *arr, int i)
+{
+ /* { dg-final { scan-assembler "ldr\tw\[0-9\]+,.*sxtw #?2]" } } */
+ return arr[i];
+}
+
+int
+ldr_sxtw0 (char *arr, int i)
+{
+ /* { dg-final { scan-assembler "ldr\tw\[0-9\]+,.*sxtw]" } } */
+ return arr[i];
+}
+
+unsigned long long
+adddi_uxtw (unsigned long long a, unsigned int i)
+{
+ /* { dg-final { scan-assembler "add\tx\[0-9\]+,.*uxtw #?3" } } */
+ return a + ((unsigned long long)i << 3);
+}
+
+unsigned long long
+adddi_uxtw0 (unsigned long long a, unsigned int i)
+{
+ /* { dg-final { scan-assembler "add\tx\[0-9\]+,.*uxtw\n" } } */
+ return a + i;
+}
+
+long long
+adddi_sxtw (long long a, int i)
+{
+ /* { dg-final { scan-assembler "add\tx\[0-9\]+,.*sxtw #?3" } } */
+ return a + ((long long)i << 3);
+}
+
+long long
+adddi_sxtw0 (long long a, int i)
+{
+ /* { dg-final { scan-assembler "add\tx\[0-9\]+,.*sxtw\n" } } */
+ return a + i;
+}
+
+unsigned long long
+subdi_uxtw (unsigned long long a, unsigned int i)
+{
+ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*uxtw #?3" } } */
+ return a - ((unsigned long long)i << 3);
+}
+
+unsigned long long
+subdi_uxtw0 (unsigned long long a, unsigned int i)
+{
+ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*uxtw\n" } } */
+ return a - i;
+}
+
+long long
+subdi_sxtw (long long a, int i)
+{
+ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*sxtw #?3" } } */
+ return a - ((long long)i << 3);
+}
+
+long long
+subdi_sxtw0 (long long a, int i)
+{
+ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*sxtw\n" } } */
+ return a - (long long)i;
+}
+
+unsigned long long
+subdi_uxth (unsigned long long a, unsigned short i)
+{
+ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*uxth #?1" } } */
+ return a - ((unsigned long long)i << 1);
+}
+
+unsigned long long
+subdi_uxth0 (unsigned long long a, unsigned short i)
+{
+ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*uxth\n" } } */
+ return a - i;
+}
+
+long long
+subdi_sxth (long long a, short i)
+{
+ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*sxth #?1" } } */
+ return a - ((long long)i << 1);
+}
+
+long long
+subdi_sxth0 (long long a, short i)
+{
+ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*sxth\n" } } */
+ return a - (long long)i;
+}
+
+unsigned int
+subsi_uxth (unsigned int a, unsigned short i)
+{
+ /* { dg-final { scan-assembler "sub\tw\[0-9\]+,.*uxth #?1" } } */
+ return a - ((unsigned int)i << 1);
+}
+
+unsigned int
+subsi_uxth0 (unsigned int a, unsigned short i)
+{
+ /* { dg-final { scan-assembler "sub\tw\[0-9\]+,.*uxth\n" } } */
+ return a - i;
+}
+
+int
+subsi_sxth (int a, short i)
+{
+ /* { dg-final { scan-assembler "sub\tw\[0-9\]+,.*sxth #?1" } } */
+ return a - ((int)i << 1);
+}
+
+int
+subsi_sxth0 (int a, short i)
+{
+ /* { dg-final { scan-assembler "sub\tw\[0-9\]+,.*sxth\n" } } */
+ return a - (int)i;
+}
+
+unsigned int
+addsi_uxth (unsigned int a, unsigned short i)
+{
+ /* { dg-final { scan-assembler "add\tw\[0-9\]+,.*uxth #?1" } } */
+ return a + ((unsigned int)i << 1);
+}
+
+unsigned int
+addsi_uxth0 (unsigned int a, unsigned short i)
+{
+ /* { dg-final { scan-assembler "add\tw\[0-9\]+,.*uxth\n" } } */
+ return a + i;
+}
+
+int
+addsi_sxth (int a, short i)
+{
+ /* { dg-final { scan-assembler "add\tw\[0-9\]+,.*sxth #?1" } } */
+ return a + ((int)i << 1);
+}
+
+int
+addsi_sxth0 (int a, short i)
+{
+ /* { dg-final { scan-assembler "add\tw\[0-9\]+,.*sxth\n" } } */
+ return a + (int)i;
+}
===================================================================
@@ -0,0 +1,20 @@
+
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+
+#include "vect.x"
+
+/* { dg-final { scan-assembler "orn\\tv" } } */
+/* { dg-final { scan-assembler "bic\\tv" } } */
+/* { dg-final { scan-assembler "mla\\tv" } } */
+/* { dg-final { scan-assembler "mls\\tv" } } */
+/* { dg-final { scan-assembler "smax\\tv" } } */
+/* { dg-final { scan-assembler "smin\\tv" } } */
+/* { dg-final { scan-assembler "umax\\tv" } } */
+/* { dg-final { scan-assembler "umin\\tv" } } */
+/* { dg-final { scan-assembler "umaxv" } } */
+/* { dg-final { scan-assembler "uminv" } } */
+/* { dg-final { scan-assembler "smaxv" } } */
+/* { dg-final { scan-assembler "sminv" } } */
+/* { dg-final { scan-assembler-times "addv" 2} } */
+/* { dg-final { scan-assembler-times "addp" 2} } */
===================================================================
@@ -0,0 +1,44 @@
+
+typedef float F32;
+typedef double F64;
+typedef float *__restrict__ pRF32;
+typedef double *__restrict__ pRF64;
+
+extern float fabsf (float);
+extern double fabs (double);
+
+#define DEF3(fname, type, op) \
+ void fname##_##type (pR##type a, \
+ pR##type b, \
+ pR##type c) \
+ { \
+ int i; \
+ for (i=0; i<16; i++) \
+ a[i] = b[i] op c[i]; \
+ }
+
+#define DEF2(fname, type, op) \
+ void fname##_##type (pR##type a, \
+ pR##type b) \
+ { \
+ int i; \
+ for (i=0; i<16; i++) \
+ a[i] = op(b[i]); \
+ }
+
+
+#define DEFN3(fname, op) \
+ DEF3 (fname, F32, op) \
+ DEF3 (fname, F64, op)
+
+#define DEFN2(fname, op) \
+ DEF2 (fname, F32, op) \
+ DEF2 (fname, F64, op)
+
+DEFN3 (add, +)
+DEFN3 (sub, -)
+DEFN3 (mul, *)
+DEFN3 (div, /)
+DEFN2 (neg, -)
+DEF2 (abs, F32, fabsf)
+DEF2 (abs, F64, fabs)
===================================================================
@@ -0,0 +1,36 @@
+
+extern int abs (int);
+extern long labs (long);
+
+typedef signed char *__restrict__ pRINT8;
+typedef short *__restrict__ pRINT16;
+typedef int *__restrict__ pRINT32;
+typedef long *__restrict__ pRLONG;
+typedef long long *__restrict__ pRINT64;
+
+#define DEF_ABS(size) void absolute_s##size (pRINT##size a, pRINT##size b) \
+ { \
+ int i; \
+ for (i=0; i<N; i++) \
+ a[i] = (b[i] > 0 ? b[i] : -b[i]); \
+ }
+
+DEF_ABS (8);
+DEF_ABS (16);
+DEF_ABS (32);
+DEF_ABS (64);
+
+/* Test abs () vectorization. */
+void absolute_s32_lib (pRINT32 a, pRINT32 b)
+{
+ int i;
+ for (i=0; i<N; i++)
+ a[i] = abs (b[i]);
+}
+
+void absolute_l32_lib (pRLONG a, pRLONG b)
+{
+ int i;
+ for (i=0; i<N; i++)
+ a[i] = labs (b[i]);
+}
===================================================================
@@ -0,0 +1,13 @@
+
+
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+
+#include "vect-fp.x"
+
+/* { dg-final { scan-assembler "fadd\\tv" } } */
+/* { dg-final { scan-assembler "fsub\\tv" } } */
+/* { dg-final { scan-assembler "fmul\\tv" } } */
+/* { dg-final { scan-assembler "fdiv\\tv" } } */
+/* { dg-final { scan-assembler "fneg\\tv" } } */
+/* { dg-final { scan-assembler "fabs\\tv" } } */
===================================================================
@@ -0,0 +1,12 @@
+
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+
+#define N 16
+
+#include "vect-abs.x"
+
+/* { dg-final { scan-assembler "abs\\tv\[0-9\]+\.16b" } } */
+/* { dg-final { scan-assembler "abs\\tv\[0-9\]+\.8h" } } */
+/* { dg-final { scan-assembler "abs\\tv\[0-9\]+\.4s" } } */
+/* { dg-final { scan-assembler "abs\\tv\[0-9\]+\.2d" } } */
===================================================================
@@ -0,0 +1,125 @@
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+
+#include "arm_neon.h"
+
+#define TWO(name, rettype, rmwtype, intype, fs) \
+ rettype test_ ## name ## _ ## fs \
+ (rmwtype a, intype b, intype c) \
+ { \
+ return name ## _ ## fs (a, b, c); \
+ }
+
+TWO (vsubhn_high, int8x16_t, int8x8_t, int16x8_t, s16)
+TWO (vsubhn_high, int16x8_t, int16x4_t, int32x4_t, s32)
+TWO (vsubhn_high, int32x4_t, int32x2_t, int64x2_t, s64)
+TWO (vsubhn_high, uint8x16_t, uint8x8_t, uint16x8_t, u16)
+TWO (vsubhn_high, uint16x8_t, uint16x4_t, uint32x4_t, u32)
+TWO (vsubhn_high, uint32x4_t, uint32x2_t, uint64x2_t, u64)
+
+TWO (vaddhn_high, int8x16_t, int8x8_t, int16x8_t, s16)
+TWO (vaddhn_high, int16x8_t, int16x4_t, int32x4_t, s32)
+TWO (vaddhn_high, int32x4_t, int32x2_t, int64x2_t, s64)
+TWO (vaddhn_high, uint8x16_t, uint8x8_t, uint16x8_t, u16)
+TWO (vaddhn_high, uint16x8_t, uint16x4_t, uint32x4_t, u32)
+TWO (vaddhn_high, uint32x4_t, uint32x2_t, uint64x2_t, u64)
+
+TWO (vrsubhn_high, int8x16_t, int8x8_t, int16x8_t, s16)
+TWO (vrsubhn_high, int16x8_t, int16x4_t, int32x4_t, s32)
+TWO (vrsubhn_high, int32x4_t, int32x2_t, int64x2_t, s64)
+TWO (vrsubhn_high, uint8x16_t, uint8x8_t, uint16x8_t, u16)
+TWO (vrsubhn_high, uint16x8_t, uint16x4_t, uint32x4_t, u32)
+TWO (vrsubhn_high, uint32x4_t, uint32x2_t, uint64x2_t, u64)
+
+TWO (vraddhn_high, int8x16_t, int8x8_t, int16x8_t, s16)
+TWO (vraddhn_high, int16x8_t, int16x4_t, int32x4_t, s32)
+TWO (vraddhn_high, int32x4_t, int32x2_t, int64x2_t, s64)
+TWO (vraddhn_high, uint8x16_t, uint8x8_t, uint16x8_t, u16)
+TWO (vraddhn_high, uint16x8_t, uint16x4_t, uint32x4_t, u32)
+TWO (vraddhn_high, uint32x4_t, uint32x2_t, uint64x2_t, u64)
+
+#define TWOn(name, rettype, rmwtype, intype, fs) \
+ rettype test_ ## name ## _ ## fs \
+ (rmwtype a, intype b) \
+ { \
+ return name ## _ ## fs (a, b, 4); \
+ }
+
+TWOn (vrshrn_high_n, int8x16_t, int8x8_t, int16x8_t, s16)
+TWOn (vrshrn_high_n, int16x8_t, int16x4_t, int32x4_t, s32)
+TWOn (vrshrn_high_n, int32x4_t, int32x2_t, int64x2_t, s64)
+TWOn (vrshrn_high_n, uint8x16_t, uint8x8_t, uint16x8_t, u16)
+TWOn (vrshrn_high_n, uint16x8_t, uint16x4_t, uint32x4_t, u32)
+TWOn (vrshrn_high_n, uint32x4_t, uint32x2_t, uint64x2_t, u64)
+
+TWOn (vshrn_high_n, int8x16_t, int8x8_t, int16x8_t, s16)
+TWOn (vshrn_high_n, int16x8_t, int16x4_t, int32x4_t, s32)
+TWOn (vshrn_high_n, int32x4_t, int32x2_t, int64x2_t, s64)
+TWOn (vshrn_high_n, uint8x16_t, uint8x8_t, uint16x8_t, u16)
+TWOn (vshrn_high_n, uint16x8_t, uint16x4_t, uint32x4_t, u32)
+TWOn (vshrn_high_n, uint32x4_t, uint32x2_t, uint64x2_t, u64)
+
+TWOn (vqshrun_high_n, uint8x16_t, uint8x8_t, int16x8_t, s16)
+TWOn (vqshrun_high_n, uint16x8_t, uint16x4_t, int32x4_t, s32)
+TWOn (vqshrun_high_n, uint32x4_t, uint32x2_t, int64x2_t, s64)
+
+TWOn (vqrshrun_high_n, uint8x16_t, uint8x8_t, int16x8_t, s16)
+TWOn (vqrshrun_high_n, uint16x8_t, uint16x4_t, int32x4_t, s32)
+TWOn (vqrshrun_high_n, uint32x4_t, uint32x2_t, int64x2_t, s64)
+
+TWOn (vqshrn_high_n, int8x16_t, int8x8_t, int16x8_t, s16)
+TWOn (vqshrn_high_n, int16x8_t, int16x4_t, int32x4_t, s32)
+TWOn (vqshrn_high_n, int32x4_t, int32x2_t, int64x2_t, s64)
+TWOn (vqshrn_high_n, uint8x16_t, uint8x8_t, uint16x8_t, u16)
+TWOn (vqshrn_high_n, uint16x8_t, uint16x4_t, uint32x4_t, u32)
+TWOn (vqshrn_high_n, uint32x4_t, uint32x2_t, uint64x2_t, u64)
+
+TWOn (vqrshrn_high_n, int8x16_t, int8x8_t, int16x8_t, s16)
+TWOn (vqrshrn_high_n, int16x8_t, int16x4_t, int32x4_t, s32)
+TWOn (vqrshrn_high_n, int32x4_t, int32x2_t, int64x2_t, s64)
+TWOn (vqrshrn_high_n, uint8x16_t, uint8x8_t, uint16x8_t, u16)
+TWOn (vqrshrn_high_n, uint16x8_t, uint16x4_t, uint32x4_t, u32)
+TWOn (vqrshrn_high_n, uint32x4_t, uint32x2_t, uint64x2_t, u64)
+
+#define ONE(name, rettype, rmwtype, intype, fs) \
+ rettype test_ ## name ## _ ## fs \
+ (rmwtype a, intype b) \
+ { \
+ return name ## _ ## fs (a, b); \
+ }
+
+ONE (vqmovn_high, int8x16_t, int8x8_t, int16x8_t, s16)
+ONE (vqmovn_high, int16x8_t, int16x4_t, int32x4_t, s32)
+ONE (vqmovn_high, int32x4_t, int32x2_t, int64x2_t, s64)
+ONE (vqmovn_high, uint8x16_t, uint8x8_t, uint16x8_t, u16)
+ONE (vqmovn_high, uint16x8_t, uint16x4_t, uint32x4_t, u32)
+ONE (vqmovn_high, uint32x4_t, uint32x2_t, uint64x2_t, u64)
+
+ONE (vqmovun_high, uint8x16_t, uint8x8_t, int16x8_t, s16)
+ONE (vqmovun_high, uint16x8_t, uint16x4_t, int32x4_t, s32)
+ONE (vqmovun_high, uint32x4_t, uint32x2_t, int64x2_t, s64)
+
+ONE (vmovn_high, int8x16_t, int8x8_t, int16x8_t, s16)
+ONE (vmovn_high, int16x8_t, int16x4_t, int32x4_t, s32)
+ONE (vmovn_high, int32x4_t, int32x2_t, int64x2_t, s64)
+ONE (vmovn_high, uint8x16_t, uint8x8_t, uint16x8_t, u16)
+ONE (vmovn_high, uint16x8_t, uint16x4_t, uint32x4_t, u32)
+ONE (vmovn_high, uint32x4_t, uint32x2_t, uint64x2_t, u64)
+
+
+/* { dg-final { scan-assembler-times "\\tsubhn2 v" 6} } */
+/* { dg-final { scan-assembler-times "\\taddhn2\\tv" 6} } */
+/* { dg-final { scan-assembler-times "rsubhn2 v" 6} } */
+/* { dg-final { scan-assembler-times "raddhn2\\tv" 6} } */
+/* { dg-final { scan-assembler-times "\\trshrn2 v" 6} } */
+/* { dg-final { scan-assembler-times "\\tshrn2 v" 6} } */
+/* { dg-final { scan-assembler-times "sqshrun2 v" 3} } */
+/* { dg-final { scan-assembler-times "sqrshrun2 v" 3} } */
+/* { dg-final { scan-assembler-times "sqshrn2 v" 3} } */
+/* { dg-final { scan-assembler-times "uqshrn2 v" 3} } */
+/* { dg-final { scan-assembler-times "sqrshrn2 v" 3} } */
+/* { dg-final { scan-assembler-times "uqrshrn2 v" 3} } */
+/* { dg-final { scan-assembler-times "uqxtn2 v" 3} } */
+/* { dg-final { scan-assembler-times "sqxtn2 v" 3} } */
+/* { dg-final { scan-assembler-times "sqxtun2 v" 3} } */
+/* { dg-final { scan-assembler-times "\\txtn2 v" 6} } */
===================================================================
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#define GPF double
+#define SUFFIX(x) x
+#define GPI unsigned int
+
+#include "fcvt.x"
+
+/* { dg-final { scan-assembler-times "fcvtzu\tw\[0-9\]+, *d\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *d\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtpu\tw\[0-9\]+, *d\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *d\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtmu\tw\[0-9\]+, *d\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "fcvtau\tw\[0-9\]+, *d\[0-9\]" 2 } } */
===================================================================
@@ -0,0 +1,49 @@
+
+typedef signed char *__restrict__ pRSINT8;
+typedef signed short *__restrict__ pRSINT16;
+typedef signed int *__restrict__ pRSINT32;
+typedef signed long long *__restrict__ pRSINT64;
+
+typedef unsigned char *__restrict__ pRUINT8;
+typedef unsigned short *__restrict__ pRUINT16;
+typedef unsigned int *__restrict__ pRUINT32;
+typedef unsigned long long *__restrict__ pRUINT64;
+
+typedef signed short SH;
+typedef unsigned short UH;
+typedef signed int SS;
+typedef unsigned int US;
+typedef signed long long SLL;
+typedef unsigned long long ULL;
+
+#define DEF_MULLB(sign) \
+ void widen_mult_##sign##b (pR##sign##INT##16 a, \
+ pR##sign##INT##8 b, \
+ pR##sign##INT##8 c) \
+ { \
+ int i; \
+ for (i=0; i<N; i++) \
+ a[i] = (sign##H)b[i] * c[i]; \
+ }
+
+#define DEF_MULLH(sign) \
+ void widen_mult_##sign##h (pR##sign##INT##32 a, \
+ pR##sign##INT##16 b, \
+ pR##sign##INT##16 c) \
+ { \
+ int i; \
+ for (i=0; i<N; i++) \
+ a[i] = (sign##S)b[i] * c[i]; \
+ }
+#define DEF_MULLS(sign) \
+ void widen_mult_##sign##s (pR##sign##INT##64 a, \
+ pR##sign##INT##32 b, \
+ pR##sign##INT##32 c) \
+ { \
+ int i; \
+ for (i=0; i<N; i++) \
+ a[i] = (sign##LL)b[i] * c[i]; \
+ }
+
+#define DEF_MULL2(x) x (S) \
+ x (U)
===================================================================
@@ -0,0 +1,72 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+unsigned int
+test_csinc32_ifcvt(unsigned int w0,
+ unsigned int w1,
+ unsigned int w2) {
+ /* { dg-final { scan-assembler "csinc\tw\[0-9\]*.*ne" } } */
+ if (w0 == w1)
+ ++ w2;
+
+ return w2;
+}
+
+unsigned int
+test_csinc32_condasn1(unsigned int w0,
+ unsigned int w1,
+ unsigned int w2,
+ unsigned int w3) {
+ unsigned int w4;
+
+ /* { dg-final { scan-assembler "csinc\tw\[0-9\]*.*ne" } } */
+ w4 = (w0 == w1) ? (w3 + 1) : w2;
+ return w4;
+}
+
+unsigned int
+test_csinc32_condasn2(unsigned int w0,
+ unsigned int w1,
+ unsigned int w2,
+ unsigned int w3) {
+ unsigned int w4;
+
+ /* { dg-final { scan-assembler "csinc\tw\[0-9\]*.*eq" } } */
+ w4 = (w0 == w1) ? w2 : (w3 + 1);
+ return w4;
+}
+
+unsigned long long
+test_csinc64_ifcvt(unsigned long long x0,
+ unsigned long long x1,
+ unsigned long long x2) {
+ /* { dg-final { scan-assembler "csinc\tx\[0-9\]*.*ne" } } */
+ if (x0 == x1)
+ ++ x2;
+
+ return x2;
+}
+
+unsigned long long
+test_csinc64_condasn1(unsigned long long x0,
+ unsigned long long x1,
+ unsigned long long x2,
+ unsigned long long x3) {
+ unsigned long long x4;
+
+ /* { dg-final { scan-assembler "csinc\tx\[0-9\]*.*ne" } } */
+ x4 = (x0 == x1) ? (x3 + 1) : x2;
+ return x4;
+}
+
+unsigned long long
+test_csinc64_condasn2(unsigned long long x0,
+ unsigned long long x1,
+ unsigned long long x2,
+ unsigned long long x3) {
+ unsigned long long x4;
+
+ /* { dg-final { scan-assembler "csinc\tx\[0-9\]*.*eq" } } */
+ x4 = (x0 == x1) ? x2 : (x3 + 1);
+ return x4;
+}
===================================================================
@@ -7,7 +7,7 @@
function. However, some platforms use all bits to encode a
function pointer. Such platforms use the lowest bit of the delta,
that is shifted left by one bit. */
-#if defined __MN10300__ || defined __SH5__ || defined __arm__ || defined __thumb__ || defined __mips__
+#if defined __MN10300__ || defined __SH5__ || defined __arm__ || defined __thumb__ || defined __mips__ || defined __aarch64__
#define ADJUST_PTRFN(func, virt) ((void (*)())(func))
#define ADJUST_DELTA(delta, virt) (((delta) << 1) + !!(virt))
#else
===================================================================
@@ -478,6 +478,13 @@
return 0
}
+ # We don't yet support profiling for AArch64.
+ if { [istarget aarch64*-*-*]
+ && ([lindex $test_what 1] == "-p"
+ || [lindex $test_what 1] == "-pg") } {
+ return 0
+ }
+
# cygwin does not support -p.
if { [istarget *-*-cygwin*] && $test_what == "-p" } {
return 0
@@ -493,7 +500,8 @@
if {![info exists profiling_available_saved]} {
# Some targets don't have any implementation of __bb_init_func or are
# missing other needed machinery.
- if { [istarget am3*-*-linux*]
+ if { [istarget aarch64*-*-elf]
+ || [istarget am3*-*-linux*]
|| [istarget arm*-*-eabi*]
|| [istarget arm*-*-elf]
|| [istarget arm*-*-symbianelf*]
@@ -1858,6 +1866,7 @@
|| [istarget sparc*-*-*]
|| [istarget alpha*-*-*]
|| [istarget ia64-*-*]
+ || [istarget aarch64*-*-*]
|| [check_effective_target_arm32]
|| ([istarget mips*-*-*]
&& [check_effective_target_mips_loongson]) } {
@@ -2596,6 +2605,7 @@
|| [istarget ia64-*-*]
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
+ || [istarget aarch64*-*-*]
|| [check_effective_target_arm32]
|| ([istarget mips*-*-*]
&& [check_effective_target_mips_loongson]) } {
@@ -2665,6 +2675,7 @@
|| [istarget mipsisa64*-*-*]
|| [istarget x86_64-*-*]
|| [istarget ia64-*-*]
+ || [istarget aarch64*-*-*]
|| [check_effective_target_arm32] } {
set et_vect_float_saved 1
}
@@ -2686,6 +2697,7 @@
} else {
set et_vect_double_saved 0
if { [istarget i?86-*-*]
+ || [istarget aarch64*-*-*]
|| [istarget x86_64-*-*] } {
if { [check_no_compiler_messages vect_double assembly {
#ifdef __tune_atom__
@@ -2968,6 +2980,7 @@
set et_vect_widen_mult_qi_to_hi_saved 0
}
if { [istarget powerpc*-*-*]
+ || [istarget aarch64*-*-*]
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
set et_vect_widen_mult_qi_to_hi_saved 1
}
@@ -3000,6 +3013,7 @@
if { [istarget powerpc*-*-*]
|| [istarget spu-*-*]
|| [istarget ia64-*-*]
+ || [istarget aarch64*-*-*]
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
@@ -3177,6 +3191,7 @@
if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
+ || [istarget aarch64*-*-*]
|| [istarget spu-*-*]
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon]
&& [check_effective_target_arm_little_endian]) } {
@@ -3204,6 +3219,7 @@
|| [istarget x86_64-*-*]
|| [istarget spu-*-*]
|| [istarget ia64-*-*]
+ || [istarget aarch64*-*-*]
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon]
&& [check_effective_target_arm_little_endian]) } {
set et_vect_unpack_saved 1
@@ -3267,6 +3283,7 @@
} else {
set et_vect_hw_misalign_saved 0
if { ([istarget x86_64-*-*]
+ || [istarget aarch64*-*-*]
|| [istarget i?86-*-*]) } {
set et_vect_hw_misalign_saved 1
}
@@ -3485,6 +3502,7 @@
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
|| [istarget powerpc*-*-*]
+ || [istarget aarch64*-*-*]
|| [check_effective_target_arm32]
|| ([istarget mips*-*-*]
&& [check_effective_target_mips_loongson]) } {
@@ -3510,6 +3528,7 @@
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
|| [istarget ia64-*-*]
+ || [istarget aarch64*-*-*]
|| [check_effective_target_arm32] } {
set et_vect_int_mult_saved 1
}
@@ -3816,6 +3835,7 @@
if { [istarget ia64-*-*]
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
+ || [istarget aarch64*-*-*]
|| [istarget alpha*-*-*]
|| [istarget arm*-*-linux-gnueabi]
|| [istarget bfin*-*linux*]
@@ -3843,7 +3863,8 @@
set et_sync_char_short_saved 0
# This is intentionally powerpc but not rs6000, rs6000 doesn't have the
# load-reserved/store-conditional instructions.
- if { [istarget ia64-*-*]
+ if { [istarget aarch64*-*-*]
+ || [istarget ia64-*-*]
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
|| [istarget alpha*-*-*]
@@ -4567,6 +4588,8 @@
} else {
set dg-do-what-default compile
}
+ } elseif [istarget "aarch64*-*-*"] {
+ set dg-do-what-default run
} else {
return 0
}
===================================================================
@@ -1,6 +1,6 @@
C Test program for common block debugging. G. Helffrich 11 July 2004.
C { dg-do compile }
-C { dg-skip-if "No stabs" { mmix-*-* alpha*-*-* hppa*64*-*-* ia64-*-* *-*-vxworks* } { "*" } { "" } }
+C { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* alpha*-*-* hppa*64*-*-* ia64-*-* *-*-vxworks* } { "*" } { "" } }
C { dg-skip-if "No stabs" {*-*-* } { "*" } { "-gstabs" } }
common i,j
common /label/l,m
===================================================================
@@ -12,6 +12,10 @@
#elif defined (__sh__)
/* On SH division by zero does not trap. */
# define DO_TEST 0
+#elif defined (__aarch64__) && !defined(__linux__)
+ /* AArch64 divisions do trap by default, but libgloss targets do not
+ intercept the trap and raise a SIGFPE. So restrict the test to
+ AArch64 systems that use the Linux kernel. */
#elif defined (__TMS320C6X__)
/* On TI C6X division by zero does not trap. */
# define DO_TEST 0
===================================================================
@@ -2,7 +2,7 @@
/* Contributed by Devang Patel <dpatel@apple.com> */
/* { dg-do compile } */
-/* { dg-skip-if "No stabs" { mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks* } { "*" } { "" } } */
+/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks* } { "*" } { "" } } */
/* { dg-options "-gstabs" } */
int
===================================================================
@@ -7,7 +7,9 @@
function FOO is reported as 256 or 264 in the stack usage (.su) file.
Then check that this is the actual stack usage in the assembly file. */
-#if defined(__i386__)
+#if defined(__aarch64__)
+# define SIZE 256 /* No frame pointer for leaf functions (default) */
+#elif defined(__i386__)
# define SIZE 248
#elif defined(__x86_64__)
# ifndef _WIN64
===================================================================
@@ -1,6 +1,6 @@
/* Test floating-point conversions. __float128 type. */
/* Origin: Joseph Myers <joseph@codesourcery.com> */
-/* { dg-do run { target i?86-*-* x86_64-*-* ia64-*-* } } */
+/* { dg-do run { target aarch64*-*-* i?86-*-* x86_64-*-* ia64-*-* } } */
/* { dg-options "" } */
#include "fp-int-convert.h"
===================================================================
@@ -1,6 +1,6 @@
/* Test floating-point conversions. __float128 type with TImode. */
/* Origin: Joseph Myers <joseph@codesourcery.com> */
-/* { dg-do run { target i?86-*-* x86_64-*-* ia64-*-* } } */
+/* { dg-do run { target aarch64*-*-* i?86-*-* x86_64-*-* ia64-*-* } } */
/* { dg-options "" } */
#include "fp-int-convert.h"
===================================================================
@@ -1,5 +1,5 @@
/* Test 'q' and 'Q' suffixes on __float128 type constants. */
-/* { dg-do compile { target ia64-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-do compile { target aarch64*-*-* ia64-*-* i?86-*-* x86_64-*-* } } */
/* { dg-options "" } */
__float128 a = 123.456789q;
===================================================================
@@ -92,6 +92,8 @@
# else
# define PIC_REG "gr17"
#endif
+#elif defined (__aarch64__)
+/* No pic register -- yet. */
#else
# error "Modify the test for your target."
#endif
===================================================================
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "avr-*-*" } { "*" } { "" } } */
+/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "aarch64*-*-* avr-*-* " } { "*" } { "" } } */
/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { "arm*-*-*" } { "-mfloat-abi=hard" } { "" } } */
/* PR target/12503 */
===================================================================
@@ -1,5 +1,5 @@
/* Test 'q' suffix with -pedantic on __float128 type constants. */
-/* { dg-do compile { target ia64-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-do compile { target aarch64*-*-* ia64-*-* i?86-*-* x86_64-*-* } } */
/* { dg-options "-pedantic" } */
__float128 a = 123.456789q; /* { dg-warning "non-standard suffix on floating constant" } */
===================================================================
@@ -0,0 +1,17 @@
+// Check that the initialization guard variable is an 8-byte aligned,
+// 8-byte doubleword and that only the least significant bit is used
+// for initialization guard variables.
+// { dg-do compile { target aarch64*-*-* } }
+// { dg-options "-O -fdump-tree-original" }
+
+int bar();
+
+int *foo ()
+{
+ static int x = bar ();
+ return &x;
+}
+
+// { dg-final { scan-assembler _ZGVZ3foovE1x,8,8 } }
+// { dg-final { scan-tree-dump "_ZGVZ3foovE1x & 1" "original" } }
+// { dg-final { cleanup-tree-dump "original" } }
===================================================================
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-skip-if "No stabs" { mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* } { "*" } { "" } } */
+/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* } { "*" } { "" } } */
/* { dg-options "-gstabs+ -fno-eliminate-unused-debug-types -ftoplevel-reorder" } */
const int foobar = 4;
===================================================================
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-skip-if "No stabs" { mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks } { "*" } { "" } } */
+/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks } { "*" } { "" } } */
/* { dg-options "-gstabs+ -fno-eliminate-unused-debug-types" } */
const int foobar = 4;