| Message ID | 1343922986-32469-2-git-send-email-u.kleine-koenig@pengutronix.de |
|---|---|
| State | New |
| Headers | show |
On Thu, Aug 02, 2012 at 05:56:26PM +0200, Uwe Kleine-König wrote: > Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> > --- > arch/arm/boot/dts/phytec-pcm043.dtsi | 49 ++++++++++++++++++++++++++++++++++ > 1 file changed, 49 insertions(+) > create mode 100644 arch/arm/boot/dts/phytec-pcm043.dtsi > > diff --git a/arch/arm/boot/dts/phytec-pcm043.dtsi b/arch/arm/boot/dts/phytec-pcm043.dtsi > new file mode 100644 > index 0000000..420627c > --- /dev/null > +++ b/arch/arm/boot/dts/phytec-pcm043.dtsi > @@ -0,0 +1,49 @@ > +/include/ "imx35.dtsi" > + > +/ { > + soc { > + aips@40000000 { /* AIPS1 */ > + i2c@43f80000 { > + status = "okay"; > + > + tempsens@4a { > + compatible = "maxim,ds75"; > + reg = <0x4a>; > + }; > + rtc8564@51 { > + compatible = "nxp,pcf8563"; > + reg = <0x51>; > + }; > + at24@52 { > + compatible = "at,24c32"; > + reg = <0x52>; > + pagesize = <32>; > + }; > + }; > + uart@43f90000 { > + status = "okay"; > + }; > + uart@43f94000 { > + status = "okay"; > + }; > + }; > + spba@50000000 { > + uart@5000c000 { > + status = "okay"; > + }; > + fec@50038000 { > + status = "okay"; > + }; > + }; > + > + nor@a0000000 { > + compatible = "cfi-flash"; > + reg = <0xa0000000 0x2000000>; > + bank-width = <2>; > + }; > + > + nand@bb000000 { > + status = "okay"; > + }; Enable hardware ECC? Sascha
On Thu, Aug 02, 2012 at 05:56:26PM +0200, Uwe Kleine-König wrote: > Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> > --- > arch/arm/boot/dts/phytec-pcm043.dtsi | 49 ++++++++++++++++++++++++++++++++++ > 1 file changed, 49 insertions(+) > create mode 100644 arch/arm/boot/dts/phytec-pcm043.dtsi > > diff --git a/arch/arm/boot/dts/phytec-pcm043.dtsi b/arch/arm/boot/dts/phytec-pcm043.dtsi > new file mode 100644 > index 0000000..420627c > --- /dev/null > +++ b/arch/arm/boot/dts/phytec-pcm043.dtsi > @@ -0,0 +1,49 @@ > +/include/ "imx35.dtsi" > + > +/ { > + soc { > + aips@40000000 { /* AIPS1 */ > + i2c@43f80000 { > + status = "okay"; > + > + tempsens@4a { > + compatible = "maxim,ds75"; > + reg = <0x4a>; > + }; Again, please put a new line between nodes. > + rtc8564@51 { > + compatible = "nxp,pcf8563"; > + reg = <0x51>; > + }; > + at24@52 { > + compatible = "at,24c32"; > + reg = <0x52>; > + pagesize = <32>; > + }; > + }; > + uart@43f90000 { > + status = "okay"; > + }; > + uart@43f94000 { > + status = "okay"; > + }; > + }; > + spba@50000000 { > + uart@5000c000 { > + status = "okay"; > + }; > + fec@50038000 { > + status = "okay"; > + }; > + }; > + > + nor@a0000000 { > + compatible = "cfi-flash"; > + reg = <0xa0000000 0x2000000>; > + bank-width = <2>; > + }; > + We should be able to see how this device is connected to SoC with this node under proper interface and bus topology. > + nand@bb000000 { > + status = "okay"; > + }; Ditto. > + }; > +}; > -- > 1.7.10.4 >
diff --git a/arch/arm/boot/dts/phytec-pcm043.dtsi b/arch/arm/boot/dts/phytec-pcm043.dtsi new file mode 100644 index 0000000..420627c --- /dev/null +++ b/arch/arm/boot/dts/phytec-pcm043.dtsi @@ -0,0 +1,49 @@ +/include/ "imx35.dtsi" + +/ { + soc { + aips@40000000 { /* AIPS1 */ + i2c@43f80000 { + status = "okay"; + + tempsens@4a { + compatible = "maxim,ds75"; + reg = <0x4a>; + }; + rtc8564@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; + at24@52 { + compatible = "at,24c32"; + reg = <0x52>; + pagesize = <32>; + }; + }; + uart@43f90000 { + status = "okay"; + }; + uart@43f94000 { + status = "okay"; + }; + }; + spba@50000000 { + uart@5000c000 { + status = "okay"; + }; + fec@50038000 { + status = "okay"; + }; + }; + + nor@a0000000 { + compatible = "cfi-flash"; + reg = <0xa0000000 0x2000000>; + bank-width = <2>; + }; + + nand@bb000000 { + status = "okay"; + }; + }; +};
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> --- arch/arm/boot/dts/phytec-pcm043.dtsi | 49 ++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 arch/arm/boot/dts/phytec-pcm043.dtsi