Message ID | 1339981384-9117-12-git-send-email-proljc@gmail.com |
---|---|
State | New |
Headers | show |
On 06/18/2012 05:02 AM, Jia Liu wrote: > Add a dummy board for IIS. > > Signed-off-by: Jia Liu<proljc@gmail.com> [...] > + if (nd_table[0].vlan) { > + isa_ne2000_init(isa_bus, 0x92000000, 4,&nd_table[0]); > + } I have noticed that the kernel you provided expects OpenCores ethernet device. We have a model for it (: You can look at lx60_net_init() in the hw/xtensa_lx60.c to see how it may be connected.
Hi Max, On Wed, Jun 20, 2012 at 2:29 PM, Max Filippov <jcmvbkbc@gmail.com> wrote: > On 06/18/2012 05:02 AM, Jia Liu wrote: >> Add a dummy board for IIS. >> >> Signed-off-by: Jia Liu<proljc@gmail.com> > > [...] > > >> + if (nd_table[0].vlan) { >> + isa_ne2000_init(isa_bus, 0x92000000, 4,&nd_table[0]); >> + } > > I have noticed that the kernel you provided expects OpenCores ethernet > device. > We have a model for it (: You can look at lx60_net_init() in the > hw/xtensa_lx60.c > to see how it may be connected. > Thank you very much for remind me! Is this code OK? static void or1200_net_init(MemoryRegion *address_space, target_phys_addr_t base, target_phys_addr_t buffers, qemu_irq irq, NICInfo *nd) { DeviceState *dev; SysBusDevice *s; MemoryRegion *ram; dev = qdev_create(NULL, "open_eth"); qdev_set_nic_properties(dev, nd); qdev_init_nofail(dev); s = sysbus_from_qdev(dev); sysbus_connect_irq(s, 0, irq); memory_region_add_subregion(get_system_memory(), base, sysbus_mmio_get_region(s, 0)); ram = g_malloc(sizeof(*ram)); memory_region_init_ram(ram, "open_eth.ram", 0x100); vmstate_register_ram_global(ram); memory_region_add_subregion(address_space, buffers, ram); } if (nd_table[0].vlan) { or1200_net_init(get_system_memory(), 0x92000000, 0x92100000, env->irq[4], nd_table); } > -- > Thanks. > -- Max Regards, Jia.
On Wed, Jun 20, 2012 at 1:42 PM, Jia Liu <proljc@gmail.com> wrote: > Hi Max, > > On Wed, Jun 20, 2012 at 2:29 PM, Max Filippov <jcmvbkbc@gmail.com> wrote: >> On 06/18/2012 05:02 AM, Jia Liu wrote: >>> Add a dummy board for IIS. >>> >>> Signed-off-by: Jia Liu<proljc@gmail.com> >> >> [...] >> >> >>> + if (nd_table[0].vlan) { >>> + isa_ne2000_init(isa_bus, 0x92000000, 4,&nd_table[0]); >>> + } >> >> I have noticed that the kernel you provided expects OpenCores ethernet >> device. >> We have a model for it (: You can look at lx60_net_init() in the >> hw/xtensa_lx60.c >> to see how it may be connected. >> > > Thank you very much for remind me! > > Is this code OK? > > static void or1200_net_init(MemoryRegion *address_space, > target_phys_addr_t base, > target_phys_addr_t buffers, > qemu_irq irq, NICInfo *nd) > { > DeviceState *dev; > SysBusDevice *s; > MemoryRegion *ram; > > dev = qdev_create(NULL, "open_eth"); > qdev_set_nic_properties(dev, nd); > qdev_init_nofail(dev); > > s = sysbus_from_qdev(dev); > sysbus_connect_irq(s, 0, irq); > memory_region_add_subregion(get_system_memory(), base, > sysbus_mmio_get_region(s, 0)); > > ram = g_malloc(sizeof(*ram)); > memory_region_init_ram(ram, "open_eth.ram", 0x100); > vmstate_register_ram_global(ram); > memory_region_add_subregion(address_space, buffers, ram); > } You haven't mapped descriptors window. Seems to me it should look like this: static void or1200_net_init(MemoryRegion *address_space, target_phys_addr_t base, target_phys_addr_t descriptors, qemu_irq irq, NICInfo *nd) { DeviceState *dev; SysBusDevice *s; dev = qdev_create(NULL, "open_eth"); qdev_set_nic_properties(dev, nd); qdev_init_nofail(dev); s = sysbus_from_qdev(dev); sysbus_connect_irq(s, 0, irq); memory_region_add_subregion(address_space, base, sysbus_mmio_get_region(s, 0)); memory_region_add_subregion(address_space, descriptors, sysbus_mmio_get_region(s, 1)); } > > if (nd_table[0].vlan) { > or1200_net_init(get_system_memory(), 0x92000000, > 0x92100000, env->irq[4], nd_table); > } > Also I haven't found where 0x92100000 comes from. Is there a memory map documentation for this machine?
Hi Max, On Wed, Jun 20, 2012 at 8:57 PM, Max Filippov <jcmvbkbc@gmail.com> wrote: > On Wed, Jun 20, 2012 at 1:42 PM, Jia Liu <proljc@gmail.com> wrote: >> Hi Max, >> >> On Wed, Jun 20, 2012 at 2:29 PM, Max Filippov <jcmvbkbc@gmail.com> wrote: >>> On 06/18/2012 05:02 AM, Jia Liu wrote: >>>> Add a dummy board for IIS. >>>> >>>> Signed-off-by: Jia Liu<proljc@gmail.com> >>> >>> [...] >>> >>> >>>> + if (nd_table[0].vlan) { >>>> + isa_ne2000_init(isa_bus, 0x92000000, 4,&nd_table[0]); >>>> + } >>> >>> I have noticed that the kernel you provided expects OpenCores ethernet >>> device. >>> We have a model for it (: You can look at lx60_net_init() in the >>> hw/xtensa_lx60.c >>> to see how it may be connected. >>> >> >> Thank you very much for remind me! >> >> Is this code OK? >> >> static void or1200_net_init(MemoryRegion *address_space, >> target_phys_addr_t base, >> target_phys_addr_t buffers, >> qemu_irq irq, NICInfo *nd) >> { >> DeviceState *dev; >> SysBusDevice *s; >> MemoryRegion *ram; >> >> dev = qdev_create(NULL, "open_eth"); >> qdev_set_nic_properties(dev, nd); >> qdev_init_nofail(dev); >> >> s = sysbus_from_qdev(dev); >> sysbus_connect_irq(s, 0, irq); >> memory_region_add_subregion(get_system_memory(), base, >> sysbus_mmio_get_region(s, 0)); >> >> ram = g_malloc(sizeof(*ram)); >> memory_region_init_ram(ram, "open_eth.ram", 0x100); >> vmstate_register_ram_global(ram); >> memory_region_add_subregion(address_space, buffers, ram); >> } > > You haven't mapped descriptors window. Seems to me it should look like this: > > static void or1200_net_init(MemoryRegion *address_space, > target_phys_addr_t base, > target_phys_addr_t descriptors, > qemu_irq irq, NICInfo *nd) > { > DeviceState *dev; > SysBusDevice *s; > > dev = qdev_create(NULL, "open_eth"); > qdev_set_nic_properties(dev, nd); > qdev_init_nofail(dev); > > s = sysbus_from_qdev(dev); > sysbus_connect_irq(s, 0, irq); > memory_region_add_subregion(address_space, base, > sysbus_mmio_get_region(s, 0)); > memory_region_add_subregion(address_space, descriptors, > sysbus_mmio_get_region(s, 1)); > } > Thank you very much for the code. >> >> if (nd_table[0].vlan) { >> or1200_net_init(get_system_memory(), 0x92000000, >> 0x92100000, env->irq[4], nd_table); >> } >> > > Also I haven't found where 0x92100000 comes from. > Is there a memory map documentation for this machine? > I'm confused about descriptors, I'm not sure whether 0x92100000 is suitable. I find the code in linux/arch/openrisc/boot/dts/or1ksim.dts enet0: ethoc@92000000 { compatible = "opencores,ethmac-rtlsvn338"; reg = <0x92000000 0x100>; interrupts = <4>; }; but I'm not sure what value should a pass to target_phys_addr_t descriptors, that is, I don't know how can I get the address of descriptors. Will you please give me more comment about it? I have no idea how to deal with it. > -- > Thanks. > -- Max Regards, Jia.
On Wed, Jun 20, 2012 at 8:41 PM, Jia Liu <proljc@gmail.com> wrote: > Hi Max, > > On Wed, Jun 20, 2012 at 8:57 PM, Max Filippov <jcmvbkbc@gmail.com> wrote: >> On Wed, Jun 20, 2012 at 1:42 PM, Jia Liu <proljc@gmail.com> wrote: >>> Hi Max, >>> >>> On Wed, Jun 20, 2012 at 2:29 PM, Max Filippov <jcmvbkbc@gmail.com> wrote: >>>> On 06/18/2012 05:02 AM, Jia Liu wrote: >>>>> Add a dummy board for IIS. >>>>> >>>>> Signed-off-by: Jia Liu<proljc@gmail.com> >>>> >>>> [...] >>>> >>>> >>>>> + if (nd_table[0].vlan) { >>>>> + isa_ne2000_init(isa_bus, 0x92000000, 4,&nd_table[0]); >>>>> + } >>>> >>>> I have noticed that the kernel you provided expects OpenCores ethernet >>>> device. >>>> We have a model for it (: You can look at lx60_net_init() in the >>>> hw/xtensa_lx60.c >>>> to see how it may be connected. >>>> >>> >>> Thank you very much for remind me! >>> >>> Is this code OK? >>> >>> static void or1200_net_init(MemoryRegion *address_space, >>> target_phys_addr_t base, >>> target_phys_addr_t buffers, >>> qemu_irq irq, NICInfo *nd) >>> { >>> DeviceState *dev; >>> SysBusDevice *s; >>> MemoryRegion *ram; >>> >>> dev = qdev_create(NULL, "open_eth"); >>> qdev_set_nic_properties(dev, nd); >>> qdev_init_nofail(dev); >>> >>> s = sysbus_from_qdev(dev); >>> sysbus_connect_irq(s, 0, irq); >>> memory_region_add_subregion(get_system_memory(), base, >>> sysbus_mmio_get_region(s, 0)); >>> >>> ram = g_malloc(sizeof(*ram)); >>> memory_region_init_ram(ram, "open_eth.ram", 0x100); >>> vmstate_register_ram_global(ram); >>> memory_region_add_subregion(address_space, buffers, ram); >>> } >> >> You haven't mapped descriptors window. Seems to me it should look like this: >> >> static void or1200_net_init(MemoryRegion *address_space, >> target_phys_addr_t base, >> target_phys_addr_t descriptors, >> qemu_irq irq, NICInfo *nd) >> { >> DeviceState *dev; >> SysBusDevice *s; >> >> dev = qdev_create(NULL, "open_eth"); >> qdev_set_nic_properties(dev, nd); >> qdev_init_nofail(dev); >> >> s = sysbus_from_qdev(dev); >> sysbus_connect_irq(s, 0, irq); >> memory_region_add_subregion(address_space, base, >> sysbus_mmio_get_region(s, 0)); >> memory_region_add_subregion(address_space, descriptors, >> sysbus_mmio_get_region(s, 1)); >> } >> > > Thank you very much for the code. > >>> >>> if (nd_table[0].vlan) { >>> or1200_net_init(get_system_memory(), 0x92000000, >>> 0x92100000, env->irq[4], nd_table); >>> } >>> >> >> Also I haven't found where 0x92100000 comes from. >> Is there a memory map documentation for this machine? >> > > I'm confused about descriptors, I'm not sure whether 0x92100000 is suitable. > > I find the code in linux/arch/openrisc/boot/dts/or1ksim.dts > enet0: ethoc@92000000 { > compatible = "opencores,ethmac-rtlsvn338"; > reg = <0x92000000 0x100>; > interrupts = <4>; > }; > > but I'm not sure what value should a pass to target_phys_addr_t > descriptors, that is, I don't know how can I get the address of > descriptors. Ok, with if (nd_table[0].vlan) { - isa_ne2000_init(isa_bus, 0x92000000, 4, &nd_table[0]); + openrisc_sim_net_init(get_system_memory(), 0x92000000, + 0x92000400, env->irq[4], nd_table); } I was able to ping the host from the guest. I guess that from OpenCores ethernet perspective descriptors window is a logical continuation of the registers window, always starting at offset 0x400. I will post a patch that you can squish into this ISS dummy board patch.
diff --git a/hw/openrisc/Makefile.objs b/hw/openrisc/Makefile.objs index 1c541a5..38ff8f5 100644 --- a/hw/openrisc/Makefile.objs +++ b/hw/openrisc/Makefile.objs @@ -1,3 +1,3 @@ -obj-y = openrisc_pic.o openrisc_timer.o +obj-y = openrisc_pic.o openrisc_sim.o openrisc_timer.o obj-y := $(addprefix ../,$(obj-y)) diff --git a/hw/openrisc_sim.c b/hw/openrisc_sim.c new file mode 100644 index 0000000..2fe27f5 --- /dev/null +++ b/hw/openrisc_sim.c @@ -0,0 +1,145 @@ +/* + * OpenRISC simulator for use as an ISS. + * + * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com> + * Feng Gao <gf91597@gmail.com> + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see <http://www.gnu.org/licenses/>. + */ + +#include "hw.h" +#include "openrisc_cpudev.h" +#include "boards.h" +#include "elf.h" +#include "pc.h" +#include "loader.h" +#include "exec-memory.h" +#include "sysemu.h" +#include "isa.h" +#include "qtest.h" + +#define KERNEL_LOAD_ADDR 0x100 + +static struct _loaderparams { + uint64_t ram_size; + const char *kernel_filename; + const char *kernel_cmdline; + const char *initrd_filename; +} loaderparams; + +static void main_cpu_reset(void *opaque) +{ + CPUOpenRISCState *env = opaque; + cpu_reset(ENV_GET_CPU(env)); +} + +static uint64_t openrisc_load_kernel(void) +{ + long kernel_size; + uint64_t elf_entry; + target_phys_addr_t entry; + + if (loaderparams.kernel_filename && !qtest_enabled()) { + kernel_size = load_elf(loaderparams.kernel_filename, NULL, NULL, + &elf_entry, NULL, NULL, 1, ELF_MACHINE, 1); + entry = elf_entry; + if (kernel_size < 0) { + kernel_size = load_uimage(loaderparams.kernel_filename, + &entry, NULL, NULL); + } + if (kernel_size < 0) { + kernel_size = load_image_targphys(loaderparams.kernel_filename, + KERNEL_LOAD_ADDR, + ram_size - KERNEL_LOAD_ADDR); + entry = KERNEL_LOAD_ADDR; + } + if (kernel_size < 0) { + fprintf(stderr, "qemu: could not load kernel '%s'\n", + loaderparams.kernel_filename); + exit(1); + } + + if (kernel_size > 0) { + return elf_entry; + } + } else { + entry = 0; + } + + return entry; +} + +static void openrisc_sim_init(ram_addr_t ram_size, + const char *boot_device, + const char *kernel_filename, + const char *kernel_cmdline, + const char *initrd_filename, + const char *cpu_model) +{ + CPUOpenRISCState *env; + MemoryRegion *ram = g_new(MemoryRegion, 1); + qemu_irq *i8259; + ISABus *isa_bus; + + if (!cpu_model) { + cpu_model = "or1200"; + } + env = cpu_init(cpu_model); + if (!env) { + fprintf(stderr, "Unable to find CPU definition!\n"); + exit(1); + } + + qemu_register_reset(main_cpu_reset, env); + main_cpu_reset(env); + + memory_region_init_ram(ram, "openrisc.ram", ram_size); + memory_region_add_subregion(get_system_memory(), 0, ram); + + if (kernel_filename) { + loaderparams.ram_size = ram_size; + loaderparams.kernel_filename = kernel_filename; + loaderparams.kernel_cmdline = kernel_cmdline; + env->pc = openrisc_load_kernel(); + } + + cpu_openrisc_pic_init(env); + cpu_openrisc_clock_init(env); + + isa_bus = isa_bus_new(NULL, get_system_io()); + i8259 = i8259_init(isa_bus, env->irq[3]); + isa_bus_irqs(isa_bus, i8259); + + serial_mm_init(get_system_memory(), 0x90000000, 0, + env->irq[2], 115200, serial_hds[0], DEVICE_NATIVE_ENDIAN); + + if (nd_table[0].vlan) { + isa_ne2000_init(isa_bus, 0x92000000, 4, &nd_table[0]); + } +} + +static QEMUMachine openrisc_sim_machine = { + .name = "or32-sim", + .desc = "or32 simulation", + .init = openrisc_sim_init, + .max_cpus = 1, + .is_default = 1, +}; + +static void openrisc_sim_machine_init(void) +{ + qemu_register_machine(&openrisc_sim_machine); +} + +machine_init(openrisc_sim_machine_init);
Add a dummy board for IIS. Signed-off-by: Jia Liu <proljc@gmail.com> --- hw/openrisc/Makefile.objs | 2 +- hw/openrisc_sim.c | 145 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 146 insertions(+), 1 deletion(-) create mode 100644 hw/openrisc_sim.c