diff mbox

[19/25] PPC: e500: dt: create pci node dynamically

Message ID 1338375646-15064-20-git-send-email-agraf@suse.de
State New
Headers show

Commit Message

Alexander Graf May 30, 2012, 11 a.m. UTC 
Signed-off-by: Alexander Graf <agraf@suse.de>
---
 hw/ppce500_mpc8544ds.c |   50 ++++++++++++++++++++++++++++++++++++++++++++++++
 pc-bios/mpc8544ds.dtb  |  Bin 1810 -> 72 bytes
 pc-bios/mpc8544ds.dts  |   46 --------------------------------------------
 3 files changed, 50 insertions(+), 46 deletions(-)

Comments

Scott Wood May 31, 2012, 10:12 p.m. UTC | #1 
On 05/30/2012 06:00 AM, Alexander Graf wrote:
> Signed-off-by: Alexander Graf <agraf@suse.de>
> ---
>  hw/ppce500_mpc8544ds.c |   50 ++++++++++++++++++++++++++++++++++++++++++++++++
>  pc-bios/mpc8544ds.dtb  |  Bin 1810 -> 72 bytes
>  pc-bios/mpc8544ds.dts  |   46 --------------------------------------------
>  3 files changed, 50 insertions(+), 46 deletions(-)
> 
> diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
> index 3f6c6e3..d9a3d50 100644
> --- a/hw/ppce500_mpc8544ds.c
> +++ b/hw/ppce500_mpc8544ds.c
> @@ -62,6 +62,27 @@ struct boot_info
>      uint32_t entry;
>  };
>  
> +static void pci_map_create(void *fdt, uint32_t *pci_map, uint32_t mpic)
> +{
> +    int i;
> +    const uint32_t tmp[] = {
> +                             /* IDSEL 0x11 J17 Slot 1 */
> +                             0x8800, 0x0, 0x0, 0x1, mpic, 0x2, 0x1,
> +                             0x8800, 0x0, 0x0, 0x2, mpic, 0x3, 0x1,
> +                             0x8800, 0x0, 0x0, 0x3, mpic, 0x4, 0x1,
> +                             0x8800, 0x0, 0x0, 0x4, mpic, 0x1, 0x1,
> +
> +                             /* IDSEL 0x12 J16 Slot 2 */
> +                             0x9000, 0x0, 0x0, 0x1, mpic, 0x3, 0x1,
> +                             0x9000, 0x0, 0x0, 0x2, mpic, 0x4, 0x1,
> +                             0x9000, 0x0, 0x0, 0x3, mpic, 0x2, 0x1,
> +                             0x9000, 0x0, 0x0, 0x4, mpic, 0x1, 0x1,
> +                           };
> +    for (i = 0; i < (7 * 8); i++) {
> +        pci_map[i] = cpu_to_be32(tmp[i]);
> +    }
> +}
> +
>  static int mpc8544_load_device_tree(CPUPPCState *env,
>                                      target_phys_addr_t addr,
>                                      uint32_t ramsize,
> @@ -86,6 +107,11 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
>      char mpic[128];
>      uint32_t mpic_ph;
>      char gutil[128];
> +    char pci[128];
> +    uint32_t pci_map[7 * 8];
> +    uint32_t pci_ranges[12] = { 0x2000000, 0x0, 0xc0000000, 0xc0000000, 0x0,
> +                                0x20000000, 0x1000000, 0x0, 0x0, 0xe1000000,
> +                                0x0, 0x10000 };

At least put in a FIXME for dynamically generating this from the actual
data QEMU uses.

-Scott
Alexander Graf June 5, 2012, 10:17 p.m. UTC | #2 
On 01.06.2012, at 00:12, Scott Wood wrote:

> On 05/30/2012 06:00 AM, Alexander Graf wrote:
>> Signed-off-by: Alexander Graf <agraf@suse.de>
>> ---
>> hw/ppce500_mpc8544ds.c |   50 ++++++++++++++++++++++++++++++++++++++++++++++++
>> pc-bios/mpc8544ds.dtb  |  Bin 1810 -> 72 bytes
>> pc-bios/mpc8544ds.dts  |   46 --------------------------------------------
>> 3 files changed, 50 insertions(+), 46 deletions(-)
>> 
>> diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
>> index 3f6c6e3..d9a3d50 100644
>> --- a/hw/ppce500_mpc8544ds.c
>> +++ b/hw/ppce500_mpc8544ds.c
>> @@ -62,6 +62,27 @@ struct boot_info
>>     uint32_t entry;
>> };
>> 
>> +static void pci_map_create(void *fdt, uint32_t *pci_map, uint32_t mpic)
>> +{
>> +    int i;
>> +    const uint32_t tmp[] = {
>> +                             /* IDSEL 0x11 J17 Slot 1 */
>> +                             0x8800, 0x0, 0x0, 0x1, mpic, 0x2, 0x1,
>> +                             0x8800, 0x0, 0x0, 0x2, mpic, 0x3, 0x1,
>> +                             0x8800, 0x0, 0x0, 0x3, mpic, 0x4, 0x1,
>> +                             0x8800, 0x0, 0x0, 0x4, mpic, 0x1, 0x1,
>> +
>> +                             /* IDSEL 0x12 J16 Slot 2 */
>> +                             0x9000, 0x0, 0x0, 0x1, mpic, 0x3, 0x1,
>> +                             0x9000, 0x0, 0x0, 0x2, mpic, 0x4, 0x1,
>> +                             0x9000, 0x0, 0x0, 0x3, mpic, 0x2, 0x1,
>> +                             0x9000, 0x0, 0x0, 0x4, mpic, 0x1, 0x1,
>> +                           };
>> +    for (i = 0; i < (7 * 8); i++) {
>> +        pci_map[i] = cpu_to_be32(tmp[i]);
>> +    }
>> +}
>> +
>> static int mpc8544_load_device_tree(CPUPPCState *env,
>>                                     target_phys_addr_t addr,
>>                                     uint32_t ramsize,
>> @@ -86,6 +107,11 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
>>     char mpic[128];
>>     uint32_t mpic_ph;
>>     char gutil[128];
>> +    char pci[128];
>> +    uint32_t pci_map[7 * 8];
>> +    uint32_t pci_ranges[12] = { 0x2000000, 0x0, 0xc0000000, 0xc0000000, 0x0,
>> +                                0x20000000, 0x1000000, 0x0, 0x0, 0xe1000000,
>> +                                0x0, 0x10000 };
> 
> At least put in a FIXME for dynamically generating this from the actual
> data QEMU uses.

There's a big fat FIXME for that all over the place throughout the dynamic dt generation. We need to do that for interrupt lines, every time we see an address encoded, heck, even above in the map creation we want to be able to support more than 2 slots depending on the pci controller we're using, no? :)

So I don't think a FIXME here will help. Let's just keep in mind that all of this dt generation code needs quite some more love.


Alex
diff mbox

Patch

diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 3f6c6e3..d9a3d50 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -62,6 +62,27 @@  struct boot_info
     uint32_t entry;
 };
 
+static void pci_map_create(void *fdt, uint32_t *pci_map, uint32_t mpic)
+{
+    int i;
+    const uint32_t tmp[] = {
+                             /* IDSEL 0x11 J17 Slot 1 */
+                             0x8800, 0x0, 0x0, 0x1, mpic, 0x2, 0x1,
+                             0x8800, 0x0, 0x0, 0x2, mpic, 0x3, 0x1,
+                             0x8800, 0x0, 0x0, 0x3, mpic, 0x4, 0x1,
+                             0x8800, 0x0, 0x0, 0x4, mpic, 0x1, 0x1,
+
+                             /* IDSEL 0x12 J16 Slot 2 */
+                             0x9000, 0x0, 0x0, 0x1, mpic, 0x3, 0x1,
+                             0x9000, 0x0, 0x0, 0x2, mpic, 0x4, 0x1,
+                             0x9000, 0x0, 0x0, 0x3, mpic, 0x2, 0x1,
+                             0x9000, 0x0, 0x0, 0x4, mpic, 0x1, 0x1,
+                           };
+    for (i = 0; i < (7 * 8); i++) {
+        pci_map[i] = cpu_to_be32(tmp[i]);
+    }
+}
+
 static int mpc8544_load_device_tree(CPUPPCState *env,
                                     target_phys_addr_t addr,
                                     uint32_t ramsize,
@@ -86,6 +107,11 @@  static int mpc8544_load_device_tree(CPUPPCState *env,
     char mpic[128];
     uint32_t mpic_ph;
     char gutil[128];
+    char pci[128];
+    uint32_t pci_map[7 * 8];
+    uint32_t pci_ranges[12] = { 0x2000000, 0x0, 0xc0000000, 0xc0000000, 0x0,
+                                0x20000000, 0x1000000, 0x0, 0x0, 0xe1000000,
+                                0x0, 0x10000 };
 
     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
     if (!filename) {
@@ -256,6 +282,30 @@  static int mpc8544_load_device_tree(CPUPPCState *env,
                                MPC8544_CCSRBAR_BASE, 0x1000);
     qemu_devtree_setprop(fdt, gutil, "fsl,has-rstcr", NULL, 0);
 
+    sprintf(pci, "/pci@%x", MPC8544_PCI_REGS_BASE);
+    qemu_devtree_add_subnode(fdt, pci);
+    qemu_devtree_setprop_cell(fdt, pci, "cell-index", 0);
+    qemu_devtree_setprop_string(fdt, pci, "compatible", "fsl,mpc8540-pci");
+    qemu_devtree_setprop_string(fdt, pci, "device_type", "pci");
+    qemu_devtree_setprop_cell4(fdt, pci, "interrupt-map-mask", 0xf800, 0x0,
+                               0x0, 0x7);
+    pci_map_create(fdt, pci_map, qemu_devtree_get_phandle(fdt, mpic));
+    qemu_devtree_setprop(fdt, pci, "interrupt-map", pci_map, sizeof(pci_map));
+    qemu_devtree_setprop_phandle(fdt, pci, "interrupt-parent", mpic);
+    qemu_devtree_setprop_cell2(fdt, pci, "interrupts", 24, 2);
+    qemu_devtree_setprop_cell2(fdt, pci, "bus-range", 0, 255);
+    for (i = 0; i < 12; i++) {
+        pci_ranges[i] = cpu_to_be32(pci_ranges[i]);
+    }
+    qemu_devtree_setprop(fdt, pci, "ranges", pci_ranges, sizeof(pci_ranges));
+    qemu_devtree_setprop_cell2(fdt, pci, "reg", MPC8544_PCI_REGS_BASE,
+                               0x1000);
+    qemu_devtree_setprop_cell(fdt, pci, "clock-frequency", 66666666);
+    qemu_devtree_setprop_cell(fdt, pci, "#interrupt-cells", 1);
+    qemu_devtree_setprop_cell(fdt, pci, "#size-cells", 2);
+    qemu_devtree_setprop_cell(fdt, pci, "#address-cells", 3);
+    qemu_devtree_setprop_string(fdt, "/aliases", "pci0", pci);
+
     ret = rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size, addr);
     if (ret < 0) {
         goto out;
diff --git a/pc-bios/mpc8544ds.dtb b/pc-bios/mpc8544ds.dtb
index 25d92f681dec184530af63e2d2cea61cb4cccd04..90ef5c00243b04f4aa3f812b89d5b37c63be09f2 100644
GIT binary patch
literal 72
mcmcb>`|m9S1A_+;TR>?IAT0>Q0zeD{$ZVJxBb31eq&Wct_yhI;

literal 1810
zcmb7EyKdA#6rCkONyI||2}FgEk^-Svaira7i!HW+bSd}&;&>;!qn)*l$3_V>REUy}
ze?a^K5)yPYv~)`kJs<>}GvjgWMJaNn>$&fHJacD0U-|Q0h?VO?h`taPe`CE1z6M?g
zgE}{1|LEk_w^M1INUO+5Lv;y!o5Hq9<9@H(9m>$rwvoAt^sw6tLk672uAUvc+l;-6
zob~N2R<>pzWo;R80ZV7GopV_{%aCs{226a^Hy88}`7l}kC9DIZW|@}3VQGKM+AqVt
z$DlbsZg*I36}&&kr!x8;53PyV+JEl-2bG`t3OICe*6QmH60@`0>)Ai`wtXS)Bgk&Q
zuQjz<4nOfc1K$I4Z+y%P$V_tkRbi@j*vA}HG1SkA=|PoR_d7SHOvS@4rv;Tj#6Wrt
z_V{>?B(J}P?Elf8gFRiIu#4f$4B|<iZKat^0(7u0o4*DzY@6%4@8E0B%ZEz0dpFkU
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z%;OX`dW8Y<ypOvOHgv{*5#k5^o_NNrGY5YY;w6@v`2Y31Ech%&_?e5CR$gVZC$Z=w
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z6;r+gCU{R@z2J<@C64LR&*2-aUgzvG!t0xmeSgMt*6AbLnVE~{5ZA$OM&e0oWJ1-(
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zQK1gC6nT`4@%ra-Ebv?gN4b1l$|OD!tPrSVB#%X`(|Fo&sics3US_x$wHRbkE|a2R
zh|{FVQ>|q#HcrDFFs+jEcq^Mk$p{#D-6oL<a#O^4qrxo8f>~syZIi`mVGCEr6r;2(
I0HBzNe~HoS>i_@%

diff --git a/pc-bios/mpc8544ds.dts b/pc-bios/mpc8544ds.dts
index 4c7bd75..16aba2b 100644
--- a/pc-bios/mpc8544ds.dts
+++ b/pc-bios/mpc8544ds.dts
@@ -11,50 +11,4 @@ 
 
 /dts-v1/;
 / {
-	aliases {
-		pci0 = &pci0;
-	};
-
-	soc8544@e0000000 {
-		mpic: pic@40000 {
-			interrupt-controller;
-			#address-cells = <0>;
-			#interrupt-cells = <2>;
-			reg = <0x40000 0x40000>;
-			compatible = "chrp,open-pic";
-			device_type = "open-pic";
-		};
-	};
-
-	pci0: pci@e0008000 {
-		cell-index = <0>;
-		compatible = "fsl,mpc8540-pci";
-		device_type = "pci";
-		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-		interrupt-map = <
-
-			/* IDSEL 0x11 J17 Slot 1 */
-			0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
-			0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
-			0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
-			0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
-
-			/* IDSEL 0x12 J16 Slot 2 */
-
-			0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
-			0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
-			0x9000 0x0 0x0 0x3 &mpic 0x2 0x1
-			0x9000 0x0 0x0 0x4 &mpic 0x1 0x1>;
-
-		interrupt-parent = <&mpic>;
-		interrupts = <24 2>;
-		bus-range = <0 255>;
-		ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
-			  0x1000000 0x0 0x0 0xe1000000 0x0 0x10000>;
-		clock-frequency = <66666666>;
-		#interrupt-cells = <1>;
-		#size-cells = <2>;
-		#address-cells = <3>;
-		reg = <0xe0008000 0x1000>;
-	};
 };