diff mbox

[for-next,74/74] Kill off cpu_state_reset()

Message ID 1336318514-30906-75-git-send-email-afaerber@suse.de
State New
Headers show

Commit Message

Andreas Färber May 6, 2012, 3:35 p.m. UTC 
In commit 1bba0dc932e8826a7d030df3767daf0bc339f9a2 cpu_reset()
was renamed to cpu_state_reset(), to allow introducing a new cpu_reset()
that would operate on QOM objects.

All callers have been updated except for one in target-mips, so drop all
implementations except for the one in target-mips and move the
declaration there until MIPSCPU reset can be fully QOM'ified.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cpu-all.h                     |    1 -
 target-arm/helper.c           |    5 -----
 target-cris/translate.c       |    5 -----
 target-i386/helper.c          |    6 ------
 target-lm32/helper.c          |    6 ------
 target-m68k/helper.c          |    5 -----
 target-microblaze/translate.c |    5 -----
 target-mips/cpu.h             |    3 +++
 target-ppc/helper.c           |    5 -----
 target-s390x/helper.c         |    9 +--------
 target-sh4/translate.c        |    5 -----
 target-sparc/cpu.c            |    5 -----
 target-xtensa/helper.c        |    5 -----
 13 files changed, 4 insertions(+), 61 deletions(-)

Comments

Michael Walle May 9, 2012, 6:16 p.m. UTC | #1 
> In commit 1bba0dc932e8826a7d030df3767daf0bc339f9a2 cpu_reset()
> was renamed to cpu_state_reset(), to allow introducing a new cpu_reset()
> that would operate on QOM objects.
> 
> All callers have been updated except for one in target-mips, so drop all
> implementations except for the one in target-mips and move the
> declaration there until MIPSCPU reset can be fully QOM'ified.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>

[..]

> diff --git a/target-lm32/helper.c b/target-lm32/helper.c
> index 3b1cee7..1ea477f 100644
> --- a/target-lm32/helper.c
> +++ b/target-lm32/helper.c
> @@ -233,9 +233,3 @@ void cpu_lm32_set_phys_msb_ignore(CPULM32State *env,
> int value) env->flags &= ~LM32_FLAG_IGNORE_MSB;
>      }
>  }
> -
> -void cpu_state_reset(CPULM32State *env)
> -{
> -    cpu_reset(ENV_GET_CPU(env));
> -}
> -

Acked-by: Michael Walle <michael@walle.cc>
diff mbox

Patch

diff --git a/cpu-all.h b/cpu-all.h
index 028528f..3a93c0c 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -443,7 +443,6 @@  void cpu_watchpoint_remove_all(CPUArchState *env, int mask);
 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
 
 void cpu_single_step(CPUArchState *env, int enabled);
-void cpu_state_reset(CPUArchState *s);
 int cpu_is_stopped(CPUArchState *env);
 void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data);
 
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 06ebffc..bbb1d05 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -4,11 +4,6 @@ 
 #include "host-utils.h"
 #include "sysemu.h"
 
-void cpu_state_reset(CPUARMState *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 static int vfp_gdb_get_reg(CPUARMState *env, uint8_t *buf, int reg)
 {
     int nregs;
diff --git a/target-cris/translate.c b/target-cris/translate.c
index eed03d3..1ad9ec7 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3576,11 +3576,6 @@  CRISCPU *cpu_cris_init(const char *cpu_model)
     return cpu;
 }
 
-void cpu_state_reset(CPUCRISState *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 void restore_state_to_opc(CPUCRISState *env, TranslationBlock *tb, int pc_pos)
 {
 	env->pc = gen_opc_pc[pc_pos];
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 4577cae..1c3246b 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -26,12 +26,6 @@ 
 
 //#define DEBUG_MMU
 
-/* NOTE: must be called outside the CPU execute loop */
-void cpu_state_reset(CPUX86State *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 static void cpu_x86_version(CPUX86State *env, int *family, int *model)
 {
     int cpuver = env->cpuid_version;
diff --git a/target-lm32/helper.c b/target-lm32/helper.c
index 3b1cee7..1ea477f 100644
--- a/target-lm32/helper.c
+++ b/target-lm32/helper.c
@@ -233,9 +233,3 @@  void cpu_lm32_set_phys_msb_ignore(CPULM32State *env, int value)
         env->flags &= ~LM32_FLAG_IGNORE_MSB;
     }
 }
-
-void cpu_state_reset(CPULM32State *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index f428375..eac0053 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -98,11 +98,6 @@  static int fpu_gdb_set_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
     return 0;
 }
 
-void cpu_state_reset(CPUM68KState *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 CPUM68KState *cpu_m68k_init(const char *cpu_model)
 {
     M68kCPU *cpu;
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index afa6255..87b2fe1 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1939,11 +1939,6 @@  MicroBlazeCPU *cpu_mb_init(const char *cpu_model)
     return cpu;
 }
 
-void cpu_state_reset(CPUMBState *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 void restore_state_to_opc(CPUMBState *env, TranslationBlock *tb, int pc_pos)
 {
     env->sregs[SR_PC] = gen_opc_pc[pc_pos];
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index a6961f8..d5150de 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -496,6 +496,9 @@  void cpu_unassigned_access(CPUMIPSState *env, target_phys_addr_t addr,
 
 void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf);
 
+/* TODO QOM'ify CPU reset and remove */
+void cpu_state_reset(CPUMIPSState *s);
+
 #define cpu_init(model) (&cpu_mips_init(model)->env)
 #define cpu_exec cpu_mips_exec
 #define cpu_gen_code cpu_mips_gen_code
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 42f66e8..f556f85 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -3186,11 +3186,6 @@  void cpu_dump_rfi (target_ulong RA, target_ulong msr)
              TARGET_FMT_lx "\n", RA, msr);
 }
 
-void cpu_state_reset(CPUPPCState *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 PowerPCCPU *cpu_ppc_init(const char *cpu_model)
 {
     PowerPCCPU *cpu;
diff --git a/target-s390x/helper.c b/target-s390x/helper.c
index 209a696..a34a35b 100644
--- a/target-s390x/helper.c
+++ b/target-s390x/helper.c
@@ -106,14 +106,7 @@  int cpu_s390x_handle_mmu_fault (CPUS390XState *env, target_ulong address, int rw
     return 1;
 }
 
-#endif /* CONFIG_USER_ONLY */
-
-void cpu_state_reset(CPUS390XState *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
-#ifndef CONFIG_USER_ONLY
+#else /* !CONFIG_USER_ONLY */
 
 /* Ensure to exit the TB after this call! */
 static void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilc)
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 7d35b84..6532ad2 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -178,11 +178,6 @@  void cpu_dump_state(CPUSH4State * env, FILE * f,
     }
 }
 
-void cpu_state_reset(CPUSH4State *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 typedef struct {
     const char *name;
     int id;
diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index 8ccac23..f7c004c 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -23,11 +23,6 @@ 
 
 static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model);
 
-void cpu_state_reset(CPUSPARCState *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 /* CPUClass::reset() */
 static void sparc_cpu_reset(CPUState *s)
 {
diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c
index e6cb3fe..5e7e72e 100644
--- a/target-xtensa/helper.c
+++ b/target-xtensa/helper.c
@@ -33,11 +33,6 @@ 
 #include "hw/loader.h"
 #endif
 
-void cpu_state_reset(CPUXtensaState *env)
-{
-    cpu_reset(ENV_GET_CPU(env));
-}
-
 static struct XtensaConfigList *xtensa_cores;
 
 void xtensa_register_core(XtensaConfigList *node)