| Message ID | 201204262253.02758.ebotcazou@adacore.com |
|---|---|
| State | New |
| Headers | show |
Jakub, > 2012-04-26 Eric Botcazou <ebotcazou@adacore.com> > > PR target/48496 > * recog.c (constrain_operands): If extra constraints are present, > accept pseudo-registers with equivalent memory locations during reload. Is this version OK with you?
On Fri, May 04, 2012 at 12:19:39PM +0200, Eric Botcazou wrote: > > 2012-04-26 Eric Botcazou <ebotcazou@adacore.com> > > > > PR target/48496 > > * recog.c (constrain_operands): If extra constraints are present, > > accept pseudo-registers with equivalent memory locations during reload. > > Is this version OK with you? Ok. Jakub
Index: recog.c =================================================================== --- recog.c (revision 186718) +++ recog.c (working copy) @@ -2673,6 +2673,16 @@ constrain_operands (int strict) /* Every address operand can be reloaded to fit. */ && strict < 0) win = 1; + /* Cater to architectures like IA-64 that define extra memory + constraints without using define_memory_constraint. */ + else if (reload_in_progress + && REG_P (op) + && REGNO (op) >= FIRST_PSEUDO_REGISTER + && reg_renumber[REGNO (op)] < 0 + && reg_equiv_mem (REGNO (op)) != 0 + && EXTRA_CONSTRAINT_STR + (reg_equiv_mem (REGNO (op)), c, p)) + win = 1; #endif break; }
Hi, this is the spurious error on asm statements of the form: error: 'asm' operand requires impossible reload present for IA-64 on mainline and 4.7 branch. As diagnosed by Ulrich, the code responsible for the error implicitly assumes that constraints accepting memory operands also accept pseudo-registers during reload. That isn't true for the Q constraint of IA-64. Rather than tweaking the constraint, the patch tweaks constrain_operands to make it accept pseudo-registers with equivalent memory locations during reload. Tested on IA-64/Linux, OK for mainline and 4.7 branch? 2012-04-26 Eric Botcazou <ebotcazou@adacore.com> PR target/48496 * recog.c (constrain_operands): If extra constraints are present, accept pseudo-registers with equivalent memory locations during reload.