diff mbox

[11/14] tcg-sparc: Mask shift immediates to avoid illegal insns.

Message ID 1334842395-31819-12-git-send-email-rth@twiddle.net
State New
Headers show

Commit Message

Richard Henderson April 19, 2012, 1:33 p.m. UTC 
The xtensa-test image generates a sra_i32 with count 0x40.
Whether this is accident of tcg constant propagation or
originating directly from the instruction stream is immaterial.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/sparc/tcg-target.c |   18 ++++++++++++------
 1 files changed, 12 insertions(+), 6 deletions(-)

Comments

Max Filippov April 19, 2012, 7:55 p.m. UTC | #1 
On Thu, Apr 19, 2012 at 5:33 PM, Richard Henderson <rth@twiddle.net> wrote:
> The xtensa-test image generates a sra_i32 with count 0x40.

Richard, what is that xtensa-test image that you refer?

> Whether this is accident of tcg constant propagation or
> originating directly from the instruction stream is immaterial.
Richard Henderson April 21, 2012, 2:01 p.m. UTC | #2 
On 04/19/2012 02:55 PM, Max Filippov wrote:
> On Thu, Apr 19, 2012 at 5:33 PM, Richard Henderson <rth@twiddle.net> wrote:
>> The xtensa-test image generates a sra_i32 with count 0x40.
> 
> Richard, what is that xtensa-test image that you refer?

http://wiki.qemu.org/Testing

near the bottom.


r~
diff mbox

Patch

diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 88c5140..5b3cde4 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -1184,13 +1184,16 @@  static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
         goto gen_arith;
     case INDEX_op_shl_i32:
         c = SHIFT_SLL;
-        goto gen_arith;
+    do_shift32:
+        /* Limit immediate shift count lest we create an illegal insn.  */
+        tcg_out_arithc(s, args[0], args[1], args[2] & 31, const_args[2], c);
+        break;
     case INDEX_op_shr_i32:
         c = SHIFT_SRL;
-        goto gen_arith;
+        goto do_shift32;
     case INDEX_op_sar_i32:
         c = SHIFT_SRA;
-        goto gen_arith;
+        goto do_shift32;
     case INDEX_op_mul_i32:
         c = ARITH_UMUL;
         goto gen_arith;
@@ -1311,13 +1314,16 @@  static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
         break;
     case INDEX_op_shl_i64:
         c = SHIFT_SLLX;
-        goto gen_arith;
+    do_shift64:
+        /* Limit immediate shift count lest we create an illegal insn.  */
+        tcg_out_arithc(s, args[0], args[1], args[2] & 63, const_args[2], c);
+        break;
     case INDEX_op_shr_i64:
         c = SHIFT_SRLX;
-        goto gen_arith;
+        goto do_shift64;
     case INDEX_op_sar_i64:
         c = SHIFT_SRAX;
-        goto gen_arith;
+        goto do_shift64;
     case INDEX_op_mul_i64:
         c = ARITH_MULX;
         goto gen_arith;