Message ID | CAAu8pHsGOG_gsdhY3D4vyK=XKeQFErX_oNrd=PPQAdaySG8qrA@mail.gmail.com |
---|---|
State | New |
Headers | show |
On 04/15/2012 11:32 AM, Blue Swirl wrote: > Skip ROM or kernel loading and TCG init for qtest. > > For Xtensa there is no default board and the > default board (g3beige) for PPCEMB seems to be wrong. > > Signed-off-by: Blue Swirl<blauwirbel@gmail.com> Why tcg_enabled() vs. !qtest_enabled()? Regards, Anthony Liguori > --- > hw/an5206.c | 4 +- > hw/axis_dev88.c | 4 ++ > hw/collie.c | 3 ++ > hw/exynos4_boards.c | 8 +++- > hw/highbank.c | 3 ++ > hw/integratorcp.c | 3 ++ > hw/mainstone.c | 3 ++ > hw/mcf5208.c | 3 ++ > hw/mips_fulong2e.c | 49 ++++++++++++----------- > hw/mips_jazz.c | 31 ++++++++------- > hw/mips_malta.c | 88 +++++++++++++++++++++-------------------- > hw/mips_mipssim.c | 39 +++++++++--------- > hw/musicpal.c | 3 ++ > hw/omap_sx1.c | 2 +- > hw/palm.c | 2 +- > hw/realview.c | 3 ++ > hw/s390-virtio.c | 68 +++++++++++++++---------------- > hw/shix.c | 28 +++++++------ > hw/spitz.c | 3 ++ > hw/tosa.c | 3 ++ > hw/versatilepb.c | 3 ++ > hw/vexpress.c | 4 +- > hw/xilinx_zynq.c | 3 ++ > target-alpha/translate.c | 4 +- > target-cris/translate.c | 5 ++- > target-m68k/helper.c | 2 +- > target-microblaze/translate.c | 3 +- > target-mips/translate.c | 4 +- > target-sh4/translate.c | 4 +- > target-sparc/cpu.c | 4 +- > 30 files changed, 228 insertions(+), 158 deletions(-) > > diff --git a/hw/an5206.c b/hw/an5206.c > index 25407c0..355fccb 100644 > --- a/hw/an5206.c > +++ b/hw/an5206.c > @@ -58,7 +58,7 @@ static void an5206_init(ram_addr_t ram_size, > mcf5206_init(address_space_mem, AN5206_MBAR_ADDR, env); > > /* Load kernel. */ > - if (!kernel_filename) { > + if (tcg_enabled()&& !kernel_filename) { > fprintf(stderr, "Kernel image must be specified\n"); > exit(1); > } > @@ -74,7 +74,7 @@ static void an5206_init(ram_addr_t ram_size, > ram_size - KERNEL_LOAD_ADDR); > entry = KERNEL_LOAD_ADDR; > } > - if (kernel_size< 0) { > + if (tcg_enabled()&& kernel_size< 0) { > fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename); > exit(1); > } > diff --git a/hw/axis_dev88.c b/hw/axis_dev88.c > index 2304e35..b888dae 100644 > --- a/hw/axis_dev88.c > +++ b/hw/axis_dev88.c > @@ -337,6 +337,10 @@ void axisdev88_init (ram_addr_t ram_size, > irq[0x14 + i]); > } > > + if (!tcg_enabled()) { > + return; > + } > + > if (!kernel_filename) { > fprintf(stderr, "Kernel image must be specified\n"); > exit(1); > diff --git a/hw/collie.c b/hw/collie.c > index 42f4310..4474d2a 100644 > --- a/hw/collie.c > +++ b/hw/collie.c > @@ -49,6 +49,9 @@ static void collie_init(ram_addr_t ram_size, > 512, 4, 0x00, 0x00, 0x00, 0x00, 0); > > sysbus_create_simple("scoop", 0x40800000, NULL); > + if (!tcg_enabled()) { > + return; > + } > > collie_binfo.kernel_filename = kernel_filename; > collie_binfo.kernel_cmdline = kernel_cmdline; > diff --git a/hw/exynos4_boards.c b/hw/exynos4_boards.c > index ea32c51..ae8070c 100644 > --- a/hw/exynos4_boards.c > +++ b/hw/exynos4_boards.c > @@ -138,7 +138,9 @@ static void nuri_init(ram_addr_t ram_size, > exynos4_boards_init_common(kernel_filename, kernel_cmdline, > initrd_filename, EXYNOS4_BOARD_NURI); > > - arm_load_kernel(first_cpu,&exynos4_board_binfo); > + if (tcg_enabled()) { > + arm_load_kernel(first_cpu,&exynos4_board_binfo); > + } > } > > static void smdkc210_init(ram_addr_t ram_size, > @@ -151,7 +153,9 @@ static void smdkc210_init(ram_addr_t ram_size, > > lan9215_init(SMDK_LAN9118_BASE_ADDR, > qemu_irq_invert(s->irq_table[exynos4210_get_irq(37, 1)])); > - arm_load_kernel(first_cpu,&exynos4_board_binfo); > + if (tcg_enabled()) { > + arm_load_kernel(first_cpu,&exynos4_board_binfo); > + } > } > > static QEMUMachine exynos4_machines[EXYNOS4_NUM_OF_BOARDS] = { > diff --git a/hw/highbank.c b/hw/highbank.c > index 906eed5..6b44580 100644 > --- a/hw/highbank.c > +++ b/hw/highbank.c > @@ -305,6 +305,9 @@ static void highbank_init(ram_addr_t ram_size, > sysbus_connect_irq(sysbus_from_qdev(dev), 1, pic[81]); > sysbus_connect_irq(sysbus_from_qdev(dev), 2, pic[82]); > } > + if (!tcg_enabled()) { > + return; > + } > > highbank_binfo.ram_size = ram_size; > highbank_binfo.kernel_filename = kernel_filename; > diff --git a/hw/integratorcp.c b/hw/integratorcp.c > index 9bdb9e6..8e84fbe 100644 > --- a/hw/integratorcp.c > +++ b/hw/integratorcp.c > @@ -495,6 +495,9 @@ static void integratorcp_init(ram_addr_t ram_size, > smc91c111_init(&nd_table[0], 0xc8000000, pic[27]); > > sysbus_create_simple("pl110", 0xc0000000, pic[22]); > + if (!tcg_enabled()) { > + return; > + } > > integrator_binfo.ram_size = ram_size; > integrator_binfo.kernel_filename = kernel_filename; > diff --git a/hw/mainstone.c b/hw/mainstone.c > index 27f5900..87d941d 100644 > --- a/hw/mainstone.c > +++ b/hw/mainstone.c > @@ -164,6 +164,9 @@ static void mainstone_common_init(MemoryRegion > *address_space_mem, > smc91c111_init(&nd_table[0], MST_ETH_PHYS, > qdev_get_gpio_in(mst_irq, ETHERNET_IRQ)); > > + if (!tcg_enabled()) { > + return; > + } > mainstone_binfo.kernel_filename = kernel_filename; > mainstone_binfo.kernel_cmdline = kernel_cmdline; > mainstone_binfo.initrd_filename = initrd_filename; > diff --git a/hw/mcf5208.c b/hw/mcf5208.c > index d3ebe8d..1b8a424 100644 > --- a/hw/mcf5208.c > +++ b/hw/mcf5208.c > @@ -262,6 +262,9 @@ static void mcf5208evb_init(ram_addr_t ram_size, > /* 0xfc0a4000 GPIO. */ > /* 0xfc0a8000 SDRAM controller. */ > > + if (!tcg_enabled()) { > + return; > + } > /* Load kernel. */ > if (!kernel_filename) { > fprintf(stderr, "Kernel image must be specified\n"); > diff --git a/hw/mips_fulong2e.c b/hw/mips_fulong2e.c > index 37dc711..36bfb90 100644 > --- a/hw/mips_fulong2e.c > +++ b/hw/mips_fulong2e.c > @@ -303,32 +303,33 @@ static void mips_fulong2e_init(ram_addr_t > ram_size, const char *boot_device, > memory_region_add_subregion(address_space_mem, 0, ram); > memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); > > - /* We do not support flash operation, just loading pmon.bin as raw BIOS. > - * Please use -L to set the BIOS path and -bios to set bios name. */ > - > - if (kernel_filename) { > - loaderparams.ram_size = ram_size; > - loaderparams.kernel_filename = kernel_filename; > - loaderparams.kernel_cmdline = kernel_cmdline; > - loaderparams.initrd_filename = initrd_filename; > - kernel_entry = load_kernel (env); > - write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry); > - } else { > - if (bios_name == NULL) { > - bios_name = FULONG_BIOSNAME; > - } > - filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); > - if (filename) { > - bios_size = load_image_targphys(filename, 0x1fc00000LL, > - BIOS_SIZE); > - g_free(filename); > + if (tcg_enabled()) { > + /* We do not support flash operation, just loading pmon.bin > as raw BIOS. > + * Please use -L to set the BIOS path and -bios to set bios name. */ > + if (kernel_filename) { > + loaderparams.ram_size = ram_size; > + loaderparams.kernel_filename = kernel_filename; > + loaderparams.kernel_cmdline = kernel_cmdline; > + loaderparams.initrd_filename = initrd_filename; > + kernel_entry = load_kernel (env); > + write_bootloader(env, memory_region_get_ram_ptr(bios), > kernel_entry); > } else { > - bios_size = -1; > - } > + if (bios_name == NULL) { > + bios_name = FULONG_BIOSNAME; > + } > + filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); > + if (filename) { > + bios_size = load_image_targphys(filename, 0x1fc00000LL, > + BIOS_SIZE); > + g_free(filename); > + } else { > + bios_size = -1; > + } > > - if ((bios_size< 0 || bios_size> BIOS_SIZE)&& !kernel_filename) { > - fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", > bios_name); > - exit(1); > + if ((bios_size< 0 || bios_size> BIOS_SIZE)&& !kernel_filename) { > + fprintf(stderr, "qemu: Could not load MIPS bios > '%s'\n", bios_name); > + exit(1); > + } > } > } > > diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c > index a6bc7ba..b0f42ec 100644 > --- a/hw/mips_jazz.c > +++ b/hw/mips_jazz.c > @@ -161,20 +161,23 @@ static void mips_jazz_init(MemoryRegion *address_space, > memory_region_add_subregion(address_space, 0xfff00000LL, bios2); > > /* load the BIOS image. */ > - if (bios_name == NULL) > - bios_name = BIOS_FILENAME; > - filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); > - if (filename) { > - bios_size = load_image_targphys(filename, 0xfff00000LL, > - MAGNUM_BIOS_SIZE); > - g_free(filename); > - } else { > - bios_size = -1; > - } > - if (bios_size< 0 || bios_size> MAGNUM_BIOS_SIZE) { > - fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", > - bios_name); > - exit(1); > + if (tcg_enabled()) { > + if (bios_name == NULL) { > + bios_name = BIOS_FILENAME; > + } > + filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); > + if (filename) { > + bios_size = load_image_targphys(filename, 0xfff00000LL, > + MAGNUM_BIOS_SIZE); > + g_free(filename); > + } else { > + bios_size = -1; > + } > + if (bios_size< 0 || bios_size> MAGNUM_BIOS_SIZE) { > + fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", > + bios_name); > + exit(1); > + } > } > > /* Init CPU internal devices */ > diff --git a/hw/mips_malta.c b/hw/mips_malta.c > index 4752bb2..ebbe06a 100644 > --- a/hw/mips_malta.c > +++ b/hw/mips_malta.c > @@ -872,58 +872,62 @@ void mips_malta_init (ram_addr_t ram_size, > 4, 0x0000, 0x0000, 0x0000, 0x0000, be); > bios = pflash_cfi01_get_memory(fl); > fl_idx++; > - if (kernel_filename) { > - /* Write a small bootloader to the flash location. */ > - loaderparams.ram_size = ram_size; > - loaderparams.kernel_filename = kernel_filename; > - loaderparams.kernel_cmdline = kernel_cmdline; > - loaderparams.initrd_filename = initrd_filename; > - kernel_entry = load_kernel(); > - write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry); > - } else { > - /* Load firmware from flash. */ > - if (!dinfo) { > - /* Load a BIOS image. */ > - if (bios_name == NULL) { > - bios_name = BIOS_FILENAME; > - } > - filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); > - if (filename) { > - bios_size = load_image_targphys(filename, FLASH_ADDRESS, > - BIOS_SIZE); > - g_free(filename); > - } else { > - bios_size = -1; > - } > - if ((bios_size< 0 || bios_size> BIOS_SIZE)&& !kernel_filename) { > - fprintf(stderr, > - "qemu: Could not load MIPS bios '%s', and no > -kernel argument was specified\n", > - bios_name); > - exit(1); > + if (tcg_enabled()) { > + if (kernel_filename) { > + /* Write a small bootloader to the flash location. */ > + loaderparams.ram_size = ram_size; > + loaderparams.kernel_filename = kernel_filename; > + loaderparams.kernel_cmdline = kernel_cmdline; > + loaderparams.initrd_filename = initrd_filename; > + kernel_entry = load_kernel(); > + write_bootloader(env, memory_region_get_ram_ptr(bios), > kernel_entry); > + } else { > + /* Load firmware from flash. */ > + if (!dinfo) { > + /* Load a BIOS image. */ > + if (bios_name == NULL) { > + bios_name = BIOS_FILENAME; > + } > + filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); > + if (filename) { > + bios_size = load_image_targphys(filename, FLASH_ADDRESS, > + BIOS_SIZE); > + g_free(filename); > + } else { > + bios_size = -1; > + } > + if ((bios_size< 0 || bios_size> BIOS_SIZE)&& > !kernel_filename) { > + fprintf(stderr, > + "qemu: Could not load MIPS bios '%s', and > no -kernel argument was specified\n", > + bios_name); > + exit(1); > + } > } > - } > - /* In little endian mode the 32bit words in the bios are swapped, > - a neat trick which allows bi-endian firmware. */ > + /* In little endian mode the 32bit words in the bios are swapped, > + a neat trick which allows bi-endian firmware. */ > #ifndef TARGET_WORDS_BIGENDIAN > - { > - uint32_t *addr = memory_region_get_ram_ptr(bios); > - uint32_t *end = addr + bios_size; > - while (addr< end) { > - bswap32s(addr); > - addr++; > + { > + uint32_t *addr = memory_region_get_ram_ptr(bios); > + uint32_t *end = addr + bios_size; > + while (addr< end) { > + bswap32s(addr); > + addr++; > + } > } > - } > #endif > + } > } > > /* Map the BIOS at a 2nd physical location, as on the real board. */ > memory_region_init_alias(bios_alias, "bios.1fc", bios, 0, BIOS_SIZE); > memory_region_add_subregion(system_memory, RESET_ADDRESS, bios_alias); > > - /* Board ID = 0x420 (Malta Board with CoreLV) > - XXX: theoretically 0x1e000010 should map to flash and 0x1fc00010 should > - map to the board ID. */ > - stl_p(memory_region_get_ram_ptr(bios) + 0x10, 0x00000420); > + if (tcg_enabled()) { > + /* Board ID = 0x420 (Malta Board with CoreLV) > + XXX: theoretically 0x1e000010 should map to flash and > 0x1fc00010 should > + map to the board ID. */ > + stl_p(memory_region_get_ram_ptr(bios) + 0x10, 0x00000420); > + } > > /* Init internal devices */ > cpu_mips_irq_init_cpu(env); > diff --git a/hw/mips_mipssim.c b/hw/mips_mipssim.c > index 1ea7b58..a248619 100644 > --- a/hw/mips_mipssim.c > +++ b/hw/mips_mipssim.c > @@ -174,24 +174,27 @@ mips_mipssim_init (ram_addr_t ram_size, > /* Map the BIOS / boot exception handler. */ > memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); > /* Load a BIOS / boot exception handler image. */ > - if (bios_name == NULL) > - bios_name = BIOS_FILENAME; > - filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); > - if (filename) { > - bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE); > - g_free(filename); > - } else { > - bios_size = -1; > - } > - if ((bios_size< 0 || bios_size> BIOS_SIZE)&& !kernel_filename) { > - /* Bail out if we have neither a kernel image nor boot vector code. */ > - fprintf(stderr, > - "qemu: Could not load MIPS bios '%s', and no -kernel > argument was specified\n", > - filename); > - exit(1); > - } else { > - /* We have a boot vector start address. */ > - env->active_tc.PC = (target_long)(int32_t)0xbfc00000; > + if (tcg_enabled()) { > + if (bios_name == NULL) { > + bios_name = BIOS_FILENAME; > + } > + filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); > + if (filename) { > + bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE); > + g_free(filename); > + } else { > + bios_size = -1; > + } > + if ((bios_size< 0 || bios_size> BIOS_SIZE)&& !kernel_filename) { > + /* Bail out if we have neither a kernel image nor boot > vector code. */ > + fprintf(stderr, > + "qemu: Could not load MIPS bios '%s', and no > -kernel argument was specified\n", > + filename); > + exit(1); > + } else { > + /* We have a boot vector start address. */ > + env->active_tc.PC = (target_long)(int32_t)0xbfc00000; > + } > } > > if (kernel_filename) { > diff --git a/hw/musicpal.c b/hw/musicpal.c > index c9f845a..cdc71b0 100644 > --- a/hw/musicpal.c > +++ b/hw/musicpal.c > @@ -1646,6 +1646,9 @@ static void musicpal_init(ram_addr_t ram_size, > qdev_init_nofail(dev); > sysbus_mmio_map(s, 0, MP_AUDIO_BASE); > sysbus_connect_irq(s, 0, pic[MP_AUDIO_IRQ]); > + if (!tcg_enabled()) { > + return; > + } > > musicpal_binfo.ram_size = MP_RAM_DEFAULT_SIZE; > musicpal_binfo.kernel_filename = kernel_filename; > diff --git a/hw/omap_sx1.c b/hw/omap_sx1.c > index 4e8ec4a..162462a 100644 > --- a/hw/omap_sx1.c > +++ b/hw/omap_sx1.c > @@ -192,7 +192,7 @@ static void sx1_init(ram_addr_t ram_size, > OMAP_CS1_BASE,&cs[1]); > } > > - if (!kernel_filename&& !fl_idx) { > + if (tcg_enabled()&& !kernel_filename&& !fl_idx) { > fprintf(stderr, "Kernel or Flash image must be specified\n"); > exit(1); > } > diff --git a/hw/palm.c b/hw/palm.c > index b1252ab..c293db5 100644 > --- a/hw/palm.c > +++ b/hw/palm.c > @@ -255,7 +255,7 @@ static void palmte_init(ram_addr_t ram_size, > } > } > > - if (!rom_loaded&& !kernel_filename) { > + if (tcg_enabled()&& !rom_loaded&& !kernel_filename) { > fprintf(stderr, "Kernel or ROM image must be specified\n"); > exit(1); > } > diff --git a/hw/realview.c b/hw/realview.c > index cf55204..40f2b8b 100644 > --- a/hw/realview.c > +++ b/hw/realview.c > @@ -395,6 +395,9 @@ static void realview_init(ram_addr_t ram_size, > memory_region_init_ram(ram_hack, "realview.hack", 0x1000); > vmstate_register_ram_global(ram_hack); > memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack); > + if (!tcg_enabled()) { > + return; > + } > > realview_binfo.ram_size = ram_size; > realview_binfo.kernel_filename = kernel_filename; > diff --git a/hw/s390-virtio.c b/hw/s390-virtio.c > index 1ebe70d..7f7b5c8 100644 > --- a/hw/s390-virtio.c > +++ b/hw/s390-virtio.c > @@ -223,43 +223,45 @@ static void s390_init(ram_addr_t my_ram_size, > /* One CPU has to run */ > s390_add_running_cpu(env); > > - if (kernel_filename) { > + if (tcg_enabled()) { > + if (kernel_filename) { > > - kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, NULL, > - NULL, 1, ELF_MACHINE, 0); > - if (kernel_size == -1UL) { > - kernel_size = load_image_targphys(kernel_filename, 0, ram_size); > - } > - /* > - * we can not rely on the ELF entry point, since up to 3.2 this > - * value was 0x800 (the SALIPL loader) and it wont work. For > - * all (Linux) cases 0x10000 (KERN_IMAGE_START) should be fine. > - */ > - env->psw.addr = KERN_IMAGE_START; > - env->psw.mask = 0x0000000180000000ULL; > - } else { > - ram_addr_t bios_size = 0; > - char *bios_filename; > - > - /* Load zipl bootloader */ > - if (bios_name == NULL) { > - bios_name = ZIPL_FILENAME; > - } > + kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, NULL, > + NULL, 1, ELF_MACHINE, 0); > + if (kernel_size == -1UL) { > + kernel_size = load_image_targphys(kernel_filename, 0, > ram_size); > + } > + /* > + * we can not rely on the ELF entry point, since up to 3.2 this > + * value was 0x800 (the SALIPL loader) and it wont work. For > + * all (Linux) cases 0x10000 (KERN_IMAGE_START) should be fine. > + */ > + env->psw.addr = KERN_IMAGE_START; > + env->psw.mask = 0x0000000180000000ULL; > + } else { > + ram_addr_t bios_size = 0; > + char *bios_filename; > > - bios_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); > - bios_size = load_image_targphys(bios_filename, ZIPL_LOAD_ADDR, 4096); > - g_free(bios_filename); > + /* Load zipl bootloader */ > + if (bios_name == NULL) { > + bios_name = ZIPL_FILENAME; > + } > > - if ((long)bios_size< 0) { > - hw_error("could not load bootloader '%s'\n", bios_name); > - } > + bios_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); > + bios_size = load_image_targphys(bios_filename, > ZIPL_LOAD_ADDR, 4096); > + g_free(bios_filename); > > - if (bios_size> 4096) { > - hw_error("stage1 bootloader is> 4k\n"); > - } > + if ((long)bios_size< 0) { > + hw_error("could not load bootloader '%s'\n", bios_name); > + } > > - env->psw.addr = ZIPL_START; > - env->psw.mask = 0x0000000180000000ULL; > + if (bios_size> 4096) { > + hw_error("stage1 bootloader is> 4k\n"); > + } > + > + env->psw.addr = ZIPL_START; > + env->psw.mask = 0x0000000180000000ULL; > + } > } > > if (initrd_filename) { > @@ -274,7 +276,7 @@ static void s390_init(ram_addr_t my_ram_size, > memcpy(rom_ptr(INITRD_PARM_SIZE),&initrd_size, 8); > } > > - if (kernel_cmdline) { > + if (tcg_enabled()&& kernel_cmdline) { > /* we have to overwrite values in the kernel image, which are "rom" */ > memcpy(rom_ptr(KERN_PARM_AREA), kernel_cmdline, > strlen(kernel_cmdline) + 1); > diff --git a/hw/shix.c b/hw/shix.c > index dd9ce17..3d1ab05 100644 > --- a/hw/shix.c > +++ b/hw/shix.c > @@ -70,22 +70,26 @@ static void shix_init(ram_addr_t ram_size, > vmstate_register_ram_global(&sdram[1]); > memory_region_add_subregion(sysmem, 0x0c000000,&sdram[1]); > > - /* Load BIOS in 0 (and access it through P2, 0xA0000000) */ > - if (bios_name == NULL) > - bios_name = BIOS_FILENAME; > - printf("%s: load BIOS '%s'\n", __func__, bios_name); > - ret = load_image_targphys(bios_name, 0, 0x4000); > - if (ret< 0) { /* Check bios size */ > - fprintf(stderr, "ret=%d\n", ret); > - fprintf(stderr, "qemu: could not load SHIX bios '%s'\n", > - bios_name); > - exit(1); > + if (tcg_enabled()) { > + /* Load BIOS in 0 (and access it through P2, 0xA0000000) */ > + if (bios_name == NULL) { > + bios_name = BIOS_FILENAME; > + } > + printf("%s: load BIOS '%s'\n", __func__, bios_name); > + ret = load_image_targphys(bios_name, 0, 0x4000); > + if (ret< 0) { /* Check bios size */ > + fprintf(stderr, "ret=%d\n", ret); > + fprintf(stderr, "qemu: could not load SHIX bios '%s'\n", > + bios_name); > + exit(1); > + } > } > - > /* Register peripherals */ > s = sh7750_init(env, sysmem); > /* XXXXX Check success */ > - tc58128_init(s, "shix_linux_nand.bin", NULL); > + if (tcg_enabled()) { > + tc58128_init(s, "shix_linux_nand.bin", NULL); > + } > fprintf(stderr, "initialization terminated\n"); > } > > diff --git a/hw/spitz.c b/hw/spitz.c > index 1d6d2b0..284cf78 100644 > --- a/hw/spitz.c > +++ b/hw/spitz.c > @@ -928,6 +928,9 @@ static void spitz_common_init(ram_addr_t ram_size, > /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */ > spitz_microdrive_attach(cpu, 0); > > + if (!tcg_enabled()) { > + return; > + } > spitz_binfo.kernel_filename = kernel_filename; > spitz_binfo.kernel_cmdline = kernel_cmdline; > spitz_binfo.initrd_filename = initrd_filename; > diff --git a/hw/tosa.c b/hw/tosa.c > index 6baa17d..a66385e 100644 > --- a/hw/tosa.c > +++ b/hw/tosa.c > @@ -237,6 +237,9 @@ static void tosa_init(ram_addr_t ram_size, > tosa_microdrive_attach(cpu); > > tosa_tg_init(cpu); > + if (!tcg_enabled()) { > + return; > + } > > tosa_binfo.kernel_filename = kernel_filename; > tosa_binfo.kernel_cmdline = kernel_cmdline; > diff --git a/hw/versatilepb.c b/hw/versatilepb.c > index 25afb1e..0f91148 100644 > --- a/hw/versatilepb.c > +++ b/hw/versatilepb.c > @@ -311,6 +311,9 @@ static void versatile_init(ram_addr_t ram_size, > /* 0x101f3000 UART2. */ > /* 0x101f4000 SSPI. */ > > + if (!tcg_enabled()) { > + return; > + } > versatile_binfo.ram_size = ram_size; > versatile_binfo.kernel_filename = kernel_filename; > versatile_binfo.kernel_cmdline = kernel_cmdline; > diff --git a/hw/vexpress.c b/hw/vexpress.c > index 18d87ac..c7cee81 100644 > --- a/hw/vexpress.c > +++ b/hw/vexpress.c > @@ -427,7 +427,9 @@ static void vexpress_common_init(const > VEDBoardInfo *daughterboard, > /* VE_USB: not modelled */ > > /* VE_DAPROM: not modelled */ > - > + if (!tcg_enabled()) { > + return; > + } > vexpress_binfo.ram_size = ram_size; > vexpress_binfo.kernel_filename = kernel_filename; > vexpress_binfo.kernel_cmdline = kernel_cmdline; > diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c > index 7290c64..813d0d7 100644 > --- a/hw/xilinx_zynq.c > +++ b/hw/xilinx_zynq.c > @@ -130,6 +130,9 @@ static void zynq_init(ram_addr_t ram_size, const > char *boot_device, > } > } > > + if (!tcg_enabled()) { > + return; > + } > zynq_binfo.ram_size = ram_size; > zynq_binfo.kernel_filename = kernel_filename; > zynq_binfo.kernel_cmdline = kernel_cmdline; > diff --git a/target-alpha/translate.c b/target-alpha/translate.c > index 1f4565d..254c927 100644 > --- a/target-alpha/translate.c > +++ b/target-alpha/translate.c > @@ -3530,7 +3530,9 @@ CPUAlphaState * cpu_alpha_init (const char *cpu_model) > > env = g_malloc0(sizeof(CPUAlphaState)); > cpu_exec_init(env); > - alpha_translate_init(); > + if (tcg_enabled()) { > + alpha_translate_init(); > + } > tlb_flush(env, 1); > > /* Default to ev67; no reason not to emulate insns by default. */ > diff --git a/target-cris/translate.c b/target-cris/translate.c > index 7224f46..fd9e563 100644 > --- a/target-cris/translate.c > +++ b/target-cris/translate.c > @@ -3516,8 +3516,9 @@ CPUCRISState *cpu_cris_init (const char *cpu_model) > cpu_state_reset(env); > qemu_init_vcpu(env); > > - if (tcg_initialized) > - return env; > + if (!tcg_enabled() || tcg_initialized) { > + return env; > + } > > tcg_initialized = 1; > > diff --git a/target-m68k/helper.c b/target-m68k/helper.c > index 1feed9b..358499e 100644 > --- a/target-m68k/helper.c > +++ b/target-m68k/helper.c > @@ -169,7 +169,7 @@ CPUM68KState *cpu_m68k_init(const char *cpu_model) > > env = g_malloc0(sizeof(CPUM68KState)); > cpu_exec_init(env); > - if (!inited) { > + if (tcg_enabled()&& !inited) { > inited = 1; > m68k_tcg_init(); > } > diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c > index b602820..5346580 100644 > --- a/target-microblaze/translate.c > +++ b/target-microblaze/translate.c > @@ -1902,8 +1902,9 @@ CPUMBState *cpu_mb_init (const char *cpu_model) > qemu_init_vcpu(env); > set_float_rounding_mode(float_round_nearest_even,&env->fp_status); > > - if (tcg_initialized) > + if (!tcg_enabled() || tcg_initialized) { > return env; > + } > > tcg_initialized = 1; > > diff --git a/target-mips/translate.c b/target-mips/translate.c > index a663b74..edffae2 100644 > --- a/target-mips/translate.c > +++ b/target-mips/translate.c > @@ -12707,7 +12707,9 @@ CPUMIPSState *cpu_mips_init (const char *cpu_model) > #endif > fpu_init(env, def); > mvp_init(env, def); > - mips_tcg_init(); > + if (tcg_enabled()) { > + mips_tcg_init(); > + } > cpu_state_reset(env); > qemu_init_vcpu(env); > return env; > diff --git a/target-sh4/translate.c b/target-sh4/translate.c > index a337beb..4ec32ab 100644 > --- a/target-sh4/translate.c > +++ b/target-sh4/translate.c > @@ -277,7 +277,9 @@ CPUSH4State *cpu_sh4_init(const char *cpu_model) > env->features = def->features; > cpu_exec_init(env); > env->movcal_backup_tail =&(env->movcal_backup); > - sh4_translate_init(); > + if (tcg_enabled()) { > + sh4_translate_init(); > + } > env->cpu_model_str = cpu_model; > cpu_state_reset(env); > cpu_register(env, def); > diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c > index 24f90f1..7ac6bdb 100644 > --- a/target-sparc/cpu.c > +++ b/target-sparc/cpu.c > @@ -119,7 +119,9 @@ CPUSPARCState *cpu_sparc_init(const char *cpu_model) > cpu = SPARC_CPU(object_new(TYPE_SPARC_CPU)); > env =&cpu->env; > > - gen_intermediate_code_init(env); > + if (tcg_enabled()) { > + gen_intermediate_code_init(env); > + } > > if (cpu_sparc_register(env, cpu_model)< 0) { > object_delete(OBJECT(cpu));
On Mon, Apr 16, 2012 at 20:47, Anthony Liguori <anthony@codemonkey.ws> wrote: > On 04/15/2012 11:32 AM, Blue Swirl wrote: >> >> Skip ROM or kernel loading and TCG init for qtest. >> >> For Xtensa there is no default board and the >> default board (g3beige) for PPCEMB seems to be wrong. >> >> Signed-off-by: Blue Swirl<blauwirbel@gmail.com> > > > Why tcg_enabled() vs. !qtest_enabled()? I picked that up from the earlier qtest patches. I'll use qtest_enabled(), that should not add confusion with later cases like KVM/ARM. Maybe I should also split the patch according to architectures. > > Regards, > > Anthony Liguori > >> --- >> hw/an5206.c | 4 +- >> hw/axis_dev88.c | 4 ++ >> hw/collie.c | 3 ++ >> hw/exynos4_boards.c | 8 +++- >> hw/highbank.c | 3 ++ >> hw/integratorcp.c | 3 ++ >> hw/mainstone.c | 3 ++ >> hw/mcf5208.c | 3 ++ >> hw/mips_fulong2e.c | 49 ++++++++++++----------- >> hw/mips_jazz.c | 31 ++++++++------- >> hw/mips_malta.c | 88 >> +++++++++++++++++++++-------------------- >> hw/mips_mipssim.c | 39 +++++++++--------- >> hw/musicpal.c | 3 ++ >> hw/omap_sx1.c | 2 +- >> hw/palm.c | 2 +- >> hw/realview.c | 3 ++ >> hw/s390-virtio.c | 68 +++++++++++++++---------------- >> hw/shix.c | 28 +++++++------ >> hw/spitz.c | 3 ++ >> hw/tosa.c | 3 ++ >> hw/versatilepb.c | 3 ++ >> hw/vexpress.c | 4 +- >> hw/xilinx_zynq.c | 3 ++ >> target-alpha/translate.c | 4 +- >> target-cris/translate.c | 5 ++- >> target-m68k/helper.c | 2 +- >> target-microblaze/translate.c | 3 +- >> target-mips/translate.c | 4 +- >> target-sh4/translate.c | 4 +- >> target-sparc/cpu.c | 4 +- >> 30 files changed, 228 insertions(+), 158 deletions(-) >> >> diff --git a/hw/an5206.c b/hw/an5206.c >> index 25407c0..355fccb 100644 >> --- a/hw/an5206.c >> +++ b/hw/an5206.c >> @@ -58,7 +58,7 @@ static void an5206_init(ram_addr_t ram_size, >> mcf5206_init(address_space_mem, AN5206_MBAR_ADDR, env); >> >> /* Load kernel. */ >> - if (!kernel_filename) { >> + if (tcg_enabled()&& !kernel_filename) { >> >> fprintf(stderr, "Kernel image must be specified\n"); >> exit(1); >> } >> @@ -74,7 +74,7 @@ static void an5206_init(ram_addr_t ram_size, >> ram_size - KERNEL_LOAD_ADDR); >> entry = KERNEL_LOAD_ADDR; >> } >> - if (kernel_size< 0) { >> + if (tcg_enabled()&& kernel_size< 0) { >> >> fprintf(stderr, "qemu: could not load kernel '%s'\n", >> kernel_filename); >> exit(1); >> } >> diff --git a/hw/axis_dev88.c b/hw/axis_dev88.c >> index 2304e35..b888dae 100644 >> --- a/hw/axis_dev88.c >> +++ b/hw/axis_dev88.c >> @@ -337,6 +337,10 @@ void axisdev88_init (ram_addr_t ram_size, >> irq[0x14 + i]); >> } >> >> + if (!tcg_enabled()) { >> + return; >> + } >> + >> if (!kernel_filename) { >> fprintf(stderr, "Kernel image must be specified\n"); >> exit(1); >> diff --git a/hw/collie.c b/hw/collie.c >> index 42f4310..4474d2a 100644 >> --- a/hw/collie.c >> +++ b/hw/collie.c >> @@ -49,6 +49,9 @@ static void collie_init(ram_addr_t ram_size, >> 512, 4, 0x00, 0x00, 0x00, 0x00, 0); >> >> sysbus_create_simple("scoop", 0x40800000, NULL); >> + if (!tcg_enabled()) { >> + return; >> + } >> >> collie_binfo.kernel_filename = kernel_filename; >> collie_binfo.kernel_cmdline = kernel_cmdline; >> diff --git a/hw/exynos4_boards.c b/hw/exynos4_boards.c >> index ea32c51..ae8070c 100644 >> --- a/hw/exynos4_boards.c >> +++ b/hw/exynos4_boards.c >> @@ -138,7 +138,9 @@ static void nuri_init(ram_addr_t ram_size, >> exynos4_boards_init_common(kernel_filename, kernel_cmdline, >> initrd_filename, EXYNOS4_BOARD_NURI); >> >> - arm_load_kernel(first_cpu,&exynos4_board_binfo); >> + if (tcg_enabled()) { >> + arm_load_kernel(first_cpu,&exynos4_board_binfo); >> + } >> } >> >> static void smdkc210_init(ram_addr_t ram_size, >> @@ -151,7 +153,9 @@ static void smdkc210_init(ram_addr_t ram_size, >> >> lan9215_init(SMDK_LAN9118_BASE_ADDR, >> qemu_irq_invert(s->irq_table[exynos4210_get_irq(37, 1)])); >> - arm_load_kernel(first_cpu,&exynos4_board_binfo); >> + if (tcg_enabled()) { >> + arm_load_kernel(first_cpu,&exynos4_board_binfo); >> + } >> } >> >> static QEMUMachine exynos4_machines[EXYNOS4_NUM_OF_BOARDS] = { >> diff --git a/hw/highbank.c b/hw/highbank.c >> index 906eed5..6b44580 100644 >> --- a/hw/highbank.c >> +++ b/hw/highbank.c >> @@ -305,6 +305,9 @@ static void highbank_init(ram_addr_t ram_size, >> sysbus_connect_irq(sysbus_from_qdev(dev), 1, pic[81]); >> sysbus_connect_irq(sysbus_from_qdev(dev), 2, pic[82]); >> } >> + if (!tcg_enabled()) { >> + return; >> + } >> >> highbank_binfo.ram_size = ram_size; >> highbank_binfo.kernel_filename = kernel_filename; >> diff --git a/hw/integratorcp.c b/hw/integratorcp.c >> index 9bdb9e6..8e84fbe 100644 >> --- a/hw/integratorcp.c >> +++ b/hw/integratorcp.c >> @@ -495,6 +495,9 @@ static void integratorcp_init(ram_addr_t ram_size, >> smc91c111_init(&nd_table[0], 0xc8000000, pic[27]); >> >> sysbus_create_simple("pl110", 0xc0000000, pic[22]); >> + if (!tcg_enabled()) { >> + return; >> + } >> >> integrator_binfo.ram_size = ram_size; >> integrator_binfo.kernel_filename = kernel_filename; >> diff --git a/hw/mainstone.c b/hw/mainstone.c >> index 27f5900..87d941d 100644 >> --- a/hw/mainstone.c >> +++ b/hw/mainstone.c >> @@ -164,6 +164,9 @@ static void mainstone_common_init(MemoryRegion >> *address_space_mem, >> smc91c111_init(&nd_table[0], MST_ETH_PHYS, >> qdev_get_gpio_in(mst_irq, ETHERNET_IRQ)); >> >> + if (!tcg_enabled()) { >> + return; >> + } >> mainstone_binfo.kernel_filename = kernel_filename; >> mainstone_binfo.kernel_cmdline = kernel_cmdline; >> mainstone_binfo.initrd_filename = initrd_filename; >> diff --git a/hw/mcf5208.c b/hw/mcf5208.c >> index d3ebe8d..1b8a424 100644 >> --- a/hw/mcf5208.c >> +++ b/hw/mcf5208.c >> @@ -262,6 +262,9 @@ static void mcf5208evb_init(ram_addr_t ram_size, >> /* 0xfc0a4000 GPIO. */ >> /* 0xfc0a8000 SDRAM controller. */ >> >> + if (!tcg_enabled()) { >> + return; >> + } >> /* Load kernel. */ >> if (!kernel_filename) { >> fprintf(stderr, "Kernel image must be specified\n"); >> diff --git a/hw/mips_fulong2e.c b/hw/mips_fulong2e.c >> index 37dc711..36bfb90 100644 >> --- a/hw/mips_fulong2e.c >> +++ b/hw/mips_fulong2e.c >> @@ -303,32 +303,33 @@ static void mips_fulong2e_init(ram_addr_t >> ram_size, const char *boot_device, >> memory_region_add_subregion(address_space_mem, 0, ram); >> memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); >> >> - /* We do not support flash operation, just loading pmon.bin as raw >> BIOS. >> - * Please use -L to set the BIOS path and -bios to set bios name. */ >> - >> - if (kernel_filename) { >> - loaderparams.ram_size = ram_size; >> - loaderparams.kernel_filename = kernel_filename; >> - loaderparams.kernel_cmdline = kernel_cmdline; >> - loaderparams.initrd_filename = initrd_filename; >> - kernel_entry = load_kernel (env); >> - write_bootloader(env, memory_region_get_ram_ptr(bios), >> kernel_entry); >> - } else { >> - if (bios_name == NULL) { >> - bios_name = FULONG_BIOSNAME; >> - } >> - filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); >> - if (filename) { >> - bios_size = load_image_targphys(filename, 0x1fc00000LL, >> - BIOS_SIZE); >> - g_free(filename); >> + if (tcg_enabled()) { >> + /* We do not support flash operation, just loading pmon.bin >> as raw BIOS. >> + * Please use -L to set the BIOS path and -bios to set bios name. >> */ >> + if (kernel_filename) { >> + loaderparams.ram_size = ram_size; >> + loaderparams.kernel_filename = kernel_filename; >> + loaderparams.kernel_cmdline = kernel_cmdline; >> + loaderparams.initrd_filename = initrd_filename; >> + kernel_entry = load_kernel (env); >> + write_bootloader(env, memory_region_get_ram_ptr(bios), >> kernel_entry); >> } else { >> - bios_size = -1; >> - } >> + if (bios_name == NULL) { >> + bios_name = FULONG_BIOSNAME; >> + } >> + filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); >> + if (filename) { >> + bios_size = load_image_targphys(filename, 0x1fc00000LL, >> + BIOS_SIZE); >> + g_free(filename); >> + } else { >> + bios_size = -1; >> + } >> >> - if ((bios_size< 0 || bios_size> BIOS_SIZE)&& !kernel_filename) >> { >> >> - fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", >> bios_name); >> - exit(1); >> + if ((bios_size< 0 || bios_size> BIOS_SIZE)&& >> !kernel_filename) { >> >> + fprintf(stderr, "qemu: Could not load MIPS bios >> '%s'\n", bios_name); >> + exit(1); >> + } >> } >> } >> >> diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c >> index a6bc7ba..b0f42ec 100644 >> --- a/hw/mips_jazz.c >> +++ b/hw/mips_jazz.c >> @@ -161,20 +161,23 @@ static void mips_jazz_init(MemoryRegion >> *address_space, >> memory_region_add_subregion(address_space, 0xfff00000LL, bios2); >> >> /* load the BIOS image. */ >> - if (bios_name == NULL) >> - bios_name = BIOS_FILENAME; >> - filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); >> - if (filename) { >> - bios_size = load_image_targphys(filename, 0xfff00000LL, >> - MAGNUM_BIOS_SIZE); >> - g_free(filename); >> - } else { >> - bios_size = -1; >> - } >> - if (bios_size< 0 || bios_size> MAGNUM_BIOS_SIZE) { >> - fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", >> - bios_name); >> - exit(1); >> + if (tcg_enabled()) { >> + if (bios_name == NULL) { >> + bios_name = BIOS_FILENAME; >> + } >> + filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); >> + if (filename) { >> + bios_size = load_image_targphys(filename, 0xfff00000LL, >> + MAGNUM_BIOS_SIZE); >> + g_free(filename); >> + } else { >> + bios_size = -1; >> + } >> + if (bios_size< 0 || bios_size> MAGNUM_BIOS_SIZE) { >> + fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", >> + bios_name); >> + exit(1); >> + } >> } >> >> /* Init CPU internal devices */ >> diff --git a/hw/mips_malta.c b/hw/mips_malta.c >> index 4752bb2..ebbe06a 100644 >> --- a/hw/mips_malta.c >> +++ b/hw/mips_malta.c >> @@ -872,58 +872,62 @@ void mips_malta_init (ram_addr_t ram_size, >> 4, 0x0000, 0x0000, 0x0000, 0x0000, be); >> bios = pflash_cfi01_get_memory(fl); >> fl_idx++; >> - if (kernel_filename) { >> - /* Write a small bootloader to the flash location. */ >> - loaderparams.ram_size = ram_size; >> - loaderparams.kernel_filename = kernel_filename; >> - loaderparams.kernel_cmdline = kernel_cmdline; >> - loaderparams.initrd_filename = initrd_filename; >> - kernel_entry = load_kernel(); >> - write_bootloader(env, memory_region_get_ram_ptr(bios), >> kernel_entry); >> - } else { >> - /* Load firmware from flash. */ >> - if (!dinfo) { >> - /* Load a BIOS image. */ >> - if (bios_name == NULL) { >> - bios_name = BIOS_FILENAME; >> - } >> - filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); >> - if (filename) { >> - bios_size = load_image_targphys(filename, FLASH_ADDRESS, >> - BIOS_SIZE); >> - g_free(filename); >> - } else { >> - bios_size = -1; >> - } >> - if ((bios_size< 0 || bios_size> BIOS_SIZE)&& >> !kernel_filename) { >> >> - fprintf(stderr, >> - "qemu: Could not load MIPS bios '%s', and no >> -kernel argument was specified\n", >> - bios_name); >> - exit(1); >> + if (tcg_enabled()) { >> + if (kernel_filename) { >> + /* Write a small bootloader to the flash location. */ >> + loaderparams.ram_size = ram_size; >> + loaderparams.kernel_filename = kernel_filename; >> + loaderparams.kernel_cmdline = kernel_cmdline; >> + loaderparams.initrd_filename = initrd_filename; >> + kernel_entry = load_kernel(); >> + write_bootloader(env, memory_region_get_ram_ptr(bios), >> kernel_entry); >> + } else { >> + /* Load firmware from flash. */ >> + if (!dinfo) { >> + /* Load a BIOS image. */ >> + if (bios_name == NULL) { >> + bios_name = BIOS_FILENAME; >> + } >> + filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, >> bios_name); >> + if (filename) { >> + bios_size = load_image_targphys(filename, >> FLASH_ADDRESS, >> + BIOS_SIZE); >> + g_free(filename); >> + } else { >> + bios_size = -1; >> + } >> + if ((bios_size< 0 || bios_size> BIOS_SIZE)&& >> !kernel_filename) { >> + fprintf(stderr, >> + "qemu: Could not load MIPS bios '%s', and >> no -kernel argument was specified\n", >> + bios_name); >> + exit(1); >> + } >> } >> - } >> - /* In little endian mode the 32bit words in the bios are swapped, >> - a neat trick which allows bi-endian firmware. */ >> + /* In little endian mode the 32bit words in the bios are >> swapped, >> + a neat trick which allows bi-endian firmware. */ >> #ifndef TARGET_WORDS_BIGENDIAN >> - { >> - uint32_t *addr = memory_region_get_ram_ptr(bios); >> - uint32_t *end = addr + bios_size; >> - while (addr< end) { >> - bswap32s(addr); >> - addr++; >> + { >> + uint32_t *addr = memory_region_get_ram_ptr(bios); >> + uint32_t *end = addr + bios_size; >> + while (addr< end) { >> + bswap32s(addr); >> + addr++; >> + } >> } >> - } >> #endif >> + } >> } >> >> /* Map the BIOS at a 2nd physical location, as on the real board. */ >> memory_region_init_alias(bios_alias, "bios.1fc", bios, 0, BIOS_SIZE); >> memory_region_add_subregion(system_memory, RESET_ADDRESS, >> bios_alias); >> >> - /* Board ID = 0x420 (Malta Board with CoreLV) >> - XXX: theoretically 0x1e000010 should map to flash and 0x1fc00010 >> should >> - map to the board ID. */ >> - stl_p(memory_region_get_ram_ptr(bios) + 0x10, 0x00000420); >> + if (tcg_enabled()) { >> + /* Board ID = 0x420 (Malta Board with CoreLV) >> + XXX: theoretically 0x1e000010 should map to flash and >> 0x1fc00010 should >> + map to the board ID. */ >> + stl_p(memory_region_get_ram_ptr(bios) + 0x10, 0x00000420); >> + } >> >> /* Init internal devices */ >> cpu_mips_irq_init_cpu(env); >> diff --git a/hw/mips_mipssim.c b/hw/mips_mipssim.c >> index 1ea7b58..a248619 100644 >> --- a/hw/mips_mipssim.c >> +++ b/hw/mips_mipssim.c >> @@ -174,24 +174,27 @@ mips_mipssim_init (ram_addr_t ram_size, >> /* Map the BIOS / boot exception handler. */ >> memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); >> /* Load a BIOS / boot exception handler image. */ >> - if (bios_name == NULL) >> - bios_name = BIOS_FILENAME; >> - filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); >> - if (filename) { >> - bios_size = load_image_targphys(filename, 0x1fc00000LL, >> BIOS_SIZE); >> - g_free(filename); >> - } else { >> - bios_size = -1; >> - } >> - if ((bios_size< 0 || bios_size> BIOS_SIZE)&& !kernel_filename) { >> >> - /* Bail out if we have neither a kernel image nor boot vector >> code. */ >> - fprintf(stderr, >> - "qemu: Could not load MIPS bios '%s', and no -kernel >> argument was specified\n", >> - filename); >> - exit(1); >> - } else { >> - /* We have a boot vector start address. */ >> - env->active_tc.PC = (target_long)(int32_t)0xbfc00000; >> + if (tcg_enabled()) { >> + if (bios_name == NULL) { >> + bios_name = BIOS_FILENAME; >> + } >> + filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); >> + if (filename) { >> + bios_size = load_image_targphys(filename, 0x1fc00000LL, >> BIOS_SIZE); >> + g_free(filename); >> + } else { >> + bios_size = -1; >> + } >> + if ((bios_size< 0 || bios_size> BIOS_SIZE)&& !kernel_filename) >> { >> >> + /* Bail out if we have neither a kernel image nor boot >> vector code. */ >> + fprintf(stderr, >> + "qemu: Could not load MIPS bios '%s', and no >> -kernel argument was specified\n", >> + filename); >> + exit(1); >> + } else { >> + /* We have a boot vector start address. */ >> + env->active_tc.PC = (target_long)(int32_t)0xbfc00000; >> + } >> } >> >> if (kernel_filename) { >> diff --git a/hw/musicpal.c b/hw/musicpal.c >> index c9f845a..cdc71b0 100644 >> --- a/hw/musicpal.c >> +++ b/hw/musicpal.c >> @@ -1646,6 +1646,9 @@ static void musicpal_init(ram_addr_t ram_size, >> qdev_init_nofail(dev); >> sysbus_mmio_map(s, 0, MP_AUDIO_BASE); >> sysbus_connect_irq(s, 0, pic[MP_AUDIO_IRQ]); >> + if (!tcg_enabled()) { >> + return; >> + } >> >> musicpal_binfo.ram_size = MP_RAM_DEFAULT_SIZE; >> musicpal_binfo.kernel_filename = kernel_filename; >> diff --git a/hw/omap_sx1.c b/hw/omap_sx1.c >> index 4e8ec4a..162462a 100644 >> --- a/hw/omap_sx1.c >> +++ b/hw/omap_sx1.c >> @@ -192,7 +192,7 @@ static void sx1_init(ram_addr_t ram_size, >> OMAP_CS1_BASE,&cs[1]); >> } >> >> - if (!kernel_filename&& !fl_idx) { >> + if (tcg_enabled()&& !kernel_filename&& !fl_idx) { >> >> fprintf(stderr, "Kernel or Flash image must be specified\n"); >> exit(1); >> } >> diff --git a/hw/palm.c b/hw/palm.c >> index b1252ab..c293db5 100644 >> --- a/hw/palm.c >> +++ b/hw/palm.c >> @@ -255,7 +255,7 @@ static void palmte_init(ram_addr_t ram_size, >> } >> } >> >> - if (!rom_loaded&& !kernel_filename) { >> + if (tcg_enabled()&& !rom_loaded&& !kernel_filename) { >> >> fprintf(stderr, "Kernel or ROM image must be specified\n"); >> exit(1); >> } >> diff --git a/hw/realview.c b/hw/realview.c >> index cf55204..40f2b8b 100644 >> --- a/hw/realview.c >> +++ b/hw/realview.c >> @@ -395,6 +395,9 @@ static void realview_init(ram_addr_t ram_size, >> memory_region_init_ram(ram_hack, "realview.hack", 0x1000); >> vmstate_register_ram_global(ram_hack); >> memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack); >> + if (!tcg_enabled()) { >> + return; >> + } >> >> realview_binfo.ram_size = ram_size; >> realview_binfo.kernel_filename = kernel_filename; >> diff --git a/hw/s390-virtio.c b/hw/s390-virtio.c >> index 1ebe70d..7f7b5c8 100644 >> --- a/hw/s390-virtio.c >> +++ b/hw/s390-virtio.c >> @@ -223,43 +223,45 @@ static void s390_init(ram_addr_t my_ram_size, >> /* One CPU has to run */ >> s390_add_running_cpu(env); >> >> - if (kernel_filename) { >> + if (tcg_enabled()) { >> + if (kernel_filename) { >> >> - kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, NULL, >> - NULL, 1, ELF_MACHINE, 0); >> - if (kernel_size == -1UL) { >> - kernel_size = load_image_targphys(kernel_filename, 0, >> ram_size); >> - } >> - /* >> - * we can not rely on the ELF entry point, since up to 3.2 this >> - * value was 0x800 (the SALIPL loader) and it wont work. For >> - * all (Linux) cases 0x10000 (KERN_IMAGE_START) should be fine. >> - */ >> - env->psw.addr = KERN_IMAGE_START; >> - env->psw.mask = 0x0000000180000000ULL; >> - } else { >> - ram_addr_t bios_size = 0; >> - char *bios_filename; >> - >> - /* Load zipl bootloader */ >> - if (bios_name == NULL) { >> - bios_name = ZIPL_FILENAME; >> - } >> + kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, >> NULL, >> + NULL, 1, ELF_MACHINE, 0); >> + if (kernel_size == -1UL) { >> + kernel_size = load_image_targphys(kernel_filename, 0, >> ram_size); >> + } >> + /* >> + * we can not rely on the ELF entry point, since up to 3.2 >> this >> + * value was 0x800 (the SALIPL loader) and it wont work. For >> + * all (Linux) cases 0x10000 (KERN_IMAGE_START) should be >> fine. >> + */ >> + env->psw.addr = KERN_IMAGE_START; >> + env->psw.mask = 0x0000000180000000ULL; >> + } else { >> + ram_addr_t bios_size = 0; >> + char *bios_filename; >> >> - bios_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); >> - bios_size = load_image_targphys(bios_filename, ZIPL_LOAD_ADDR, >> 4096); >> - g_free(bios_filename); >> + /* Load zipl bootloader */ >> + if (bios_name == NULL) { >> + bios_name = ZIPL_FILENAME; >> + } >> >> - if ((long)bios_size< 0) { >> - hw_error("could not load bootloader '%s'\n", bios_name); >> - } >> + bios_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, >> bios_name); >> + bios_size = load_image_targphys(bios_filename, >> ZIPL_LOAD_ADDR, 4096); >> + g_free(bios_filename); >> >> - if (bios_size> 4096) { >> - hw_error("stage1 bootloader is> 4k\n"); >> - } >> + if ((long)bios_size< 0) { >> + hw_error("could not load bootloader '%s'\n", bios_name); >> + } >> >> - env->psw.addr = ZIPL_START; >> - env->psw.mask = 0x0000000180000000ULL; >> + if (bios_size> 4096) { >> + hw_error("stage1 bootloader is> 4k\n"); >> + } >> + >> + env->psw.addr = ZIPL_START; >> + env->psw.mask = 0x0000000180000000ULL; >> + } >> } >> >> if (initrd_filename) { >> @@ -274,7 +276,7 @@ static void s390_init(ram_addr_t my_ram_size, >> memcpy(rom_ptr(INITRD_PARM_SIZE),&initrd_size, 8); >> } >> >> - if (kernel_cmdline) { >> + if (tcg_enabled()&& kernel_cmdline) { >> >> /* we have to overwrite values in the kernel image, which are >> "rom" */ >> memcpy(rom_ptr(KERN_PARM_AREA), kernel_cmdline, >> strlen(kernel_cmdline) + 1); >> diff --git a/hw/shix.c b/hw/shix.c >> index dd9ce17..3d1ab05 100644 >> --- a/hw/shix.c >> +++ b/hw/shix.c >> @@ -70,22 +70,26 @@ static void shix_init(ram_addr_t ram_size, >> vmstate_register_ram_global(&sdram[1]); >> memory_region_add_subregion(sysmem, 0x0c000000,&sdram[1]); >> >> >> - /* Load BIOS in 0 (and access it through P2, 0xA0000000) */ >> - if (bios_name == NULL) >> - bios_name = BIOS_FILENAME; >> - printf("%s: load BIOS '%s'\n", __func__, bios_name); >> - ret = load_image_targphys(bios_name, 0, 0x4000); >> - if (ret< 0) { /* Check bios size */ >> - fprintf(stderr, "ret=%d\n", ret); >> - fprintf(stderr, "qemu: could not load SHIX bios '%s'\n", >> - bios_name); >> - exit(1); >> + if (tcg_enabled()) { >> + /* Load BIOS in 0 (and access it through P2, 0xA0000000) */ >> + if (bios_name == NULL) { >> + bios_name = BIOS_FILENAME; >> + } >> + printf("%s: load BIOS '%s'\n", __func__, bios_name); >> + ret = load_image_targphys(bios_name, 0, 0x4000); >> + if (ret< 0) { /* Check bios size */ >> + fprintf(stderr, "ret=%d\n", ret); >> + fprintf(stderr, "qemu: could not load SHIX bios '%s'\n", >> + bios_name); >> + exit(1); >> + } >> } >> - >> /* Register peripherals */ >> s = sh7750_init(env, sysmem); >> /* XXXXX Check success */ >> - tc58128_init(s, "shix_linux_nand.bin", NULL); >> + if (tcg_enabled()) { >> + tc58128_init(s, "shix_linux_nand.bin", NULL); >> + } >> fprintf(stderr, "initialization terminated\n"); >> } >> >> diff --git a/hw/spitz.c b/hw/spitz.c >> index 1d6d2b0..284cf78 100644 >> --- a/hw/spitz.c >> +++ b/hw/spitz.c >> @@ -928,6 +928,9 @@ static void spitz_common_init(ram_addr_t ram_size, >> /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */ >> spitz_microdrive_attach(cpu, 0); >> >> + if (!tcg_enabled()) { >> + return; >> + } >> spitz_binfo.kernel_filename = kernel_filename; >> spitz_binfo.kernel_cmdline = kernel_cmdline; >> spitz_binfo.initrd_filename = initrd_filename; >> diff --git a/hw/tosa.c b/hw/tosa.c >> index 6baa17d..a66385e 100644 >> --- a/hw/tosa.c >> +++ b/hw/tosa.c >> @@ -237,6 +237,9 @@ static void tosa_init(ram_addr_t ram_size, >> tosa_microdrive_attach(cpu); >> >> tosa_tg_init(cpu); >> + if (!tcg_enabled()) { >> + return; >> + } >> >> tosa_binfo.kernel_filename = kernel_filename; >> tosa_binfo.kernel_cmdline = kernel_cmdline; >> diff --git a/hw/versatilepb.c b/hw/versatilepb.c >> index 25afb1e..0f91148 100644 >> --- a/hw/versatilepb.c >> +++ b/hw/versatilepb.c >> @@ -311,6 +311,9 @@ static void versatile_init(ram_addr_t ram_size, >> /* 0x101f3000 UART2. */ >> /* 0x101f4000 SSPI. */ >> >> + if (!tcg_enabled()) { >> + return; >> + } >> versatile_binfo.ram_size = ram_size; >> versatile_binfo.kernel_filename = kernel_filename; >> versatile_binfo.kernel_cmdline = kernel_cmdline; >> diff --git a/hw/vexpress.c b/hw/vexpress.c >> index 18d87ac..c7cee81 100644 >> --- a/hw/vexpress.c >> +++ b/hw/vexpress.c >> @@ -427,7 +427,9 @@ static void vexpress_common_init(const >> VEDBoardInfo *daughterboard, >> /* VE_USB: not modelled */ >> >> /* VE_DAPROM: not modelled */ >> - >> + if (!tcg_enabled()) { >> + return; >> + } >> vexpress_binfo.ram_size = ram_size; >> vexpress_binfo.kernel_filename = kernel_filename; >> vexpress_binfo.kernel_cmdline = kernel_cmdline; >> diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c >> index 7290c64..813d0d7 100644 >> --- a/hw/xilinx_zynq.c >> +++ b/hw/xilinx_zynq.c >> @@ -130,6 +130,9 @@ static void zynq_init(ram_addr_t ram_size, const >> char *boot_device, >> } >> } >> >> + if (!tcg_enabled()) { >> + return; >> + } >> zynq_binfo.ram_size = ram_size; >> zynq_binfo.kernel_filename = kernel_filename; >> zynq_binfo.kernel_cmdline = kernel_cmdline; >> diff --git a/target-alpha/translate.c b/target-alpha/translate.c >> index 1f4565d..254c927 100644 >> --- a/target-alpha/translate.c >> +++ b/target-alpha/translate.c >> @@ -3530,7 +3530,9 @@ CPUAlphaState * cpu_alpha_init (const char >> *cpu_model) >> >> env = g_malloc0(sizeof(CPUAlphaState)); >> cpu_exec_init(env); >> - alpha_translate_init(); >> + if (tcg_enabled()) { >> + alpha_translate_init(); >> + } >> tlb_flush(env, 1); >> >> /* Default to ev67; no reason not to emulate insns by default. */ >> diff --git a/target-cris/translate.c b/target-cris/translate.c >> index 7224f46..fd9e563 100644 >> --- a/target-cris/translate.c >> +++ b/target-cris/translate.c >> @@ -3516,8 +3516,9 @@ CPUCRISState *cpu_cris_init (const char *cpu_model) >> cpu_state_reset(env); >> qemu_init_vcpu(env); >> >> - if (tcg_initialized) >> - return env; >> + if (!tcg_enabled() || tcg_initialized) { >> + return env; >> + } >> >> tcg_initialized = 1; >> >> diff --git a/target-m68k/helper.c b/target-m68k/helper.c >> index 1feed9b..358499e 100644 >> --- a/target-m68k/helper.c >> +++ b/target-m68k/helper.c >> @@ -169,7 +169,7 @@ CPUM68KState *cpu_m68k_init(const char *cpu_model) >> >> env = g_malloc0(sizeof(CPUM68KState)); >> cpu_exec_init(env); >> - if (!inited) { >> + if (tcg_enabled()&& !inited) { >> >> inited = 1; >> m68k_tcg_init(); >> } >> diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c >> index b602820..5346580 100644 >> --- a/target-microblaze/translate.c >> +++ b/target-microblaze/translate.c >> @@ -1902,8 +1902,9 @@ CPUMBState *cpu_mb_init (const char *cpu_model) >> qemu_init_vcpu(env); >> set_float_rounding_mode(float_round_nearest_even,&env->fp_status); >> >> >> - if (tcg_initialized) >> + if (!tcg_enabled() || tcg_initialized) { >> return env; >> + } >> >> tcg_initialized = 1; >> >> diff --git a/target-mips/translate.c b/target-mips/translate.c >> index a663b74..edffae2 100644 >> --- a/target-mips/translate.c >> +++ b/target-mips/translate.c >> @@ -12707,7 +12707,9 @@ CPUMIPSState *cpu_mips_init (const char >> *cpu_model) >> #endif >> fpu_init(env, def); >> mvp_init(env, def); >> - mips_tcg_init(); >> + if (tcg_enabled()) { >> + mips_tcg_init(); >> + } >> cpu_state_reset(env); >> qemu_init_vcpu(env); >> return env; >> diff --git a/target-sh4/translate.c b/target-sh4/translate.c >> index a337beb..4ec32ab 100644 >> --- a/target-sh4/translate.c >> +++ b/target-sh4/translate.c >> @@ -277,7 +277,9 @@ CPUSH4State *cpu_sh4_init(const char *cpu_model) >> env->features = def->features; >> cpu_exec_init(env); >> env->movcal_backup_tail =&(env->movcal_backup); >> >> - sh4_translate_init(); >> + if (tcg_enabled()) { >> + sh4_translate_init(); >> + } >> env->cpu_model_str = cpu_model; >> cpu_state_reset(env); >> cpu_register(env, def); >> diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c >> index 24f90f1..7ac6bdb 100644 >> --- a/target-sparc/cpu.c >> +++ b/target-sparc/cpu.c >> @@ -119,7 +119,9 @@ CPUSPARCState *cpu_sparc_init(const char *cpu_model) >> cpu = SPARC_CPU(object_new(TYPE_SPARC_CPU)); >> env =&cpu->env; >> >> >> - gen_intermediate_code_init(env); >> + if (tcg_enabled()) { >> + gen_intermediate_code_init(env); >> + } >> >> if (cpu_sparc_register(env, cpu_model)< 0) { >> object_delete(OBJECT(cpu)); > >
> Skip ROM or kernel loading and TCG init for qtest. > > For Xtensa there is no default board and the What is the use case of the default board? Are there any specific requirements for it?
On 15 April 2012 17:32, Blue Swirl <blauwirbel@gmail.com> wrote: > Skip ROM or kernel loading and TCG init for qtest. > > For Xtensa there is no default board and the > default board (g3beige) for PPCEMB seems to be wrong. > > Signed-off-by: Blue Swirl <blauwirbel@gmail.com> > --- > hw/an5206.c | 4 +- > hw/axis_dev88.c | 4 ++ > hw/collie.c | 3 ++ > hw/exynos4_boards.c | 8 +++- > hw/highbank.c | 3 ++ > hw/integratorcp.c | 3 ++ > hw/mainstone.c | 3 ++ > hw/mcf5208.c | 3 ++ > hw/mips_fulong2e.c | 49 ++++++++++++----------- > hw/mips_jazz.c | 31 ++++++++------- > hw/mips_malta.c | 88 +++++++++++++++++++++-------------------- > hw/mips_mipssim.c | 39 +++++++++--------- > hw/musicpal.c | 3 ++ > hw/omap_sx1.c | 2 +- > hw/palm.c | 2 +- > hw/realview.c | 3 ++ > hw/s390-virtio.c | 68 +++++++++++++++---------------- > hw/shix.c | 28 +++++++------ > hw/spitz.c | 3 ++ > hw/tosa.c | 3 ++ > hw/versatilepb.c | 3 ++ > hw/vexpress.c | 4 +- > hw/xilinx_zynq.c | 3 ++ > target-alpha/translate.c | 4 +- > target-cris/translate.c | 5 ++- > target-m68k/helper.c | 2 +- > target-microblaze/translate.c | 3 +- > target-mips/translate.c | 4 +- > target-sh4/translate.c | 4 +- > target-sparc/cpu.c | 4 +- > 30 files changed, 228 insertions(+), 158 deletions(-) Yuck! Nack, this is way too invasive. Testing frameworks shouldn't require random pointless changes to every board model. -- PMM
On 04/16/2012 05:54 PM, Peter Maydell wrote: > On 15 April 2012 17:32, Blue Swirl<blauwirbel@gmail.com> wrote: >> Skip ROM or kernel loading and TCG init for qtest. >> >> For Xtensa there is no default board and the >> default board (g3beige) for PPCEMB seems to be wrong. >> >> Signed-off-by: Blue Swirl<blauwirbel@gmail.com> >> --- >> hw/an5206.c | 4 +- >> hw/axis_dev88.c | 4 ++ >> hw/collie.c | 3 ++ >> hw/exynos4_boards.c | 8 +++- >> hw/highbank.c | 3 ++ >> hw/integratorcp.c | 3 ++ >> hw/mainstone.c | 3 ++ >> hw/mcf5208.c | 3 ++ >> hw/mips_fulong2e.c | 49 ++++++++++++----------- >> hw/mips_jazz.c | 31 ++++++++------- >> hw/mips_malta.c | 88 +++++++++++++++++++++-------------------- >> hw/mips_mipssim.c | 39 +++++++++--------- >> hw/musicpal.c | 3 ++ >> hw/omap_sx1.c | 2 +- >> hw/palm.c | 2 +- >> hw/realview.c | 3 ++ >> hw/s390-virtio.c | 68 +++++++++++++++---------------- >> hw/shix.c | 28 +++++++------ >> hw/spitz.c | 3 ++ >> hw/tosa.c | 3 ++ >> hw/versatilepb.c | 3 ++ >> hw/vexpress.c | 4 +- >> hw/xilinx_zynq.c | 3 ++ >> target-alpha/translate.c | 4 +- >> target-cris/translate.c | 5 ++- >> target-m68k/helper.c | 2 +- >> target-microblaze/translate.c | 3 +- >> target-mips/translate.c | 4 +- >> target-sh4/translate.c | 4 +- >> target-sparc/cpu.c | 4 +- >> 30 files changed, 228 insertions(+), 158 deletions(-) > > Yuck! Nack, this is way too invasive. Testing frameworks > shouldn't require random pointless changes to every board > model. I think the issue is that all of these machines mandate a -kernel option. qtest doesn't care if you pass a -kernel but requiring a kernel in order to test a device sucks especially if you don't possess the toolchain to build such a kernel. I think we should probably refactor the boards to do something more useful if a kernel isn't specified verses just buggering out. Regards, Anthony Liguori > > -- PMM
On 17 April 2012 02:16, Anthony Liguori <aliguori@us.ibm.com> wrote: > On 04/16/2012 05:54 PM, Peter Maydell wrote: >> Yuck! Nack, this is way too invasive. Testing frameworks >> shouldn't require random pointless changes to every board >> model. > > I think the issue is that all of these machines mandate a -kernel option. > qtest doesn't care if you pass a -kernel but requiring a kernel in order to > test a device sucks especially if you don't possess the toolchain to build > such a kernel. Just testing a device shouldn't require running a particular board model either, of course. > I think we should probably refactor the boards to do something more useful > if a kernel isn't specified verses just buggering out. I don't inherently object if you can define something that's genuinely more useful. I'm not sure "start the CPU and have it execute through zeroed out RAM so the user gets no indication they've forgotten something" really counts, though... -- PMM
Il 17/04/2012 09:33, Peter Maydell ha scritto: > > I think the issue is that all of these machines mandate a -kernel option. > > qtest doesn't care if you pass a -kernel but requiring a kernel in order to > > test a device sucks especially if you don't possess the toolchain to build > > such a kernel. > > Just testing a device shouldn't require running a particular > board model either, of course. qtest isn't so much testing a device. It is really testing a board with improved determinism, debuggability and logging. That said, I think a simpler solution is to set kernel/initrd/dtb to "/dev/null" if qtest is enabled. Paolo
On 04/17/2012 02:44 AM, Paolo Bonzini wrote: > Il 17/04/2012 09:33, Peter Maydell ha scritto: >>> I think the issue is that all of these machines mandate a -kernel option. >>> qtest doesn't care if you pass a -kernel but requiring a kernel in order to >>> test a device sucks especially if you don't possess the toolchain to build >>> such a kernel. >> >> Just testing a device shouldn't require running a particular >> board model either, of course. > > qtest isn't so much testing a device. It is really testing a board with > improved determinism, debuggability and logging. > > That said, I think a simpler solution is to set kernel/initrd/dtb to > "/dev/null" if qtest is enabled. Why not refactor the check to be a QEMUMachine property (requires_kernel). That way the check can be moved common code and that common code can have a single check where it sets the parameters to /dev/null if qtest is enabled. Regards, Anthony Liguori > > Paolo >
On Mon, Apr 16, 2012 at 21:58, Max Filippov <jcmvbkbc@gmail.com> wrote: >> Skip ROM or kernel loading and TCG init for qtest. >> >> For Xtensa there is no default board and the > > What is the use case of the default board? If an architecture has multiple boards, the default board can be used without using -M option. > Are there any specific requirements for it? I don't think so. > > -- > Thanks. > -- Max
On Tue, Apr 17, 2012 at 07:33, Peter Maydell <peter.maydell@linaro.org> wrote: > On 17 April 2012 02:16, Anthony Liguori <aliguori@us.ibm.com> wrote: >> On 04/16/2012 05:54 PM, Peter Maydell wrote: >>> Yuck! Nack, this is way too invasive. Testing frameworks >>> shouldn't require random pointless changes to every board >>> model. >> >> I think the issue is that all of these machines mandate a -kernel option. >> qtest doesn't care if you pass a -kernel but requiring a kernel in order to >> test a device sucks especially if you don't possess the toolchain to build >> such a kernel. > > Just testing a device shouldn't require running a particular > board model either, of course. The goal is obviously to make comprehensive tests for all devices in all boards. Also, if a device is only used by a certain board then yes, that particular board model is required. >> I think we should probably refactor the boards to do something more useful >> if a kernel isn't specified verses just buggering out. > > I don't inherently object if you can define something that's genuinely > more useful. I'm not sure "start the CPU and have it execute through > zeroed out RAM so the user gets no indication they've forgotten something" > really counts, though... The error could be downgraded to a warning. > > -- PMM
On 17 April 2012 21:19, Blue Swirl <blauwirbel@gmail.com> wrote: > On Mon, Apr 16, 2012 at 21:58, Max Filippov <jcmvbkbc@gmail.com> wrote: >> What is the use case of the default board? > > If an architecture has multiple boards, the default board can be used > without using -M option. Unless the Xtensa architecture has a particular board which is and will *always* be a primary choice for anybody using it (as "pc" is for x86) I'd recommend against setting a default board for it, because once you set one you can never change it without breaking command-line compatibility for users. ARM has a default board set, which is unfortunate because it's hardware that nobody uses now, so the QEMU default setting mostly serves to trip up users who try to run a kernel for some other machine on it by mistake. -- PMM
On Tue, Apr 17, 2012 at 12:00, Anthony Liguori <anthony@codemonkey.ws> wrote: > On 04/17/2012 02:44 AM, Paolo Bonzini wrote: >> >> Il 17/04/2012 09:33, Peter Maydell ha scritto: >>>> >>>> I think the issue is that all of these machines mandate a -kernel >>>> option. >>>> qtest doesn't care if you pass a -kernel but requiring a kernel in >>>> order to >>>> test a device sucks especially if you don't possess the toolchain to >>>> build >>>> such a kernel. >>> >>> >>> Just testing a device shouldn't require running a particular >>> board model either, of course. >> >> >> qtest isn't so much testing a device. It is really testing a board with >> improved determinism, debuggability and logging. >> >> That said, I think a simpler solution is to set kernel/initrd/dtb to >> "/dev/null" if qtest is enabled. > > > Why not refactor the check to be a QEMUMachine property (requires_kernel). > That way the check can be moved common code and that common code can have a > single check where it sets the parameters to /dev/null if qtest is enabled. The same problem exists in addition to kernel/initrd/dtb, also with BIOS, other ROMs and blobs. Perhaps this could be handled at lower level instead of higher: make load_elf/load_image fake success when using qtest. > > Regards, > > Anthony Liguori > >> >> Paolo >> >
On 17 April 2012 21:24, Blue Swirl <blauwirbel@gmail.com> wrote: > On Tue, Apr 17, 2012 at 07:33, Peter Maydell <peter.maydell@linaro.org> wrote: >> Just testing a device shouldn't require running a particular >> board model either, of course. > > The goal is obviously to make comprehensive tests for all devices in > all boards. Also, if a device is only used by a certain board then > yes, that particular board model is required. Device testing should be done by instantiating the device in a test harness and prodding it according to whatever tests you're doing. Trying to use the board as an ad-hoc test harness means you can't test aspects of the device which the board doesn't use, and if the board changes then half your test cases probably break. >>> I think we should probably refactor the boards to do something more useful >>> if a kernel isn't specified verses just buggering out. >> >> I don't inherently object if you can define something that's genuinely >> more useful. I'm not sure "start the CPU and have it execute through >> zeroed out RAM so the user gets no indication they've forgotten something" >> really counts, though... > > The error could be downgraded to a warning. Well, it could. But we should make that decision based on whether it makes sense and has a use case for actual users of the board, not because we're trying to get away with not having a setup that lets us properly unit test devices. -- PMM
On Tue, Apr 17, 2012 at 20:27, Peter Maydell <peter.maydell@linaro.org> wrote: > On 17 April 2012 21:19, Blue Swirl <blauwirbel@gmail.com> wrote: >> On Mon, Apr 16, 2012 at 21:58, Max Filippov <jcmvbkbc@gmail.com> wrote: >>> What is the use case of the default board? >> >> If an architecture has multiple boards, the default board can be used >> without using -M option. > > Unless the Xtensa architecture has a particular board which > is and will *always* be a primary choice for anybody using it > (as "pc" is for x86) I'd recommend against setting a default > board for it, because once you set one you can never change > it without breaking command-line compatibility for users. IIRC we have changed the default board for PPC from oldworld to newworld model. Xtensa is the only architecture out of 14 which does not have a default board. > > ARM has a default board set, which is unfortunate because it's > hardware that nobody uses now, so the QEMU default setting > mostly serves to trip up users who try to run a kernel for > some other machine on it by mistake. Then change it. > > -- PMM
On 17 April 2012 21:31, Blue Swirl <blauwirbel@gmail.com> wrote: > On Tue, Apr 17, 2012 at 20:27, Peter Maydell <peter.maydell@linaro.org> wrote: >> ARM has a default board set, which is unfortunate because it's >> hardware that nobody uses now, so the QEMU default setting >> mostly serves to trip up users who try to run a kernel for >> some other machine on it by mistake. > > Then change it. As I say, I don't want to break command line compatibility. -- PMM
On Tue, Apr 17, 2012 at 20:31, Peter Maydell <peter.maydell@linaro.org> wrote: > On 17 April 2012 21:24, Blue Swirl <blauwirbel@gmail.com> wrote: >> On Tue, Apr 17, 2012 at 07:33, Peter Maydell <peter.maydell@linaro.org> wrote: >>> Just testing a device shouldn't require running a particular >>> board model either, of course. >> >> The goal is obviously to make comprehensive tests for all devices in >> all boards. Also, if a device is only used by a certain board then >> yes, that particular board model is required. > > Device testing should be done by instantiating the device in > a test harness and prodding it according to whatever tests > you're doing. Trying to use the board as an ad-hoc test > harness means you can't test aspects of the device which > the board doesn't use, and if the board changes then half your > test cases probably break. You have a point. The unused features may be uninteresting though if no board uses them. > >>>> I think we should probably refactor the boards to do something more useful >>>> if a kernel isn't specified verses just buggering out. >>> >>> I don't inherently object if you can define something that's genuinely >>> more useful. I'm not sure "start the CPU and have it execute through >>> zeroed out RAM so the user gets no indication they've forgotten something" >>> really counts, though... >> >> The error could be downgraded to a warning. > > Well, it could. But we should make that decision based on whether it > makes sense and has a use case for actual users of the board, not > because we're trying to get away with not having a setup that lets > us properly unit test devices. I disagree. I see many benefits in qtest and very little downsides in changes like these. qtest is a tool to let developers test the changes they make to devices, so breakages shouldn't be so common. This should improve the development process in QEMU tremendously. It's also a tool to find bugs and improve code quality. I value the above much higher than how user experience is slightly (and also arguably) downgraded, because now they are able to shoot themselves to a foot more easily. > > -- PMM
On Tue, Apr 17, 2012 at 20:35, Peter Maydell <peter.maydell@linaro.org> wrote: > On 17 April 2012 21:31, Blue Swirl <blauwirbel@gmail.com> wrote: >> On Tue, Apr 17, 2012 at 20:27, Peter Maydell <peter.maydell@linaro.org> wrote: >>> ARM has a default board set, which is unfortunate because it's >>> hardware that nobody uses now, so the QEMU default setting >>> mostly serves to trip up users who try to run a kernel for >>> some other machine on it by mistake. >> >> Then change it. > > As I say, I don't want to break command line compatibility. v1.1: print a warning about using deprecated board, suggest -M integratorcp v1.2: change default board, when default board is used, print a notice that it's now -M z2, suggest -M integratorcp for old geezers v1.3: remove notice > > -- PMM
On 17 April 2012 21:51, Blue Swirl <blauwirbel@gmail.com> wrote: > On Tue, Apr 17, 2012 at 20:35, Peter Maydell <peter.maydell@linaro.org> wrote: >> On 17 April 2012 21:31, Blue Swirl <blauwirbel@gmail.com> wrote: >>> On Tue, Apr 17, 2012 at 20:27, Peter Maydell <peter.maydell@linaro.org> wrote: >>>> ARM has a default board set, which is unfortunate because it's >>>> hardware that nobody uses now, so the QEMU default setting >>>> mostly serves to trip up users who try to run a kernel for >>>> some other machine on it by mistake. >>> >>> Then change it. >> >> As I say, I don't want to break command line compatibility. > > v1.1: print a warning about using deprecated board, suggest -M integratorcp > v1.2: change default board, when default board is used, print a notice > that it's now -M z2, suggest -M integratorcp for old geezers > v1.3: remove notice If I were going to change, I'd switch to "no default board", because there is no single right choice for everybody in the ARM world. -- PMM
On 17 April 2012 21:43, Blue Swirl <blauwirbel@gmail.com> wrote: > On Tue, Apr 17, 2012 at 20:31, Peter Maydell <peter.maydell@linaro.org> wrote: >> Well, it could. But we should make that decision based on whether it >> makes sense and has a use case for actual users of the board, not >> because we're trying to get away with not having a setup that lets >> us properly unit test devices. > > I disagree. I see many benefits in qtest and very little downsides in > changes like these. > > qtest is a tool to let developers test the changes they make to > devices, so breakages shouldn't be so common. This should improve the > development process in QEMU tremendously. I'm entirely in favour of having a decent testing framework so we can easily write unit tests for device models. What I don't understand is why a developer only unit testing tool seems to require changes to user visible behaviour across dozens of board models. Something is wrong in its design somewhere, and I think that's what I'm objecting to as much as to the specific detail of what's being changed in this patch. (And I don't want us to add lots of tests and/or changes to the code before we fix whatever the problem is.) -- PMM
On 04/17/2012 03:59 PM, Peter Maydell wrote: > On 17 April 2012 21:43, Blue Swirl<blauwirbel@gmail.com> wrote: >> On Tue, Apr 17, 2012 at 20:31, Peter Maydell<peter.maydell@linaro.org> wrote: >>> Well, it could. But we should make that decision based on whether it >>> makes sense and has a use case for actual users of the board, not >>> because we're trying to get away with not having a setup that lets >>> us properly unit test devices. >> >> I disagree. I see many benefits in qtest and very little downsides in >> changes like these. >> >> qtest is a tool to let developers test the changes they make to >> devices, so breakages shouldn't be so common. This should improve the >> development process in QEMU tremendously. > > I'm entirely in favour of having a decent testing framework so we > can easily write unit tests for device models. What I don't understand > is why a developer only unit testing tool seems to require changes > to user visible behaviour across dozens of board models. Something > is wrong in its design somewhere, and I think that's what I'm > objecting to as much as to the specific detail of what's being > changed in this patch. <rant> Kernel loading is a hack. I'll go out on a limb and say that most non-x86 boards are doing it completely wrong. Messing around with CPU state has no business in machine init. It creates horrible dependencies about RAM initialization order and problems for reset/live migration. The kernel should be presented as a virtual device (an emulated flash or whatever) and there should be firmware that loads the kernel appropriately. Then we wouldn't need changes like this in the first place. </rant> But now that that's out of my system, I don't think we should change every board that's doing direct kernel loading. But this is why we need to make a change like this. The boards are "wrong in its design somewhere". > (And I don't want us to add lots of tests > and/or changes to the code before we fix whatever the problem is.) If you'd like to change all of the boards to behave in a way that's sensibly similar to how actual hardware would work, that's fine by me :-) Regards, Anthony Liguori > -- PMM >
Am 17.04.2012 22:51, schrieb Blue Swirl: > On Tue, Apr 17, 2012 at 20:35, Peter Maydell <peter.maydell@linaro.org> wrote: >> On 17 April 2012 21:31, Blue Swirl <blauwirbel@gmail.com> wrote: >>> On Tue, Apr 17, 2012 at 20:27, Peter Maydell <peter.maydell@linaro.org> wrote: >>>> ARM has a default board set, which is unfortunate because it's >>>> hardware that nobody uses now, so the QEMU default setting >>>> mostly serves to trip up users who try to run a kernel for >>>> some other machine on it by mistake. >>> >>> Then change it. >> >> As I say, I don't want to break command line compatibility. > > v1.1: print a warning about using deprecated board, suggest -M integratorcp > v1.2: change default board, when default board is used, print a notice > that it's now -M z2, suggest -M integratorcp for old geezers > v1.3: remove notice That assumes end users actually launch it from the command line, as opposed to some Eclipse UI (e.g., Sourcery CodeBench). Anyhow, we currently don't have a way to detect whether we're using a board because it's the default or due to an explicit -M argument. Andreas
On Wed, Apr 18, 2012 at 12:27 AM, Peter Maydell <peter.maydell@linaro.org> wrote: > On 17 April 2012 21:19, Blue Swirl <blauwirbel@gmail.com> wrote: >> On Mon, Apr 16, 2012 at 21:58, Max Filippov <jcmvbkbc@gmail.com> wrote: >>> What is the use case of the default board? >> >> If an architecture has multiple boards, the default board can be used >> without using -M option. > > Unless the Xtensa architecture has a particular board which > is and will *always* be a primary choice for anybody using it > (as "pc" is for x86) I'd recommend against setting a default > board for it, because once you set one you can never change > it without breaking command-line compatibility for users. Ok, I got it. I'd say there's no such board. 'sim' could be the default board, but it's useless without semihosting, and enabling semihosting by default looks like a security issue.
On 17 April 2012 22:33, Anthony Liguori <aliguori@us.ibm.com> wrote: > Kernel loading is a hack. I'll go out on a limb and say that most non-x86 > boards are doing it completely wrong. Messing around with CPU state has no > business in machine init. It creates horrible dependencies about RAM > initialization order and problems for reset/live migration. > > The kernel should be presented as a virtual device (an emulated flash or > whatever) and there should be firmware that loads the kernel appropriately. > Then we wouldn't need changes like this in the first place. Yeah, I tend to agree that that would be a cleaner approach, but so far it hasn't been a requirement. Feel free to submit patches to fix kernel loading for these boards if you want to be able to rely on this behaviour :-) -- PMM
On 04/18/2012 03:36 AM, Peter Maydell wrote: > On 17 April 2012 22:33, Anthony Liguori<aliguori@us.ibm.com> wrote: >> Kernel loading is a hack. I'll go out on a limb and say that most non-x86 >> boards are doing it completely wrong. Messing around with CPU state has no >> business in machine init. It creates horrible dependencies about RAM >> initialization order and problems for reset/live migration. >> >> The kernel should be presented as a virtual device (an emulated flash or >> whatever) and there should be firmware that loads the kernel appropriately. >> Then we wouldn't need changes like this in the first place. > > Yeah, I tend to agree that that would be a cleaner approach, but so far > it hasn't been a requirement. Feel free to submit patches to fix kernel > loading for these boards if you want to be able to rely on this behaviour :-) Well hopefully now we can agree that what Blue had to do with qtest isn't so bad :-) Regards, Anthony Liguori > > -- PMM >
Am 18.04.2012 14:09, schrieb Anthony Liguori: > On 04/18/2012 03:36 AM, Peter Maydell wrote: >> On 17 April 2012 22:33, Anthony Liguori<aliguori@us.ibm.com> wrote: >>> Kernel loading is a hack. I'll go out on a limb and say that most >>> non-x86 >>> boards are doing it completely wrong. Messing around with CPU state >>> has no >>> business in machine init. It creates horrible dependencies about RAM >>> initialization order and problems for reset/live migration. >>> >>> The kernel should be presented as a virtual device (an emulated flash or >>> whatever) and there should be firmware that loads the kernel >>> appropriately. >>> Then we wouldn't need changes like this in the first place. >> >> Yeah, I tend to agree that that would be a cleaner approach, but so far >> it hasn't been a requirement. Feel free to submit patches to fix kernel >> loading for these boards if you want to be able to rely on this >> behaviour :-) > > Well hopefully now we can agree that what Blue had to do with qtest > isn't so bad :-) What I find bad here is that this is a touch-all patch that's touching multiple targets and lots of ARM boards at once (and that I'm not seeing what 3/3 this might be good for). I'd suggest to break it down, then I can integrate most of the target-* pieces into my pending QOM'ification series with which this collides in cpu_*_init(). In the area of ARM we don't strictly need to make all boards qtest'able at once, so Peter could defer the decision to Calxeda and Samsung or some new ARM bootloader framework if he sees the need, as maintainer. Andreas
On Tue, Apr 17, 2012 at 21:33, Anthony Liguori <aliguori@us.ibm.com> wrote: > On 04/17/2012 03:59 PM, Peter Maydell wrote: >> >> On 17 April 2012 21:43, Blue Swirl<blauwirbel@gmail.com> wrote: >>> >>> On Tue, Apr 17, 2012 at 20:31, Peter Maydell<peter.maydell@linaro.org> >>> wrote: >>>> >>>> Well, it could. But we should make that decision based on whether it >>>> makes sense and has a use case for actual users of the board, not >>>> because we're trying to get away with not having a setup that lets >>>> us properly unit test devices. >>> >>> >>> I disagree. I see many benefits in qtest and very little downsides in >>> changes like these. >>> >>> qtest is a tool to let developers test the changes they make to >>> devices, so breakages shouldn't be so common. This should improve the >>> development process in QEMU tremendously. >> >> >> I'm entirely in favour of having a decent testing framework so we >> can easily write unit tests for device models. What I don't understand >> is why a developer only unit testing tool seems to require changes >> to user visible behaviour across dozens of board models. Something >> is wrong in its design somewhere, and I think that's what I'm >> objecting to as much as to the specific detail of what's being >> changed in this patch. > > > <rant> > > Kernel loading is a hack. I'll go out on a limb and say that most non-x86 > boards are doing it completely wrong. Messing around with CPU state has no > business in machine init. It creates horrible dependencies about RAM > initialization order and problems for reset/live migration. > > The kernel should be presented as a virtual device (an emulated flash or > whatever) and there should be firmware that loads the kernel appropriately. > Then we wouldn't need changes like this in the first place. BIOS is no hack, it is not used by qtest, MIPS refuses to start without one and we don't have any. > > </rant> > > But now that that's out of my system, I don't think we should change every > board that's doing direct kernel loading. But this is why we need to make a > change like this. The boards are "wrong in its design somewhere". > > >> (And I don't want us to add lots of tests >> and/or changes to the code before we fix whatever the problem is.) > > > If you'd like to change all of the boards to behave in a way that's sensibly > similar to how actual hardware would work, that's fine by me :-) > > > Regards, > > Anthony Liguori > >> -- PMM >> >
On 04/18/2012 03:28 PM, Blue Swirl wrote: > On Tue, Apr 17, 2012 at 21:33, Anthony Liguori<aliguori@us.ibm.com> wrote: >> On 04/17/2012 03:59 PM, Peter Maydell wrote: >>> >>> On 17 April 2012 21:43, Blue Swirl<blauwirbel@gmail.com> wrote: >>>> >>>> On Tue, Apr 17, 2012 at 20:31, Peter Maydell<peter.maydell@linaro.org> >>>> wrote: >>>>> >>>>> Well, it could. But we should make that decision based on whether it >>>>> makes sense and has a use case for actual users of the board, not >>>>> because we're trying to get away with not having a setup that lets >>>>> us properly unit test devices. >>>> >>>> >>>> I disagree. I see many benefits in qtest and very little downsides in >>>> changes like these. >>>> >>>> qtest is a tool to let developers test the changes they make to >>>> devices, so breakages shouldn't be so common. This should improve the >>>> development process in QEMU tremendously. >>> >>> >>> I'm entirely in favour of having a decent testing framework so we >>> can easily write unit tests for device models. What I don't understand >>> is why a developer only unit testing tool seems to require changes >>> to user visible behaviour across dozens of board models. Something >>> is wrong in its design somewhere, and I think that's what I'm >>> objecting to as much as to the specific detail of what's being >>> changed in this patch. >> >> >> <rant> >> >> Kernel loading is a hack. I'll go out on a limb and say that most non-x86 >> boards are doing it completely wrong. Messing around with CPU state has no >> business in machine init. It creates horrible dependencies about RAM >> initialization order and problems for reset/live migration. >> >> The kernel should be presented as a virtual device (an emulated flash or >> whatever) and there should be firmware that loads the kernel appropriately. >> Then we wouldn't need changes like this in the first place. > > BIOS is no hack, it is not used by qtest, MIPS refuses to start without one and > we don't have any. So how does one test MIPS system emulation? Regards, Anthony Liguori > >> >> </rant> >> >> But now that that's out of my system, I don't think we should change every >> board that's doing direct kernel loading. But this is why we need to make a >> change like this. The boards are "wrong in its design somewhere". >> >> >>> (And I don't want us to add lots of tests >>> and/or changes to the code before we fix whatever the problem is.) >> >> >> If you'd like to change all of the boards to behave in a way that's sensibly >> similar to how actual hardware would work, that's fine by me :-) >> >> >> Regards, >> >> Anthony Liguori >> >>> -- PMM >>> >> >
On Tue, Apr 17, 2012 at 20:59, Peter Maydell <peter.maydell@linaro.org> wrote: > On 17 April 2012 21:43, Blue Swirl <blauwirbel@gmail.com> wrote: >> On Tue, Apr 17, 2012 at 20:31, Peter Maydell <peter.maydell@linaro.org> wrote: >>> Well, it could. But we should make that decision based on whether it >>> makes sense and has a use case for actual users of the board, not >>> because we're trying to get away with not having a setup that lets >>> us properly unit test devices. >> >> I disagree. I see many benefits in qtest and very little downsides in >> changes like these. >> >> qtest is a tool to let developers test the changes they make to >> devices, so breakages shouldn't be so common. This should improve the >> development process in QEMU tremendously. > > I'm entirely in favour of having a decent testing framework so we > can easily write unit tests for device models. What I don't understand > is why a developer only unit testing tool seems to require changes > to user visible behaviour across dozens of board models. Something > is wrong in its design somewhere, and I think that's what I'm > objecting to as much as to the specific detail of what's being > changed in this patch. (And I don't want us to add lots of tests > and/or changes to the code before we fix whatever the problem is.) Even if we had this single device test setup, board level testing would be useful. It shouldn't test the devices anymore in this case but how the board works. I think ideally the test sequence should go like this: 1. QEMU internals (block, qint etc) 2. Device level (only once for each device, list of devices collected from all architectures and boards) 3. Board level (all architectures, all boards, just high level stuff like test that the devices are in place, IRQ routing etc.) But since a lot of devices still have target dependencies (at least bus width), testing the devices when they are in a board like now is not a bad choice either except for the performance hit. > > -- PMM
On Wed, Apr 18, 2012 at 20:35, Anthony Liguori <aliguori@us.ibm.com> wrote: > On 04/18/2012 03:28 PM, Blue Swirl wrote: >> >> On Tue, Apr 17, 2012 at 21:33, Anthony Liguori<aliguori@us.ibm.com> >> wrote: >>> >>> On 04/17/2012 03:59 PM, Peter Maydell wrote: >>>> >>>> >>>> On 17 April 2012 21:43, Blue Swirl<blauwirbel@gmail.com> wrote: >>>>> >>>>> >>>>> On Tue, Apr 17, 2012 at 20:31, Peter Maydell<peter.maydell@linaro.org> >>>>> wrote: >>>>>> >>>>>> >>>>>> Well, it could. But we should make that decision based on whether it >>>>>> makes sense and has a use case for actual users of the board, not >>>>>> because we're trying to get away with not having a setup that lets >>>>>> us properly unit test devices. >>>>> >>>>> >>>>> >>>>> I disagree. I see many benefits in qtest and very little downsides in >>>>> changes like these. >>>>> >>>>> qtest is a tool to let developers test the changes they make to >>>>> devices, so breakages shouldn't be so common. This should improve the >>>>> development process in QEMU tremendously. >>>> >>>> >>>> >>>> I'm entirely in favour of having a decent testing framework so we >>>> can easily write unit tests for device models. What I don't understand >>>> is why a developer only unit testing tool seems to require changes >>>> to user visible behaviour across dozens of board models. Something >>>> is wrong in its design somewhere, and I think that's what I'm >>>> objecting to as much as to the specific detail of what's being >>>> changed in this patch. >>> >>> >>> >>> <rant> >>> >>> Kernel loading is a hack. I'll go out on a limb and say that most >>> non-x86 >>> boards are doing it completely wrong. Messing around with CPU state has >>> no >>> business in machine init. It creates horrible dependencies about RAM >>> initialization order and problems for reset/live migration. >>> >>> The kernel should be presented as a virtual device (an emulated flash or >>> whatever) and there should be firmware that loads the kernel >>> appropriately. >>> Then we wouldn't need changes like this in the first place. >> >> >> BIOS is no hack, it is not used by qtest, MIPS refuses to start without >> one and >> we don't have any. > > > So how does one test MIPS system emulation? Maybe there are BIOS files which are not redistributable. > > Regards, > > Anthony Liguori > > >> >>> >>> </rant> >>> >>> But now that that's out of my system, I don't think we should change >>> every >>> board that's doing direct kernel loading. But this is why we need to >>> make a >>> change like this. The boards are "wrong in its design somewhere". >>> >>> >>>> (And I don't want us to add lots of tests >>>> and/or changes to the code before we fix whatever the problem is.) >>> >>> >>> >>> If you'd like to change all of the boards to behave in a way that's >>> sensibly >>> similar to how actual hardware would work, that's fine by me :-) >>> >>> >>> Regards, >>> >>> Anthony Liguori >>> >>>> -- PMM >>>> >>> >> >
Am 18.04.2012 22:35, schrieb Anthony Liguori: > On 04/18/2012 03:28 PM, Blue Swirl wrote: >> On Tue, Apr 17, 2012 at 21:33, Anthony Liguori<aliguori@us.ibm.com> >> wrote: >>> <rant> >>> >>> Kernel loading is a hack. I'll go out on a limb and say that most >>> non-x86 >>> boards are doing it completely wrong. Messing around with CPU state >>> has no >>> business in machine init. It creates horrible dependencies about RAM >>> initialization order and problems for reset/live migration. >>> >>> The kernel should be presented as a virtual device (an emulated flash or >>> whatever) and there should be firmware that loads the kernel >>> appropriately. >>> Then we wouldn't need changes like this in the first place. >> >> BIOS is no hack, it is not used by qtest, MIPS refuses to start >> without one and >> we don't have any. > > So how does one test MIPS system emulation? For -M malta I successfully used -kernel, -append and -hda with Aurélien's Debian images: http://people.debian.org/~aurel32/qemu/mips/ I did not need any additional BIOS. As reported in the cover letter of my mips QOM'ification series, Thiemo's 0.2 test images listed on the Wiki did not work for me: http://wiki.qemu.org/Testing Andreas
On Wed, Apr 18, 2012 at 20:51, Andreas Färber <afaerber@suse.de> wrote: > Am 18.04.2012 22:35, schrieb Anthony Liguori: >> On 04/18/2012 03:28 PM, Blue Swirl wrote: >>> On Tue, Apr 17, 2012 at 21:33, Anthony Liguori<aliguori@us.ibm.com> >>> wrote: >>>> <rant> >>>> >>>> Kernel loading is a hack. I'll go out on a limb and say that most >>>> non-x86 >>>> boards are doing it completely wrong. Messing around with CPU state >>>> has no >>>> business in machine init. It creates horrible dependencies about RAM >>>> initialization order and problems for reset/live migration. >>>> >>>> The kernel should be presented as a virtual device (an emulated flash or >>>> whatever) and there should be firmware that loads the kernel >>>> appropriately. >>>> Then we wouldn't need changes like this in the first place. >>> >>> BIOS is no hack, it is not used by qtest, MIPS refuses to start >>> without one and >>> we don't have any. >> >> So how does one test MIPS system emulation? > > For -M malta I successfully used -kernel, -append and -hda with > Aurélien's Debian images: http://people.debian.org/~aurel32/qemu/mips/ > I did not need any additional BIOS. > > As reported in the cover letter of my mips QOM'ification series, > Thiemo's 0.2 test images listed on the Wiki did not work for me: > http://wiki.qemu.org/Testing I just successfully tried the BIOS binaries from the link in the bottom of this Wikipedia page: http://en.wikipedia.org/wiki/MIPS_Magnum > > Andreas > > -- > SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany > GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
diff --git a/hw/an5206.c b/hw/an5206.c index 25407c0..355fccb 100644 --- a/hw/an5206.c +++ b/hw/an5206.c @@ -58,7 +58,7 @@ static void an5206_init(ram_addr_t ram_size, mcf5206_init(address_space_mem, AN5206_MBAR_ADDR, env); /* Load kernel. */ - if (!kernel_filename) { + if (tcg_enabled() && !kernel_filename) { fprintf(stderr, "Kernel image must be specified\n"); exit(1); } @@ -74,7 +74,7 @@ static void an5206_init(ram_addr_t ram_size, ram_size - KERNEL_LOAD_ADDR); entry = KERNEL_LOAD_ADDR; } - if (kernel_size < 0) { + if (tcg_enabled() && kernel_size < 0) { fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename); exit(1); } diff --git a/hw/axis_dev88.c b/hw/axis_dev88.c index 2304e35..b888dae 100644 --- a/hw/axis_dev88.c +++ b/hw/axis_dev88.c @@ -337,6 +337,10 @@ void axisdev88_init (ram_addr_t ram_size, irq[0x14 + i]); } + if (!tcg_enabled()) { + return; + } + if (!kernel_filename) { fprintf(stderr, "Kernel image must be specified\n"); exit(1); diff --git a/hw/collie.c b/hw/collie.c index 42f4310..4474d2a 100644 --- a/hw/collie.c +++ b/hw/collie.c @@ -49,6 +49,9 @@ static void collie_init(ram_addr_t ram_size, 512, 4, 0x00, 0x00, 0x00, 0x00, 0); sysbus_create_simple("scoop", 0x40800000, NULL); + if (!tcg_enabled()) { + return; + } collie_binfo.kernel_filename = kernel_filename; collie_binfo.kernel_cmdline = kernel_cmdline; diff --git a/hw/exynos4_boards.c b/hw/exynos4_boards.c index ea32c51..ae8070c 100644 --- a/hw/exynos4_boards.c +++ b/hw/exynos4_boards.c @@ -138,7 +138,9 @@ static void nuri_init(ram_addr_t ram_size, exynos4_boards_init_common(kernel_filename, kernel_cmdline, initrd_filename, EXYNOS4_BOARD_NURI); - arm_load_kernel(first_cpu, &exynos4_board_binfo); + if (tcg_enabled()) { + arm_load_kernel(first_cpu, &exynos4_board_binfo); + } } static void smdkc210_init(ram_addr_t ram_size, @@ -151,7 +153,9 @@ static void smdkc210_init(ram_addr_t ram_size, lan9215_init(SMDK_LAN9118_BASE_ADDR, qemu_irq_invert(s->irq_table[exynos4210_get_irq(37, 1)])); - arm_load_kernel(first_cpu, &exynos4_board_binfo); + if (tcg_enabled()) { + arm_load_kernel(first_cpu, &exynos4_board_binfo); + } } static QEMUMachine exynos4_machines[EXYNOS4_NUM_OF_BOARDS] = { diff --git a/hw/highbank.c b/hw/highbank.c index 906eed5..6b44580 100644 --- a/hw/highbank.c +++ b/hw/highbank.c @@ -305,6 +305,9 @@ static void highbank_init(ram_addr_t ram_size, sysbus_connect_irq(sysbus_from_qdev(dev), 1, pic[81]); sysbus_connect_irq(sysbus_from_qdev(dev), 2, pic[82]); } + if (!tcg_enabled()) { + return; + } highbank_binfo.ram_size = ram_size; highbank_binfo.kernel_filename = kernel_filename; diff --git a/hw/integratorcp.c b/hw/integratorcp.c index 9bdb9e6..8e84fbe 100644 --- a/hw/integratorcp.c +++ b/hw/integratorcp.c @@ -495,6 +495,9 @@ static void integratorcp_init(ram_addr_t ram_size, smc91c111_init(&nd_table[0], 0xc8000000, pic[27]); sysbus_create_simple("pl110", 0xc0000000, pic[22]); + if (!tcg_enabled()) { + return; + } integrator_binfo.ram_size = ram_size; integrator_binfo.kernel_filename = kernel_filename; diff --git a/hw/mainstone.c b/hw/mainstone.c index 27f5900..87d941d 100644 --- a/hw/mainstone.c +++ b/hw/mainstone.c @@ -164,6 +164,9 @@ static void mainstone_common_init(MemoryRegion *address_space_mem, smc91c111_init(&nd_table[0], MST_ETH_PHYS, qdev_get_gpio_in(mst_irq, ETHERNET_IRQ)); + if (!tcg_enabled()) { + return; + } mainstone_binfo.kernel_filename = kernel_filename; mainstone_binfo.kernel_cmdline = kernel_cmdline; mainstone_binfo.initrd_filename = initrd_filename; diff --git a/hw/mcf5208.c b/hw/mcf5208.c index d3ebe8d..1b8a424 100644 --- a/hw/mcf5208.c +++ b/hw/mcf5208.c @@ -262,6 +262,9 @@ static void mcf5208evb_init(ram_addr_t ram_size, /* 0xfc0a4000 GPIO. */ /* 0xfc0a8000 SDRAM controller. */ + if (!tcg_enabled()) { + return; + } /* Load kernel. */ if (!kernel_filename) { fprintf(stderr, "Kernel image must be specified\n"); diff --git a/hw/mips_fulong2e.c b/hw/mips_fulong2e.c index 37dc711..36bfb90 100644 --- a/hw/mips_fulong2e.c +++ b/hw/mips_fulong2e.c @@ -303,32 +303,33 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device, memory_region_add_subregion(address_space_mem, 0, ram); memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); - /* We do not support flash operation, just loading pmon.bin as raw BIOS. - * Please use -L to set the BIOS path and -bios to set bios name. */ - - if (kernel_filename) { - loaderparams.ram_size = ram_size; - loaderparams.kernel_filename = kernel_filename; - loaderparams.kernel_cmdline = kernel_cmdline; - loaderparams.initrd_filename = initrd_filename; - kernel_entry = load_kernel (env); - write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry); - } else { - if (bios_name == NULL) { - bios_name = FULONG_BIOSNAME; - } - filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); - if (filename) { - bios_size = load_image_targphys(filename, 0x1fc00000LL, - BIOS_SIZE); - g_free(filename); + if (tcg_enabled()) { + /* We do not support flash operation, just loading pmon.bin as raw BIOS. + * Please use -L to set the BIOS path and -bios to set bios name. */ + if (kernel_filename) { + loaderparams.ram_size = ram_size; + loaderparams.kernel_filename = kernel_filename; + loaderparams.kernel_cmdline = kernel_cmdline; + loaderparams.initrd_filename = initrd_filename; + kernel_entry = load_kernel (env); + write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry); } else { - bios_size = -1; - } + if (bios_name == NULL) { + bios_name = FULONG_BIOSNAME; + } + filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); + if (filename) { + bios_size = load_image_targphys(filename, 0x1fc00000LL, + BIOS_SIZE); + g_free(filename); + } else { + bios_size = -1; + } - if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) { - fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", bios_name); - exit(1); + if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) { + fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", bios_name); + exit(1); + } } } diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c index a6bc7ba..b0f42ec 100644 --- a/hw/mips_jazz.c +++ b/hw/mips_jazz.c @@ -161,20 +161,23 @@ static void mips_jazz_init(MemoryRegion *address_space, memory_region_add_subregion(address_space, 0xfff00000LL, bios2); /* load the BIOS image. */ - if (bios_name == NULL) - bios_name = BIOS_FILENAME; - filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); - if (filename) { - bios_size = load_image_targphys(filename, 0xfff00000LL, - MAGNUM_BIOS_SIZE); - g_free(filename); - } else { - bios_size = -1; - } - if (bios_size < 0 || bios_size > MAGNUM_BIOS_SIZE) { - fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", - bios_name); - exit(1); + if (tcg_enabled()) { + if (bios_name == NULL) { + bios_name = BIOS_FILENAME; + } + filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); + if (filename) { + bios_size = load_image_targphys(filename, 0xfff00000LL, + MAGNUM_BIOS_SIZE); + g_free(filename); + } else { + bios_size = -1; + } + if (bios_size < 0 || bios_size > MAGNUM_BIOS_SIZE) { + fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", + bios_name); + exit(1); + } } /* Init CPU internal devices */ diff --git a/hw/mips_malta.c b/hw/mips_malta.c index 4752bb2..ebbe06a 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -872,58 +872,62 @@ void mips_malta_init (ram_addr_t ram_size, 4, 0x0000, 0x0000, 0x0000, 0x0000, be); bios = pflash_cfi01_get_memory(fl); fl_idx++; - if (kernel_filename) { - /* Write a small bootloader to the flash location. */ - loaderparams.ram_size = ram_size; - loaderparams.kernel_filename = kernel_filename; - loaderparams.kernel_cmdline = kernel_cmdline; - loaderparams.initrd_filename = initrd_filename; - kernel_entry = load_kernel(); - write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry); - } else { - /* Load firmware from flash. */ - if (!dinfo) { - /* Load a BIOS image. */ - if (bios_name == NULL) { - bios_name = BIOS_FILENAME; - } - filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); - if (filename) { - bios_size = load_image_targphys(filename, FLASH_ADDRESS, - BIOS_SIZE); - g_free(filename); - } else { - bios_size = -1; - } - if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) { - fprintf(stderr, - "qemu: Could not load MIPS bios '%s', and no -kernel argument was specified\n", - bios_name); - exit(1); + if (tcg_enabled()) { + if (kernel_filename) { + /* Write a small bootloader to the flash location. */ + loaderparams.ram_size = ram_size; + loaderparams.kernel_filename = kernel_filename; + loaderparams.kernel_cmdline = kernel_cmdline; + loaderparams.initrd_filename = initrd_filename; + kernel_entry = load_kernel(); + write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry); + } else { + /* Load firmware from flash. */ + if (!dinfo) { + /* Load a BIOS image. */ + if (bios_name == NULL) { + bios_name = BIOS_FILENAME; + } + filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); + if (filename) { + bios_size = load_image_targphys(filename, FLASH_ADDRESS, + BIOS_SIZE); + g_free(filename); + } else { + bios_size = -1; + } + if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) { + fprintf(stderr, + "qemu: Could not load MIPS bios '%s', and no -kernel argument was specified\n", + bios_name); + exit(1); + } } - } - /* In little endian mode the 32bit words in the bios are swapped, - a neat trick which allows bi-endian firmware. */ + /* In little endian mode the 32bit words in the bios are swapped, + a neat trick which allows bi-endian firmware. */ #ifndef TARGET_WORDS_BIGENDIAN - { - uint32_t *addr = memory_region_get_ram_ptr(bios); - uint32_t *end = addr + bios_size; - while (addr < end) { - bswap32s(addr); - addr++; + { + uint32_t *addr = memory_region_get_ram_ptr(bios); + uint32_t *end = addr + bios_size; + while (addr < end) { + bswap32s(addr); + addr++; + } } - } #endif + } } /* Map the BIOS at a 2nd physical location, as on the real board. */ memory_region_init_alias(bios_alias, "bios.1fc", bios, 0, BIOS_SIZE); memory_region_add_subregion(system_memory, RESET_ADDRESS, bios_alias); - /* Board ID = 0x420 (Malta Board with CoreLV) - XXX: theoretically 0x1e000010 should map to flash and 0x1fc00010 should - map to the board ID. */ - stl_p(memory_region_get_ram_ptr(bios) + 0x10, 0x00000420); + if (tcg_enabled()) { + /* Board ID = 0x420 (Malta Board with CoreLV) + XXX: theoretically 0x1e000010 should map to flash and 0x1fc00010 should + map to the board ID. */ + stl_p(memory_region_get_ram_ptr(bios) + 0x10, 0x00000420); + } /* Init internal devices */ cpu_mips_irq_init_cpu(env); diff --git a/hw/mips_mipssim.c b/hw/mips_mipssim.c index 1ea7b58..a248619 100644 --- a/hw/mips_mipssim.c +++ b/hw/mips_mipssim.c @@ -174,24 +174,27 @@ mips_mipssim_init (ram_addr_t ram_size, /* Map the BIOS / boot exception handler. */ memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); /* Load a BIOS / boot exception handler image. */ - if (bios_name == NULL) - bios_name = BIOS_FILENAME; - filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); - if (filename) { - bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE); - g_free(filename); - } else { - bios_size = -1; - } - if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) { - /* Bail out if we have neither a kernel image nor boot vector code. */ - fprintf(stderr, - "qemu: Could not load MIPS bios '%s', and no -kernel argument was specified\n", - filename); - exit(1); - } else { - /* We have a boot vector start address. */ - env->active_tc.PC = (target_long)(int32_t)0xbfc00000; + if (tcg_enabled()) { + if (bios_name == NULL) { + bios_name = BIOS_FILENAME; + } + filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); + if (filename) { + bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE); + g_free(filename); + } else { + bios_size = -1; + } + if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) { + /* Bail out if we have neither a kernel image nor boot vector code. */ + fprintf(stderr, + "qemu: Could not load MIPS bios '%s', and no -kernel argument was specified\n", + filename); + exit(1); + } else { + /* We have a boot vector start address. */ + env->active_tc.PC = (target_long)(int32_t)0xbfc00000; + } } if (kernel_filename) { diff --git a/hw/musicpal.c b/hw/musicpal.c index c9f845a..cdc71b0 100644 --- a/hw/musicpal.c +++ b/hw/musicpal.c @@ -1646,6 +1646,9 @@ static void musicpal_init(ram_addr_t ram_size, qdev_init_nofail(dev); sysbus_mmio_map(s, 0, MP_AUDIO_BASE); sysbus_connect_irq(s, 0, pic[MP_AUDIO_IRQ]); + if (!tcg_enabled()) { + return; + } musicpal_binfo.ram_size = MP_RAM_DEFAULT_SIZE; musicpal_binfo.kernel_filename = kernel_filename; diff --git a/hw/omap_sx1.c b/hw/omap_sx1.c index 4e8ec4a..162462a 100644 --- a/hw/omap_sx1.c +++ b/hw/omap_sx1.c @@ -192,7 +192,7 @@ static void sx1_init(ram_addr_t ram_size, OMAP_CS1_BASE, &cs[1]); } - if (!kernel_filename && !fl_idx) { + if (tcg_enabled() && !kernel_filename && !fl_idx) { fprintf(stderr, "Kernel or Flash image must be specified\n"); exit(1); } diff --git a/hw/palm.c b/hw/palm.c index b1252ab..c293db5 100644 --- a/hw/palm.c +++ b/hw/palm.c @@ -255,7 +255,7 @@ static void palmte_init(ram_addr_t ram_size, } } - if (!rom_loaded && !kernel_filename) { + if (tcg_enabled() && !rom_loaded && !kernel_filename) { fprintf(stderr, "Kernel or ROM image must be specified\n"); exit(1); } diff --git a/hw/realview.c b/hw/realview.c index cf55204..40f2b8b 100644 --- a/hw/realview.c +++ b/hw/realview.c @@ -395,6 +395,9 @@ static void realview_init(ram_addr_t ram_size, memory_region_init_ram(ram_hack, "realview.hack", 0x1000); vmstate_register_ram_global(ram_hack); memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack); + if (!tcg_enabled()) { + return; + } realview_binfo.ram_size = ram_size; realview_binfo.kernel_filename = kernel_filename; diff --git a/hw/s390-virtio.c b/hw/s390-virtio.c index 1ebe70d..7f7b5c8 100644 --- a/hw/s390-virtio.c +++ b/hw/s390-virtio.c @@ -223,43 +223,45 @@ static void s390_init(ram_addr_t my_ram_size, /* One CPU has to run */ s390_add_running_cpu(env); - if (kernel_filename) { + if (tcg_enabled()) { + if (kernel_filename) { - kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, NULL, - NULL, 1, ELF_MACHINE, 0); - if (kernel_size == -1UL) { - kernel_size = load_image_targphys(kernel_filename, 0, ram_size); - } - /* - * we can not rely on the ELF entry point, since up to 3.2 this - * value was 0x800 (the SALIPL loader) and it wont work. For - * all (Linux) cases 0x10000 (KERN_IMAGE_START) should be fine. - */ - env->psw.addr = KERN_IMAGE_START; - env->psw.mask = 0x0000000180000000ULL; - } else { - ram_addr_t bios_size = 0; - char *bios_filename; - - /* Load zipl bootloader */ - if (bios_name == NULL) { - bios_name = ZIPL_FILENAME; - } + kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, NULL, + NULL, 1, ELF_MACHINE, 0); + if (kernel_size == -1UL) { + kernel_size = load_image_targphys(kernel_filename, 0, ram_size); + } + /* + * we can not rely on the ELF entry point, since up to 3.2 this + * value was 0x800 (the SALIPL loader) and it wont work. For + * all (Linux) cases 0x10000 (KERN_IMAGE_START) should be fine. + */ + env->psw.addr = KERN_IMAGE_START; + env->psw.mask = 0x0000000180000000ULL; + } else { + ram_addr_t bios_size = 0; + char *bios_filename; - bios_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); - bios_size = load_image_targphys(bios_filename, ZIPL_LOAD_ADDR, 4096); - g_free(bios_filename); + /* Load zipl bootloader */ + if (bios_name == NULL) { + bios_name = ZIPL_FILENAME; + } - if ((long)bios_size < 0) { - hw_error("could not load bootloader '%s'\n", bios_name); - } + bios_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); + bios_size = load_image_targphys(bios_filename, ZIPL_LOAD_ADDR, 4096); + g_free(bios_filename); - if (bios_size > 4096) { - hw_error("stage1 bootloader is > 4k\n"); - } + if ((long)bios_size < 0) { + hw_error("could not load bootloader '%s'\n", bios_name); + } - env->psw.addr = ZIPL_START; - env->psw.mask = 0x0000000180000000ULL; + if (bios_size > 4096) { + hw_error("stage1 bootloader is > 4k\n"); + } + + env->psw.addr = ZIPL_START; + env->psw.mask = 0x0000000180000000ULL; + } } if (initrd_filename) { @@ -274,7 +276,7 @@ static void s390_init(ram_addr_t my_ram_size, memcpy(rom_ptr(INITRD_PARM_SIZE), &initrd_size, 8); } - if (kernel_cmdline) { + if (tcg_enabled() && kernel_cmdline) { /* we have to overwrite values in the kernel image, which are "rom" */ memcpy(rom_ptr(KERN_PARM_AREA), kernel_cmdline, strlen(kernel_cmdline) + 1); diff --git a/hw/shix.c b/hw/shix.c index dd9ce17..3d1ab05 100644 --- a/hw/shix.c +++ b/hw/shix.c @@ -70,22 +70,26 @@ static void shix_init(ram_addr_t ram_size, vmstate_register_ram_global(&sdram[1]); memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]); - /* Load BIOS in 0 (and access it through P2, 0xA0000000) */ - if (bios_name == NULL) - bios_name = BIOS_FILENAME; - printf("%s: load BIOS '%s'\n", __func__, bios_name); - ret = load_image_targphys(bios_name, 0, 0x4000); - if (ret < 0) { /* Check bios size */ - fprintf(stderr, "ret=%d\n", ret); - fprintf(stderr, "qemu: could not load SHIX bios '%s'\n", - bios_name); - exit(1); + if (tcg_enabled()) { + /* Load BIOS in 0 (and access it through P2, 0xA0000000) */ + if (bios_name == NULL) { + bios_name = BIOS_FILENAME; + } + printf("%s: load BIOS '%s'\n", __func__, bios_name); + ret = load_image_targphys(bios_name, 0, 0x4000); + if (ret < 0) { /* Check bios size */ + fprintf(stderr, "ret=%d\n", ret); + fprintf(stderr, "qemu: could not load SHIX bios '%s'\n", + bios_name); + exit(1); + } } - /* Register peripherals */ s = sh7750_init(env, sysmem); /* XXXXX Check success */ - tc58128_init(s, "shix_linux_nand.bin", NULL); + if (tcg_enabled()) { + tc58128_init(s, "shix_linux_nand.bin", NULL); + } fprintf(stderr, "initialization terminated\n"); } diff --git a/hw/spitz.c b/hw/spitz.c index 1d6d2b0..284cf78 100644 --- a/hw/spitz.c +++ b/hw/spitz.c @@ -928,6 +928,9 @@ static void spitz_common_init(ram_addr_t ram_size, /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */ spitz_microdrive_attach(cpu, 0); + if (!tcg_enabled()) { + return; + } spitz_binfo.kernel_filename = kernel_filename; spitz_binfo.kernel_cmdline = kernel_cmdline; spitz_binfo.initrd_filename = initrd_filename; diff --git a/hw/tosa.c b/hw/tosa.c index 6baa17d..a66385e 100644 --- a/hw/tosa.c +++ b/hw/tosa.c @@ -237,6 +237,9 @@ static void tosa_init(ram_addr_t ram_size, tosa_microdrive_attach(cpu); tosa_tg_init(cpu); + if (!tcg_enabled()) { + return; + } tosa_binfo.kernel_filename = kernel_filename; tosa_binfo.kernel_cmdline = kernel_cmdline; diff --git a/hw/versatilepb.c b/hw/versatilepb.c index 25afb1e..0f91148 100644 --- a/hw/versatilepb.c +++ b/hw/versatilepb.c @@ -311,6 +311,9 @@ static void versatile_init(ram_addr_t ram_size, /* 0x101f3000 UART2. */ /* 0x101f4000 SSPI. */ + if (!tcg_enabled()) { + return; + } versatile_binfo.ram_size = ram_size; versatile_binfo.kernel_filename = kernel_filename; versatile_binfo.kernel_cmdline = kernel_cmdline; diff --git a/hw/vexpress.c b/hw/vexpress.c index 18d87ac..c7cee81 100644 --- a/hw/vexpress.c +++ b/hw/vexpress.c @@ -427,7 +427,9 @@ static void vexpress_common_init(const VEDBoardInfo *daughterboard, /* VE_USB: not modelled */ /* VE_DAPROM: not modelled */ - + if (!tcg_enabled()) { + return; + } vexpress_binfo.ram_size = ram_size; vexpress_binfo.kernel_filename = kernel_filename; vexpress_binfo.kernel_cmdline = kernel_cmdline; diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c index 7290c64..813d0d7 100644 --- a/hw/xilinx_zynq.c +++ b/hw/xilinx_zynq.c @@ -130,6 +130,9 @@ static void zynq_init(ram_addr_t ram_size, const char *boot_device, } } + if (!tcg_enabled()) { + return; + } zynq_binfo.ram_size = ram_size; zynq_binfo.kernel_filename = kernel_filename; zynq_binfo.kernel_cmdline = kernel_cmdline; diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 1f4565d..254c927 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -3530,7 +3530,9 @@ CPUAlphaState * cpu_alpha_init (const char *cpu_model) env = g_malloc0(sizeof(CPUAlphaState)); cpu_exec_init(env); - alpha_translate_init(); + if (tcg_enabled()) { + alpha_translate_init(); + } tlb_flush(env, 1); /* Default to ev67; no reason not to emulate insns by default. */ diff --git a/target-cris/translate.c b/target-cris/translate.c index 7224f46..fd9e563 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -3516,8 +3516,9 @@ CPUCRISState *cpu_cris_init (const char *cpu_model) cpu_state_reset(env); qemu_init_vcpu(env); - if (tcg_initialized) - return env; + if (!tcg_enabled() || tcg_initialized) { + return env; + } tcg_initialized = 1; diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 1feed9b..358499e 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -169,7 +169,7 @@ CPUM68KState *cpu_m68k_init(const char *cpu_model) env = g_malloc0(sizeof(CPUM68KState)); cpu_exec_init(env); - if (!inited) { + if (tcg_enabled() && !inited) { inited = 1; m68k_tcg_init(); } diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index b602820..5346580 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -1902,8 +1902,9 @@ CPUMBState *cpu_mb_init (const char *cpu_model) qemu_init_vcpu(env); set_float_rounding_mode(float_round_nearest_even, &env->fp_status); - if (tcg_initialized) + if (!tcg_enabled() || tcg_initialized) { return env; + } tcg_initialized = 1; diff --git a/target-mips/translate.c b/target-mips/translate.c index a663b74..edffae2 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -12707,7 +12707,9 @@ CPUMIPSState *cpu_mips_init (const char *cpu_model) #endif fpu_init(env, def); mvp_init(env, def); - mips_tcg_init(); + if (tcg_enabled()) { + mips_tcg_init(); + } cpu_state_reset(env); qemu_init_vcpu(env); return env; diff --git a/target-sh4/translate.c b/target-sh4/translate.c index a337beb..4ec32ab 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -277,7 +277,9 @@ CPUSH4State *cpu_sh4_init(const char *cpu_model) env->features = def->features; cpu_exec_init(env); env->movcal_backup_tail = &(env->movcal_backup); - sh4_translate_init(); + if (tcg_enabled()) { + sh4_translate_init(); + } env->cpu_model_str = cpu_model; cpu_state_reset(env); cpu_register(env, def); diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c index 24f90f1..7ac6bdb 100644 --- a/target-sparc/cpu.c +++ b/target-sparc/cpu.c @@ -119,7 +119,9 @@ CPUSPARCState *cpu_sparc_init(const char *cpu_model) cpu = SPARC_CPU(object_new(TYPE_SPARC_CPU)); env = &cpu->env; - gen_intermediate_code_init(env); + if (tcg_enabled()) { + gen_intermediate_code_init(env); + } if (cpu_sparc_register(env, cpu_model) < 0) { object_delete(OBJECT(cpu));
Skip ROM or kernel loading and TCG init for qtest. For Xtensa there is no default board and the default board (g3beige) for PPCEMB seems to be wrong. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> --- hw/an5206.c | 4 +- hw/axis_dev88.c | 4 ++ hw/collie.c | 3 ++ hw/exynos4_boards.c | 8 +++- hw/highbank.c | 3 ++ hw/integratorcp.c | 3 ++ hw/mainstone.c | 3 ++ hw/mcf5208.c | 3 ++ hw/mips_fulong2e.c | 49 ++++++++++++----------- hw/mips_jazz.c | 31 ++++++++------- hw/mips_malta.c | 88 +++++++++++++++++++++-------------------- hw/mips_mipssim.c | 39 +++++++++--------- hw/musicpal.c | 3 ++ hw/omap_sx1.c | 2 +- hw/palm.c | 2 +- hw/realview.c | 3 ++ hw/s390-virtio.c | 68 +++++++++++++++---------------- hw/shix.c | 28 +++++++------ hw/spitz.c | 3 ++ hw/tosa.c | 3 ++ hw/versatilepb.c | 3 ++ hw/vexpress.c | 4 +- hw/xilinx_zynq.c | 3 ++ target-alpha/translate.c | 4 +- target-cris/translate.c | 5 ++- target-m68k/helper.c | 2 +- target-microblaze/translate.c | 3 +- target-mips/translate.c | 4 +- target-sh4/translate.c | 4 +- target-sparc/cpu.c | 4 +- 30 files changed, 228 insertions(+), 158 deletions(-)