| Message ID | 1334218381-4208-2-git-send-email-e.voevodin@samsung.com |
|---|---|
| State | New |
| Headers | show |
On 12 April 2012 09:13, Evgeny Voevodin <e.voevodin@samsung.com> wrote: > New EXYNOS4210_IRQ_GATE_GROUP_SIZE introduced and > EXYNOS4210_IRQ_GATE_NINPUTS changed from 8 to 4, because > having 8 inputs makes an input group of size 4 and access to > second's group first input leads to pass it into third instead of > second output of gate. I'm afraid I can't make any sense of this commit message :-( > -#define EXYNOS4210_IRQ_GATE_NINPUTS 8 > +#define EXYNOS4210_IRQ_GATE_NINPUTS 4 You can't change this without bumping the exynos4210.irq_gate VMState version, because it's used as the array size there. I think you're just going to have to merge these two patches into one. > +#define EXYNOS4210_IRQ_GATE_GROUP_SIZE (EXYNOS4210_IRQ_GATE_NINPUTS / \ > + EXYNOS4210_NCPUS) Minor nit, I think putting the line break like this: #define EXYNOS4210_IRQ_GATE_GROUP_SIZE \ (EXYNOS4210_IRQ_GATE_NINPUTS / EXYNOS4210_NCPUS) is more readable. -- PMM
On 16.04.2012 14:51, Peter Maydell wrote: > On 12 April 2012 09:13, Evgeny Voevodin<e.voevodin@samsung.com> wrote: >> New EXYNOS4210_IRQ_GATE_GROUP_SIZE introduced and >> EXYNOS4210_IRQ_GATE_NINPUTS changed from 8 to 4, because >> having 8 inputs makes an input group of size 4 and access to >> second's group first input leads to pass it into third instead of >> second output of gate. > I'm afraid I can't make any sense of this commit message :-( > >> -#define EXYNOS4210_IRQ_GATE_NINPUTS 8 >> +#define EXYNOS4210_IRQ_GATE_NINPUTS 4 > You can't change this without bumping the exynos4210.irq_gate VMState > version, because it's used as the array size there. I think you're > just going to have to merge these two patches into one. Oh, I see... >> +#define EXYNOS4210_IRQ_GATE_GROUP_SIZE (EXYNOS4210_IRQ_GATE_NINPUTS / \ >> + EXYNOS4210_NCPUS) > Minor nit, I think putting the line break like this: > > #define EXYNOS4210_IRQ_GATE_GROUP_SIZE \ > (EXYNOS4210_IRQ_GATE_NINPUTS / EXYNOS4210_NCPUS) > > is more readable. Sure > -- PMM > Thanks, will merge patches.
diff --git a/hw/exynos4210.c b/hw/exynos4210.c index f904370..5e30387 100644 --- a/hw/exynos4210.c +++ b/hw/exynos4210.c @@ -116,7 +116,8 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem, busdev = sysbus_from_qdev(dev); sysbus_mmio_map(busdev, 0, EXYNOS4210_SMP_PRIVATE_BASE_ADDR); for (n = 0; n < EXYNOS4210_NCPUS; n++) { - sysbus_connect_irq(busdev, n, gate_irq[n * 2]); + sysbus_connect_irq(busdev, n, gate_irq[n * + EXYNOS4210_IRQ_GATE_GROUP_SIZE]); } for (n = 0; n < EXYNOS4210_INT_GIC_NIRQ; n++) { s->irqs.int_gic_irq[n] = qdev_get_gpio_in(dev, n); @@ -135,7 +136,8 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem, /* Map Distributer interface */ sysbus_mmio_map(busdev, 1, EXYNOS4210_EXT_GIC_DIST_BASE_ADDR); for (n = 0; n < EXYNOS4210_NCPUS; n++) { - sysbus_connect_irq(busdev, n, gate_irq[n * 2 + 1]); + sysbus_connect_irq(busdev, n, gate_irq[n * + EXYNOS4210_IRQ_GATE_GROUP_SIZE + 1]); } for (n = 0; n < EXYNOS4210_EXT_GIC_NIRQ; n++) { s->irqs.ext_gic_irq[n] = qdev_get_gpio_in(dev, n); diff --git a/hw/exynos4210.h b/hw/exynos4210.h index c112e03..cb5aafb 100644 --- a/hw/exynos4210.h +++ b/hw/exynos4210.h @@ -56,7 +56,9 @@ /* * exynos4210 IRQ subsystem stub definitions. */ -#define EXYNOS4210_IRQ_GATE_NINPUTS 8 +#define EXYNOS4210_IRQ_GATE_NINPUTS 4 +#define EXYNOS4210_IRQ_GATE_GROUP_SIZE (EXYNOS4210_IRQ_GATE_NINPUTS / \ + EXYNOS4210_NCPUS) #define EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ 64 #define EXYNOS4210_MAX_EXT_COMBINER_OUT_IRQ 16
New EXYNOS4210_IRQ_GATE_GROUP_SIZE introduced and EXYNOS4210_IRQ_GATE_NINPUTS changed from 8 to 4, because having 8 inputs makes an input group of size 4 and access to second's group first input leads to pass it into third instead of second output of gate. Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> --- hw/exynos4210.c | 6 ++++-- hw/exynos4210.h | 4 +++- 2 files changed, 7 insertions(+), 3 deletions(-)