===================================================================
@@ -636,6 +636,25 @@ count_occurrences (const_rtx x, const_rt
}
+/* Return TRUE if OP is a register or subreg of a register that
+ holds an unsigned quantity. Otherwise, return FALSE. */
+
+bool
+unsigned_reg_p (rtx op)
+{
+ if (REG_P (op)
+ && REG_EXPR (op)
+ && TYPE_UNSIGNED (TREE_TYPE (REG_EXPR (op))))
+ return true;
+
+ if (GET_CODE (op) == SUBREG
+ && SUBREG_PROMOTED_UNSIGNED_P (op))
+ return true;
+
+ return false;
+}
+
+
/* Nonzero if register REG appears somewhere within IN.
Also works if REG is not a register; in this case it checks
for a subexpression of IN that is Lisp "equal" to REG. */
===================================================================
@@ -1909,6 +1909,7 @@ extern HOST_WIDE_INT get_integer_term (c
extern rtx get_related_value (const_rtx);
extern bool offset_within_block_p (const_rtx, HOST_WIDE_INT);
extern void split_const (rtx, rtx *, rtx *);
+extern bool unsigned_reg_p (rtx);
extern int reg_mentioned_p (const_rtx, const_rtx);
extern int count_occurrences (const_rtx, const_rtx, int);
extern int reg_referenced_p (const_rtx, const_rtx);
===================================================================
@@ -15570,14 +15570,11 @@ rs6000_generate_compare (rtx cmp, enum m
|| code == GEU || code == LEU)
comp_mode = CCUNSmode;
else if ((code == EQ || code == NE)
- && GET_CODE (op0) == SUBREG
- && GET_CODE (op1) == SUBREG
- && SUBREG_PROMOTED_UNSIGNED_P (op0)
- && SUBREG_PROMOTED_UNSIGNED_P (op1))
+ && unsigned_reg_p (op0)
+ && (unsigned_reg_p (op1)
+ || (CONST_INT_P (op1) && INTVAL (op1) != 0)))
/* These are unsigned values, perhaps there will be a later
- ordering compare that can be shared with this one.
- Unfortunately we cannot detect the signedness of the operands
- for non-subregs. */
+ ordering compare that can be shared with this one. */
comp_mode = CCUNSmode;
else
comp_mode = CCmode;
===================================================================
@@ -9015,8 +9015,13 @@ expand_expr_real_1 (tree exp, rtx target
&& stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
g = SSA_NAME_DEF_STMT (exp);
if (g)
- return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
- modifier, NULL);
+ {
+ rtx r = expand_expr_real (gimple_assign_rhs_to_tree (g), target,
+ tmode, modifier, NULL);
+ if (REG_P (r) && !REG_EXPR (r))
+ set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
+ return r;
+ }
ssa_name = exp;
decl_rtl = get_rtx_for_ssa_name (ssa_name);
===================================================================
@@ -2381,7 +2381,11 @@ expand_case (gimple stmt)
do_pending_stack_adjust ();
if (MEM_P (index))
- index = copy_to_reg (index);
+ {
+ index = copy_to_reg (index);
+ if (TREE_CODE (index_expr) == SSA_NAME)
+ set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (index_expr), index);
+ }
/* We generate a binary decision tree to select the
appropriate target code. This is done as follows:
===================================================================
@@ -0,0 +1,18 @@
+/* Test cse'ing of unsigned compares. */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+/* { dg-final { scan-assembler-not "cmpw" } } */
+/* { dg-final { scan-assembler-times "cmplw" 1 } } */
+
+unsigned int a, b;
+
+int
+foo (void)
+{
+ if (a == b) return 1;
+ if (a > b) return 2;
+ if (a < b) return 3;
+ if (a != b) return 4;
+ return 0;
+}
===================================================================
@@ -0,0 +1,18 @@
+/* Test cse'ing of unsigned compares. */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+/* { dg-final { scan-assembler-not "cmpw" } } */
+/* { dg-final { scan-assembler-times "cmplw" 1 } } */
+
+unsigned int *a, *b;
+
+int
+foo (void)
+{
+ if (*a == *b) return 1;
+ if (*a > *b) return 2;
+ if (*a < *b) return 3;
+ if (*a != *b) return 4;
+ return 0;
+}
===================================================================
@@ -0,0 +1,41 @@
+/* Test cse'ing of unsigned compares. */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fno-jump-tables" } */
+
+/* { dg-final { scan-assembler-not "cmpwi" } } */
+/* { dg-final { scan-assembler-times "cmplwi" 5 } } */
+
+extern int case0 (void);
+extern int case1 (void);
+extern int case2 (void);
+extern int case3 (void);
+extern int case4 (void);
+
+enum CASE_VALUES
+{
+ CASE0 = 1,
+ CASE1,
+ CASE2,
+ CASE3,
+ CASE4
+};
+
+int
+foo (enum CASE_VALUES index)
+{
+ switch (index)
+ {
+ case CASE0:
+ return case0 ();
+ case CASE1:
+ return case1 ();
+ case CASE2:
+ return case2 ();
+ case CASE3:
+ return case3 ();
+ case CASE4:
+ return case4 ();
+ }
+
+ return 0;
+}
===================================================================
@@ -0,0 +1,44 @@
+/* Test cse'ing of unsigned compares. */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fno-jump-tables" } */
+
+/* The following tests fail due to an issue in expand not
+ attaching an type expression information on *index's reg rtx. */
+
+/* { dg-final { scan-assembler-not "cmpwi" } } */
+/* { dg-final { scan-assembler-times "cmplwi" 5 } } */
+
+extern int case0 (void);
+extern int case1 (void);
+extern int case2 (void);
+extern int case3 (void);
+extern int case4 (void);
+
+enum CASE_VALUES
+{
+ CASE0 = 1,
+ CASE1,
+ CASE2,
+ CASE3,
+ CASE4
+};
+
+int
+foo (enum CASE_VALUES *index)
+{
+ switch (*index)
+ {
+ case CASE0:
+ return case0 ();
+ case CASE1:
+ return case1 ();
+ case CASE2:
+ return case2 ();
+ case CASE3:
+ return case3 ();
+ case CASE4:
+ return case4 ();
+ }
+
+ return 0;
+}