diff mbox

Support for Runtime CPU type detection via builtins (issue5754058)

Message ID 20120330001021.9E30EB2086@azwildcat.mtv.corp.google.com
State New
Headers show

Commit Message

Sriraman Tallam March 30, 2012, 12:10 a.m. UTC
Subject:Support for Runtime CPU type detection via builtins

Hi,

    I have made a new patch to only have two builtins :

* __builtin_cpu_is ("<CPUNAME>")
* __builtin_cpu_supports ("<FEATURE>")

apart from the cpu init builtin, __builtin_cpu_init.

List of CPU names :

* "amd"
* "intel"
* "atom"
* "core2"
* "corei7"
* "nehalem"
* "westmere"
* "sandybridge"
* "amdfam10h"
* "barcelona"
* "shanghai"
* "istanbul"
* "bdver1"
* "bdver2"

List of CPU features :

* "cmov"
* "mmx"
* "popcnt"
* "sse"
* "sse2"
* "sse3"
* "ssse3"
* "sse4.1"
* "sse4.2"

As an example, to check if CPU is corei7, call __builtin_cpu_is ("corei7")

Comments?
Thanks.



	* config/i386/i386.c (build_struct_with_one_bit_fields): New function.
	(make_var_decl): New function.
	(get_field_from_struct): New function.
	(fold_builtin_target): New function.
	(ix86_fold_builtin): New function.
	(ix86_expand_builtin): Expand new builtins by folding them.
	(make_cpu_type_builtin): New functions.
	(ix86_init_platform_type_builtins): Make the new builtins.
	(ix86_init_builtins): Make new builtins to detect CPU type.
	(TARGET_FOLD_BUILTIN): New macro.
	(IX86_BUILTIN_CPU_INIT): New enum value.
	(IX86_BUILTIN_CPU_IS): New enum value.
	(IX86_BUILTIN_CPU_SUPPORTS): New enum value.
	* config/i386/i386-builtin-types.def: New function type.
	* testsuite/gcc.target/builtin_target.c: New testcase.
	
	* libgcc/config/i386/i386-cpuinfo.c: New file.
	* libgcc/config/i386/t-cpuinfo: New file.
	* libgcc/config.host: Include t-cpuinfo.
	* libgcc/config/i386/libgcc-glibc.ver: Version symbols __cpu_model
	and __cpu_features.

--
This patch is available for review at http://codereview.appspot.com/5754058

Comments

Michael Matz March 30, 2012, 12:47 p.m. UTC | #1
Hi,

On Thu, 29 Mar 2012, Sriraman Tallam wrote:

> +struct __processor_model
> +{
> +  /* Vendor. */
> +  unsigned int __cpu_is_amd : 1;
> +  unsigned int __cpu_is_intel : 1;
> +  /* CPU type. */
> +  unsigned int __cpu_is_intel_atom : 1;
> +  unsigned int __cpu_is_intel_core2 : 1;
> +  unsigned int __cpu_is_intel_corei7 : 1;
> +  unsigned int __cpu_is_intel_corei7_nehalem : 1;
> +  unsigned int __cpu_is_intel_corei7_westmere : 1;
> +  unsigned int __cpu_is_intel_corei7_sandybridge : 1;
> +  unsigned int __cpu_is_amdfam10h : 1;
> +  unsigned int __cpu_is_amdfam10h_barcelona : 1;
> +  unsigned int __cpu_is_amdfam10h_shanghai : 1;
> +  unsigned int __cpu_is_amdfam10h_istanbul : 1;
> +  unsigned int __cpu_is_amdfam15h_bdver1 : 1;
> +  unsigned int __cpu_is_amdfam15h_bdver2 : 1;
> +} __cpu_model;

It doesn't make sense for the model to be a bitfield, a processor will 
have only ever exactly one model.  Just make it an enum or even just an 
int.


Ciao,
Michael.
Gerald Pfeifer April 8, 2012, 1:17 p.m. UTC | #2
On Thu, 29 Mar 2012, Sriraman Tallam wrote:
> Hi,
> 
>     I have made a new patch to only have two builtins :
> 
> * __builtin_cpu_is ("<CPUNAME>")
> * __builtin_cpu_supports ("<FEATURE>")
> 
> apart from the cpu init builtin, __builtin_cpu_init.

I don't see any .texi file as part of this change.  Shouldn't this
be documented (and also added to the release notes gcc-4.8/changes.html)?

> List of CPU names :
> 
> * "amd"
> * "intel"

Are company names really suitable here?  Intel is also still producing
ia64 aka Itanium, and in the future AMD might do some ARM-based designs.
AMD64 and Intel64 might work.

Gerald
diff mbox

Patch

Index: libgcc/config.host
===================================================================
--- libgcc/config.host	(revision 185898)
+++ libgcc/config.host	(working copy)
@@ -1130,7 +1130,7 @@  i[34567]86-*-linux* | x86_64-*-linux* | \
   i[34567]86-*-kfreebsd*-gnu | x86_64-*-kfreebsd*-gnu | \
   i[34567]86-*-knetbsd*-gnu | \
   i[34567]86-*-gnu*)
-	tmake_file="${tmake_file} t-tls i386/t-linux"
+	tmake_file="${tmake_file} t-tls i386/t-linux i386/t-cpuinfo"
 	if test "$libgcc_cv_cfi" = "yes"; then
 		tmake_file="${tmake_file} t-stack i386/t-stack-i386"
 	fi
Index: libgcc/config/i386/t-cpuinfo
===================================================================
--- libgcc/config/i386/t-cpuinfo	(revision 0)
+++ libgcc/config/i386/t-cpuinfo	(revision 0)
@@ -0,0 +1 @@ 
+LIB2ADD += $(srcdir)/config/i386/i386-cpuinfo.c
Index: libgcc/config/i386/libgcc-glibc.ver
===================================================================
--- libgcc/config/i386/libgcc-glibc.ver	(revision 185898)
+++ libgcc/config/i386/libgcc-glibc.ver	(working copy)
@@ -147,6 +147,11 @@  GCC_4.3.0 {
   __trunctfxf2
   __unordtf2
 }
+
+GCC_4.8.0 {
+  __cpu_model
+  __cpu_features
+}
 %else
 GCC_4.4.0 {
   __addtf3
@@ -183,4 +188,9 @@  GCC_4.4.0 {
 GCC_4.5.0 {
   __extendxftf2
 }
+
+GCC_4.8.0 {
+  __cpu_model
+  __cpu_features
+}
 %endif
Index: libgcc/config/i386/i386-cpuinfo.c
===================================================================
--- libgcc/config/i386/i386-cpuinfo.c	(revision 0)
+++ libgcc/config/i386/i386-cpuinfo.c	(revision 0)
@@ -0,0 +1,306 @@ 
+/* Get CPU type and Features for x86 processors.
+   Copyright (C) 2012 Free Software Foundation, Inc.
+   Contributed by Sriraman Tallam (tmsriram@google.com)
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>. */
+
+#include "cpuid.h"
+#include "tsystem.h"
+
+int __cpu_indicator_init (void) __attribute__ ((constructor (101)));
+
+enum vendor_signatures
+{
+  SIG_INTEL =	0x756e6547 /* Genu */,
+  SIG_AMD =	0x68747541 /* Auth */
+};
+
+/* ISA Features supported. */
+
+struct __processor_features
+{
+  unsigned int __cpu_cmov : 1;
+  unsigned int __cpu_mmx : 1;
+  unsigned int __cpu_popcnt : 1;
+  unsigned int __cpu_sse : 1;
+  unsigned int __cpu_sse2 : 1;
+  unsigned int __cpu_sse3 : 1;
+  unsigned int __cpu_ssse3 : 1;
+  unsigned int __cpu_sse4_1 : 1;
+  unsigned int __cpu_sse4_2 : 1;
+} __cpu_features;
+
+/* Processor Model. */
+
+struct __processor_model
+{
+  /* Vendor. */
+  unsigned int __cpu_is_amd : 1;
+  unsigned int __cpu_is_intel : 1;
+  /* CPU type. */
+  unsigned int __cpu_is_intel_atom : 1;
+  unsigned int __cpu_is_intel_core2 : 1;
+  unsigned int __cpu_is_intel_corei7 : 1;
+  unsigned int __cpu_is_intel_corei7_nehalem : 1;
+  unsigned int __cpu_is_intel_corei7_westmere : 1;
+  unsigned int __cpu_is_intel_corei7_sandybridge : 1;
+  unsigned int __cpu_is_amdfam10h : 1;
+  unsigned int __cpu_is_amdfam10h_barcelona : 1;
+  unsigned int __cpu_is_amdfam10h_shanghai : 1;
+  unsigned int __cpu_is_amdfam10h_istanbul : 1;
+  unsigned int __cpu_is_amdfam15h_bdver1 : 1;
+  unsigned int __cpu_is_amdfam15h_bdver2 : 1;
+} __cpu_model;
+
+/* Get the specific type of AMD CPU.  */
+
+static void
+get_amd_cpu (unsigned int family, unsigned int model)
+{
+  switch (family)
+    {
+    /* AMD Family 10h.  */
+    case 0x10:
+      switch (model)
+	{
+	case 0x2:
+	  /* Barcelona.  */
+	  __cpu_model.__cpu_is_amdfam10h = 1;
+	  __cpu_model.__cpu_is_amdfam10h_barcelona = 1;
+	  break;
+	case 0x4:
+	  /* Shanghai.  */
+	  __cpu_model.__cpu_is_amdfam10h = 1;
+	  __cpu_model.__cpu_is_amdfam10h_shanghai = 1;
+	  break;
+	case 0x8:
+	  /* Istanbul.  */
+	  __cpu_model.__cpu_is_amdfam10h = 1;
+	  __cpu_model.__cpu_is_amdfam10h_istanbul = 1;
+	  break;
+	default:
+	  break;
+	}
+      break;
+    /* AMD Family 15h.  */
+    case 0x15:
+      /* Bulldozer version 1.  */
+      if (model >= 0 && model <= 0xf)
+        __cpu_model.__cpu_is_amdfam15h_bdver1 = 1;
+      /* Bulldozer version 2.  */
+      if (model >= 0x10 && model <= 0x1f)
+        __cpu_model.__cpu_is_amdfam15h_bdver2 = 1;
+      break;
+    default:
+      break;
+    }
+}
+
+/* Get the specific type of Intel CPU.  */
+
+static void
+get_intel_cpu (unsigned int family, unsigned int model, unsigned int brand_id)
+{
+  /* Parse family and model only if brand ID is 0. */
+  if (brand_id == 0)
+    {
+      switch (family)
+	{
+	case 0x5:
+	  /* Pentium.  */
+	  break;
+	case 0x6:
+	  switch (model)
+	    {
+	    case 0x1c:
+	    case 0x26:
+	      /* Atom.  */
+	      __cpu_model.__cpu_is_intel_atom = 1;
+	      break;
+	    case 0x1a:
+	    case 0x1e:
+	    case 0x1f:
+	    case 0x2e:
+	      /* Nehalem.  */
+	      __cpu_model.__cpu_is_intel_corei7 = 1;
+	      __cpu_model.__cpu_is_intel_corei7_nehalem = 1;
+	      break;
+	    case 0x25:
+	    case 0x2c:
+	    case 0x2f:
+	      /* Westmere.  */
+	      __cpu_model.__cpu_is_intel_corei7 = 1;
+	      __cpu_model.__cpu_is_intel_corei7_westmere = 1;
+	      break;
+	    case 0x2a:
+	      /* Sandy Bridge.  */
+	      __cpu_model.__cpu_is_intel_corei7 = 1;
+	      __cpu_model.__cpu_is_intel_corei7_sandybridge = 1;
+	      break;
+	    case 0x17:
+	    case 0x1d:
+	      /* Penryn.  */
+	    case 0x0f:
+	      /* Merom.  */
+	      __cpu_model.__cpu_is_intel_core2 = 1;
+	      break;
+	    default:
+	      break;
+	    }
+	  break;
+	default:
+	  /* We have no idea.  */
+	  break;
+	}
+    }
+}	             	
+
+static void
+get_available_features (unsigned int ecx, unsigned int edx)
+{
+  __cpu_features.__cpu_cmov = (edx & bit_CMOV) ? 1 : 0;
+  __cpu_features.__cpu_mmx = (edx & bit_MMX) ? 1 : 0;
+  __cpu_features.__cpu_sse = (edx & bit_SSE) ? 1 : 0;
+  __cpu_features.__cpu_sse2 = (edx & bit_SSE2) ? 1 : 0;
+  __cpu_features.__cpu_popcnt = (ecx & bit_POPCNT) ? 1 : 0;
+  __cpu_features.__cpu_sse3 = (ecx & bit_SSE3) ? 1 : 0;
+  __cpu_features.__cpu_ssse3 = (ecx & bit_SSSE3) ? 1 : 0;
+  __cpu_features.__cpu_sse4_1 = (ecx & bit_SSE4_1) ? 1 : 0;
+  __cpu_features.__cpu_sse4_2 = (ecx & bit_SSE4_2) ? 1 : 0;
+}
+
+
+/* Sanity check for the vendor and cpu type flags.  */
+
+static int
+sanity_check (void)
+{
+  unsigned int one_type = 0;
+
+  /* Vendor cannot be Intel and AMD. */
+  gcc_assert((__cpu_model.__cpu_is_intel == 0)
+             || (__cpu_model.__cpu_is_amd == 0));
+ 
+  /* Only one CPU type can be set. */
+  one_type = (__cpu_model.__cpu_is_intel_atom
+	      + __cpu_model.__cpu_is_intel_core2
+	      + __cpu_model.__cpu_is_intel_corei7_nehalem
+	      + __cpu_model.__cpu_is_intel_corei7_westmere
+	      + __cpu_model.__cpu_is_intel_corei7_sandybridge
+	      + __cpu_model.__cpu_is_amdfam10h_barcelona
+	      + __cpu_model.__cpu_is_amdfam10h_shanghai
+	      + __cpu_model.__cpu_is_amdfam10h_istanbul
+	      + __cpu_model.__cpu_is_amdfam15h_bdver1
+	      + __cpu_model.__cpu_is_amdfam15h_bdver2);
+
+  gcc_assert (one_type <= 1);
+  return 0;
+}
+
+/* A noinline function calling __get_cpuid. Having many calls to
+   cpuid in one function in 32-bit mode causes GCC to complain:
+   "canâ??t find a register in class â??CLOBBERED_REGSâ??".  This is
+   related to PR rtl-optimization 44174. */
+
+static int __attribute__ ((noinline))
+__get_cpuid_output (unsigned int __level,
+		    unsigned int *__eax, unsigned int *__ebx,
+		    unsigned int *__ecx, unsigned int *__edx)
+{
+  return __get_cpuid (__level, __eax, __ebx, __ecx, __edx);
+}
+
+
+/* A constructor function that is sets __cpu_model and __cpu_features with
+   the right values.  This needs to run only once.  This constructor is
+   given the highest priority and it should run before constructors without
+   the priority set.  However, it still runs after ifunc initializers and
+   needs to be called explicitly there.  */
+
+int __attribute__ ((constructor (101)))
+__cpu_indicator_init (void)
+{
+  unsigned int eax, ebx, ecx, edx;
+
+  int max_level = 5;
+  unsigned int vendor;
+  unsigned int model, family, brand_id;
+  unsigned int extended_model, extended_family;
+  static int called = 0;
+
+  /* This function needs to run just once.  */
+  if (called)
+    return 0;
+  else
+    called = 1;
+
+  /* Assume cpuid insn present. Run in level 0 to get vendor id. */
+  if (!__get_cpuid_output (0, &eax, &ebx, &ecx, &edx))
+    return -1;
+
+  vendor = ebx;
+  max_level = eax;
+
+  if (max_level < 1)
+    return -1;
+
+  if (!__get_cpuid_output (1, &eax, &ebx, &ecx, &edx))
+    return -1;
+
+  model = (eax >> 4) & 0x0f;
+  family = (eax >> 8) & 0x0f;
+  brand_id = ebx & 0xff;
+  extended_model = (eax >> 12) & 0xf0;
+  extended_family = (eax >> 20) & 0xff;
+
+  if (vendor == SIG_INTEL)
+    {
+      /* Adjust model and family for Intel CPUS. */
+      if (family == 0x0f)
+	{
+	  family += extended_family;
+	  model += extended_model;
+	}
+      else if (family == 0x06)
+	model += extended_model;
+
+      /* Get CPU type.  */
+      __cpu_model.__cpu_is_intel = 1;
+      get_intel_cpu (family, model, brand_id);
+    }
+
+  if (vendor == SIG_AMD)
+    {
+      /* Adjust model and family for AMD CPUS. */
+      if (family == 0x0f)
+	{
+	  family += extended_family;
+	  model += (extended_model << 4);
+	}
+
+      /* Get CPU type.  */
+      __cpu_model.__cpu_is_amd = 1;
+      get_amd_cpu (family, model);
+    }
+
+  /* Find available features. */
+  get_available_features (ecx, edx);
+
+  sanity_check ();
+
+  return 0;
+}
Index: gcc/testsuite/gcc.target/i386/builtin_target.c
===================================================================
--- gcc/testsuite/gcc.target/i386/builtin_target.c	(revision 0)
+++ gcc/testsuite/gcc.target/i386/builtin_target.c	(revision 0)
@@ -0,0 +1,63 @@ 
+/* This test checks if the __builtin_cpu_is and __builtin_cpu_supports calls
+   are recognized. */
+
+/* { dg-do run } */
+
+int
+fn1 ()
+{
+  if (__builtin_cpu_supports ("cmov") < 0)
+    return -1;
+  if (__builtin_cpu_supports ("mmx") < 0)
+    return -1;
+  if (__builtin_cpu_supports ("popcnt") < 0)
+    return -1;
+  if (__builtin_cpu_supports ("sse") < 0)
+    return -1;
+  if (__builtin_cpu_supports ("sse2") < 0)
+    return -1;
+  if (__builtin_cpu_supports ("sse3") < 0)
+    return -1;
+  if (__builtin_cpu_supports ("ssse3") < 0)
+    return -1;
+  if (__builtin_cpu_supports ("sse4.1") < 0)
+    return -1;
+  if (__builtin_cpu_supports ("sse4.2") < 0)
+    return -1;
+  if (__builtin_cpu_is ("amd") < 0)
+    return -1;
+  if (__builtin_cpu_is ("intel") < 0)
+    return -1;
+  if (__builtin_cpu_is ("atom") < 0)
+    return -1;
+  if (__builtin_cpu_is ("core2") < 0)
+    return -1;
+  if (__builtin_cpu_is ("corei7") < 0)
+    return -1;
+  if (__builtin_cpu_is ("nehalem") < 0)
+    return -1;
+  if (__builtin_cpu_is ("westmere") < 0)
+    return -1;
+  if (__builtin_cpu_is ("sandybridge") < 0)
+    return -1;
+  if (__builtin_cpu_is ("amdfam10h") < 0)
+    return -1;
+  if (__builtin_cpu_is ("barcelona") < 0)
+    return -1;
+  if (__builtin_cpu_is ("shanghai") < 0)
+    return -1;
+  if (__builtin_cpu_is ("istanbul") < 0)
+    return -1;
+  if (__builtin_cpu_is ("bdver1") < 0)
+    return -1;
+  if (__builtin_cpu_is ("bdver2") < 0)
+    return -1;
+
+  return 0;
+}
+
+int main ()
+{
+  __builtin_cpu_init ();
+  return fn1 ();
+}
Index: gcc/config/i386/i386-builtin-types.def
===================================================================
--- gcc/config/i386/i386-builtin-types.def	(revision 185898)
+++ gcc/config/i386/i386-builtin-types.def	(working copy)
@@ -155,6 +155,7 @@  DEF_FUNCTION_TYPE (INT, V4SF)
 DEF_FUNCTION_TYPE (INT, V8QI)
 DEF_FUNCTION_TYPE (INT, V8SF)
 DEF_FUNCTION_TYPE (INT, V32QI)
+DEF_FUNCTION_TYPE (INT, PCCHAR)
 DEF_FUNCTION_TYPE (INT64, INT64)
 DEF_FUNCTION_TYPE (INT64, V2DF)
 DEF_FUNCTION_TYPE (INT64, V4SF)
Index: gcc/config/i386/i386.c
===================================================================
--- gcc/config/i386/i386.c	(revision 185898)
+++ gcc/config/i386/i386.c	(working copy)
@@ -25809,6 +25809,11 @@  enum ix86_builtins
   /* CFString built-in for darwin */
   IX86_BUILTIN_CFSTRING,
 
+  /* Builtins to get CPU type and supported features. */
+  IX86_BUILTIN_CPU_INIT,
+  IX86_BUILTIN_CPU_IS,
+  IX86_BUILTIN_CPU_SUPPORTS,
+
   IX86_BUILTIN_MAX
 };
 
@@ -27627,6 +27632,308 @@  ix86_init_mmx_sse_builtins (void)
     }
 }
 
+/* Returns a struct type with name NAME and number of fields equal to
+   NUM_FIELDS.  Each field is a unsigned int bit field of length 1 bit. */
+
+static tree
+build_struct_with_one_bit_fields (int num_fields, const char *name)
+{
+  int i;
+  char field_name [10];
+  tree field = NULL_TREE, field_chain = NULL_TREE;
+  tree type = make_node (RECORD_TYPE);
+
+  strcpy (field_name, "kk_field");
+
+  for (i = 0; i < num_fields; i++)
+    {
+      /* Name the fields, 0_field, 1_field, ... */
+      field_name [0] = '0' + (i / 10);
+      field_name [1] = '0' + (i % 10);
+      field = build_decl (UNKNOWN_LOCATION, FIELD_DECL,
+			  get_identifier (field_name), unsigned_type_node);
+      DECL_BIT_FIELD (field) = 1;
+      DECL_SIZE (field) = bitsize_one_node;
+      if (field_chain != NULL_TREE)
+	DECL_CHAIN (field) = field_chain;
+      field_chain = field;
+    }
+  finish_builtin_struct (type, name, field_chain, NULL_TREE);
+  return type;
+}
+
+/* Returns a extern, comdat VAR_DECL of type TYPE and name NAME. */
+
+static tree
+make_var_decl (tree type, const char *name)
+{
+  tree new_decl;
+
+  new_decl = build_decl (UNKNOWN_LOCATION,
+	                 VAR_DECL,
+	  	         get_identifier(name),
+		         type);
+
+  DECL_EXTERNAL (new_decl) = 1;
+  TREE_STATIC (new_decl) = 1;
+  TREE_PUBLIC (new_decl) = 1;
+  DECL_INITIAL (new_decl) = 0;
+  DECL_ARTIFICIAL (new_decl) = 0;
+  DECL_PRESERVE_P (new_decl) = 1;
+
+  make_decl_one_only (new_decl, DECL_ASSEMBLER_NAME (new_decl));
+  assemble_variable (new_decl, 0, 0, 0);
+
+  return new_decl;
+}
+
+/* Traverses the chain of fields in STRUCT_TYPE and returns the FIELD_NUM
+   numbered field. */
+
+static tree
+get_field_from_struct (tree struct_type, int field_num)
+{
+  int i;
+  tree field = TYPE_FIELDS (struct_type);
+
+  for (i = 0; i < field_num; i++, field = DECL_CHAIN(field))
+    {
+      gcc_assert (field != NULL_TREE);
+    }
+
+  return field;
+}
+
+/* FNDECL is a __builtin_cpu_is or a __builtin_cpu_supports call that is folded
+   into an integer defined in libgcc/config/i386/i386-cpuinfo.c */
+
+static tree 
+fold_builtin_cpu (tree fndecl, tree *args)
+{
+  int i;
+  enum ix86_builtins fn_code = (enum ix86_builtins)
+				DECL_FUNCTION_CODE (fndecl);
+  tree param_string_cst = NULL;
+
+  /* This is the order of bit-fields in __processor_features in
+     i386-cpuinfo.c */
+  enum processor_features
+  {
+    F_CMOV = 0,
+    F_MMX,
+    F_POPCNT,
+    F_SSE,
+    F_SSE2,
+    F_SSE3,
+    F_SSSE3,
+    F_SSE4_1,
+    F_SSE4_2,
+    F_MAX
+  };
+
+  /* This is the order of bit-fields in __processor_model in
+     i386-cpuinfo.c */
+  enum processor_model
+  {
+    M_AMD = 0,
+    M_INTEL,
+    M_INTEL_ATOM,
+    M_INTEL_CORE2,
+    M_INTEL_COREI7,
+    M_INTEL_COREI7_NEHALEM,
+    M_INTEL_COREI7_WESTMERE,
+    M_INTEL_COREI7_SANDYBRIDGE,
+    M_AMDFAM10H,
+    M_AMDFAM10H_BARCELONA,
+    M_AMDFAM10H_SHANGHAI,
+    M_AMDFAM10H_ISTANBUL,
+    M_AMDFAM15H_BDVER1,
+    M_AMDFAM15H_BDVER2,
+    M_MAX
+  };
+
+  static struct _arch_names_table
+    {
+      const char *const name;
+      const enum processor_model model;
+    }
+  const arch_names_table[M_MAX] =
+    {
+      {"amd", M_AMD},
+      {"intel", M_INTEL},
+      {"atom", M_INTEL_ATOM},
+      {"core2", M_INTEL_CORE2},
+      {"corei7", M_INTEL_COREI7},
+      {"nehalem", M_INTEL_COREI7_NEHALEM},
+      {"westmere", M_INTEL_COREI7_WESTMERE},
+      {"sandybridge", M_INTEL_COREI7_SANDYBRIDGE},
+      {"amdfam10h", M_AMDFAM10H},
+      {"barcelona", M_AMDFAM10H_BARCELONA},
+      {"shanghai", M_AMDFAM10H_SHANGHAI},
+      {"istanbul", M_AMDFAM10H_ISTANBUL},
+      {"bdver1", M_AMDFAM15H_BDVER1},
+      {"bdver2", M_AMDFAM15H_BDVER2},
+    };
+
+  static struct _isa_names_table
+    {
+      const char *const name;
+      const enum processor_features feature;
+    }
+  const isa_names_table[F_MAX] =
+    {
+      {"cmov",   F_CMOV},
+      {"mmx",    F_MMX},
+      {"popcnt", F_POPCNT},
+      {"sse",    F_SSE},
+      {"sse2",   F_SSE2},
+      {"sse3",   F_SSE3},
+      {"ssse3",  F_SSSE3},
+      {"sse4.1", F_SSE4_1},
+      {"sse4.2", F_SSE4_2}
+    };
+
+  static tree __processor_features_type = NULL_TREE;
+  static tree __cpu_features_var = NULL_TREE;
+  static tree __processor_model_type = NULL_TREE;
+  static tree __cpu_model_var = NULL_TREE;
+  static tree field;
+  static tree which_struct;
+
+  if (__processor_features_type == NULL_TREE)
+    __processor_features_type = build_struct_with_one_bit_fields (F_MAX,
+ 			          "__processor_features");
+
+  if (__processor_model_type == NULL_TREE)
+    __processor_model_type = build_struct_with_one_bit_fields (M_MAX,
+ 			          "__processor_model");
+
+  if (__cpu_features_var == NULL_TREE)
+    __cpu_features_var = make_var_decl (__processor_features_type,
+					"__cpu_features");
+
+  if (__cpu_model_var == NULL_TREE)
+    __cpu_model_var = make_var_decl (__processor_model_type,
+				     "__cpu_model");
+
+  gcc_assert ((args != NULL) && (*args != NULL));
+
+  param_string_cst = *args;
+  while (param_string_cst
+	 && TREE_CODE (param_string_cst) !=  STRING_CST)
+    {
+      /* *args must be a expr that can contain other EXPRS leading to a
+	 STRING_CST.   */
+      if (!EXPR_P (param_string_cst))
+ 	{
+	  error ("Parameter to builtin must be a string constant or literal");
+	  return integer_zero_node;
+	}
+      param_string_cst = TREE_OPERAND (EXPR_CHECK (param_string_cst), 0);
+    }
+ 
+  gcc_assert (param_string_cst);
+
+  if (fn_code == IX86_BUILTIN_CPU_IS)
+    {
+
+      for (i = 0; i < M_MAX; i++)
+	if (strcmp (arch_names_table[i].name,
+	    TREE_STRING_POINTER (param_string_cst)) == 0)
+	  break;
+
+      if (i == M_MAX)
+	{
+	  error ("Parameter to builtin not valid: %s",
+	         TREE_STRING_POINTER (param_string_cst));
+	  return integer_zero_node;
+	}
+
+      field = get_field_from_struct (__processor_model_type,
+				     arch_names_table[i].model);
+      which_struct = __cpu_model_var;
+    }
+
+  if (fn_code == IX86_BUILTIN_CPU_SUPPORTS)
+    {
+      for (i = 0; i < F_MAX; i++)
+	if (strcmp (isa_names_table[i].name,
+	    TREE_STRING_POINTER (param_string_cst)) == 0)
+	  break;
+
+      if (i == F_MAX)
+	{
+	  error ("Parameter to builtin not valid: %s",
+	       	 TREE_STRING_POINTER (param_string_cst));
+	  return integer_zero_node;
+	}
+
+      field = get_field_from_struct (__processor_features_type,
+				     isa_names_table[i].feature);
+      which_struct = __cpu_features_var;
+    }
+
+  return build3 (COMPONENT_REF, TREE_TYPE (field), which_struct,
+		 field, NULL_TREE);
+}
+
+static tree
+ix86_fold_builtin (tree fndecl, int n_args,
+		   tree *args, bool ignore ATTRIBUTE_UNUSED)
+{
+  if (DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_MD)
+    {
+      enum ix86_builtins fn_code = (enum ix86_builtins)
+				   DECL_FUNCTION_CODE (fndecl);
+      if (fn_code ==  IX86_BUILTIN_CPU_IS
+	  || fn_code == IX86_BUILTIN_CPU_SUPPORTS)
+	{
+	  gcc_assert (n_args == 1);
+          return fold_builtin_cpu (fndecl, args);
+	}
+    }
+
+  return NULL_TREE;
+}
+
+/* Make builtins to detect cpu type and features supported.  NAME is
+   the builtin name, CODE is the builtin code, and FTYPE is the function
+   type of the builtin.  */
+
+static void
+make_cpu_type_builtin (const char* name, int code,
+		       enum ix86_builtin_func_type ftype)
+{
+  tree decl;
+  tree type;
+
+  type = ix86_get_builtin_func_type (ftype);
+  decl = add_builtin_function (name, type, code, BUILT_IN_MD,
+			       NULL, NULL_TREE);
+  gcc_assert (decl != NULL_TREE);
+  ix86_builtins[(int) code] = decl;
+  TREE_READONLY (decl) = 1;
+}
+
+/* Make builtins to get CPU type and features supported.  The created
+   builtins are :
+
+   __builtin_cpu_init (), to detect cpu type and features,
+   __builtin_cpu_is ("<CPUNAME>"), to check if cpu is of type <CPUNAME>,
+   __builtin_cpu_supports ("<FEATURE>"), to check if cpu supports <FEATURE>
+   */
+
+static void
+ix86_init_platform_type_builtins (void)
+{
+  make_cpu_type_builtin ("__builtin_cpu_init", IX86_BUILTIN_CPU_INIT,
+			 INT_FTYPE_VOID);
+  make_cpu_type_builtin ("__builtin_cpu_is", IX86_BUILTIN_CPU_IS,
+			 INT_FTYPE_PCCHAR);
+  make_cpu_type_builtin ("__builtin_cpu_supports", IX86_BUILTIN_CPU_SUPPORTS,
+			 INT_FTYPE_PCCHAR);
+}
+
 /* Internal method for ix86_init_builtins.  */
 
 static void
@@ -27710,6 +28017,9 @@  ix86_init_builtins (void)
 
   ix86_init_builtin_types ();
 
+  /* Builtins to get CPU type and features. */
+  ix86_init_platform_type_builtins ();
+
   /* TFmode support builtins.  */
   def_builtin_const (0, "__builtin_infq",
 		     FLOAT128_FTYPE_VOID, IX86_BUILTIN_INFQ);
@@ -29328,6 +29638,28 @@  ix86_expand_builtin (tree exp, rtx target, rtx sub
   enum machine_mode mode0, mode1, mode2, mode3, mode4;
   unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
 
+  /* For CPU builtins that can be folded, fold first and expand the fold.  */
+  switch (fcode)
+    {
+    case IX86_BUILTIN_CPU_INIT:
+      {
+	/* Make it call __cpu_indicator_init in libgcc. */
+	tree call_expr, fndecl, type;
+        type = build_function_type_list (integer_type_node, NULL_TREE); 
+	fndecl = build_fn_decl ("__cpu_indicator_init", type);
+	call_expr = build_call_expr (fndecl, 0); 
+	return expand_expr (call_expr, target, mode, EXPAND_NORMAL);
+      }
+    case IX86_BUILTIN_CPU_IS:
+    case IX86_BUILTIN_CPU_SUPPORTS:
+      {
+	tree arg0 = CALL_EXPR_ARG (exp, 0);
+	tree fold_expr = fold_builtin_cpu (fndecl, &arg0);
+	gcc_assert (fold_expr != NULL_TREE);
+        return expand_expr (fold_expr, target, mode, EXPAND_NORMAL);
+      }
+    }
+
   /* Determine whether the builtin function is available under the current ISA.
      Originally the builtin was not created if it wasn't applicable to the
      current ISA based on the command line switches.  With function specific
@@ -39058,6 +39390,9 @@  ix86_autovectorize_vector_sizes (void)
 #undef TARGET_BUILD_BUILTIN_VA_LIST
 #define TARGET_BUILD_BUILTIN_VA_LIST ix86_build_builtin_va_list
 
+#undef TARGET_FOLD_BUILTIN
+#define TARGET_FOLD_BUILTIN ix86_fold_builtin
+
 #undef TARGET_ENUM_VA_LIST_P
 #define TARGET_ENUM_VA_LIST_P ix86_enum_va_list