diff mbox

[rs6000] Add support for the POWER7 dcffix instruction

Message ID 1328151610.4764.28.camel@otta
State New
Headers show

Commit Message

Peter Bergner Feb. 2, 2012, 3 a.m. UTC 
The POWER Toolchain IPC team who is adding POWER7 support to valgrind
reminded me that Power ISA 2.06 added a new convert from integer to
decimal64 dfp instruction.  The following patch adds support for it.

This passed bootstrap and regression testing with no regressions.
Is this ok?  If so, when can this be committed?  Now or stage1?

Peter

	* config/rs6000/dfp.md (floatdidd2): New define_insn.

Comments

David Edelsohn Feb. 2, 2012, 4:09 a.m. UTC | #1 
On Wed, Feb 1, 2012 at 10:00 PM, Peter Bergner <bergner@vnet.ibm.com> wrote:
> The POWER Toolchain IPC team who is adding POWER7 support to valgrind
> reminded me that Power ISA 2.06 added a new convert from integer to
> decimal64 dfp instruction.  The following patch adds support for it.
>
> This passed bootstrap and regression testing with no regressions.
> Is this ok?  If so, when can this be committed?  Now or stage1?

Stage 1.

- David
Peter Bergner March 2, 2012, 6:49 p.m. UTC | #2 
On Wed, 2012-02-01 at 23:09 -0500, David Edelsohn wrote:
> On Wed, Feb 1, 2012 at 10:00 PM, Peter Bergner <bergner@vnet.ibm.com> wrote:
> > The POWER Toolchain IPC team who is adding POWER7 support to valgrind
> > reminded me that Power ISA 2.06 added a new convert from integer to
> > decimal64 dfp instruction.  The following patch adds support for it.
> >
> > This passed bootstrap and regression testing with no regressions.
> > Is this ok?  If so, when can this be committed?  Now or stage1?
> 
> Stage 1.

Now that we're in stage1, I have now committed this to trunk.  Thanks.

Peter
diff mbox

Patch

Index: gcc/config/rs6000/dfp.md
===================================================================
--- gcc/config/rs6000/dfp.md	(revision 183808)
+++ gcc/config/rs6000/dfp.md	(working copy)
@@ -546,6 +546,13 @@  (define_insn "*cmptd_internal1"
   "dcmpuq %0,%1,%2"
   [(set_attr "type" "fpcompare")])
 
+(define_insn "floatdidd2"
+  [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
+	(float:DD (match_operand:DI 1 "gpc_reg_operand" "d")))]
+  "TARGET_DFP && TARGET_POPCNTD"
+  "dcffix %0,%1"
+  [(set_attr "type" "fp")])
+
 (define_insn "floatditd2"
   [(set (match_operand:TD 0 "gpc_reg_operand" "=d")
 	(float:TD (match_operand:DI 1 "gpc_reg_operand" "d")))]