diff mbox

[U-Boot,v6,10/18] tegra: usb: fdt: Add additional device tree definitions for USB ports

Message ID 1328288907-16725-11-git-send-email-sjg@chromium.org
State New, archived
Headers show

Commit Message

Simon Glass Feb. 3, 2012, 5:08 p.m. UTC
This adds clock references to the USB part of the device tree for U-Boot,
and marks USB1 as supporting legacy mode (which we disable in the driver).

The USB timing information may vary between boards sometimes, but for
now we hard-code it in C. This is because all current T2x boards use
the same values, we will deal with T3x later and we first need to agree
on the format for this timing information in the fdt and may in fact
decide that it has no place there.

Signed-off-by: Simon Glass <sjg@chromium.org>
---
Changes in v5:
- Add dr_mode property to control host/device/otg mode
- Add nvidia,has-legacy-mode property per review comments
- Change device tree comment style from // to /* */

Changes in v6:
- Remove dr_mode properties from SOC .dtsi file and move to boards

 arch/arm/dts/tegra20.dtsi |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

Comments

Stephen Warren Feb. 3, 2012, 8:03 p.m. UTC | #1
Simon Glass wrote at Friday, February 03, 2012 10:08 AM:
> This adds clock references to the USB part of the device tree for U-Boot,
> and marks USB1 as supporting legacy mode (which we disable in the driver).
> 
> The USB timing information may vary between boards sometimes, but for
> now we hard-code it in C. This is because all current T2x boards use
> the same values, we will deal with T3x later and we first need to agree
> on the format for this timing information in the fdt and may in fact
> decide that it has no place there.
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>

The has-legacy-mode property looks good to me.

The clock bindings need updating.
Simon Glass Feb. 3, 2012, 9:44 p.m. UTC | #2
Hi Stephen,

On Fri, Feb 3, 2012 at 12:03 PM, Stephen Warren <swarren@nvidia.com> wrote:
> Simon Glass wrote at Friday, February 03, 2012 10:08 AM:
>> This adds clock references to the USB part of the device tree for U-Boot,
>> and marks USB1 as supporting legacy mode (which we disable in the driver).
>>
>> The USB timing information may vary between boards sometimes, but for
>> now we hard-code it in C. This is because all current T2x boards use
>> the same values, we will deal with T3x later and we first need to agree
>> on the format for this timing information in the fdt and may in fact
>> decide that it has no place there.
>>
>> Signed-off-by: Simon Glass <sjg@chromium.org>
>
> The has-legacy-mode property looks good to me.
>
> The clock bindings need updating.

Are you referring to your new arbitrary peripheral number assignment
or the peripheral clock binding that you sent?

Regards,
Simon
>
> --
> nvpublic
>
Marek Vasut Feb. 26, 2012, 11:14 p.m. UTC | #3
> This adds clock references to the USB part of the device tree for U-Boot,
> and marks USB1 as supporting legacy mode (which we disable in the driver).
> 
> The USB timing information may vary between boards sometimes, but for
> now we hard-code it in C. This is because all current T2x boards use
> the same values, we will deal with T3x later and we first need to agree
> on the format for this timing information in the fdt and may in fact
> decide that it has no place there.
> 

Hi,

what's the status of this patch/patchset?

Thanks
M
diff mbox

Patch

diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index ec75747..df1eda4 100644
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -176,6 +176,8 @@ 
 		reg = <0xc5000000 0x4000>;
 		interrupts = < 52 >;
 		phy_type = "utmi";
+		clocks = <&periph_clk 22>;	/* PERIPH_ID_USBD */
+		nvidia,has-legacy-mode;
 	};
 
 	usb@c5004000 {
@@ -183,6 +185,7 @@ 
 		reg = <0xc5004000 0x4000>;
 		interrupts = < 53 >;
 		phy_type = "ulpi";
+		clocks = <&periph_clk 58>;	/* PERIPH_ID_USB2 */
 	};
 
 	usb@c5008000 {
@@ -190,6 +193,7 @@ 
 		reg = <0xc5008000 0x4000>;
 		interrupts = < 129 >;
 		phy_type = "utmi";
+		clocks = <&periph_clk 59>;	/* PERIPH_ID_USB3 */
 	};
 
 };